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authorJiewen Yao <jiewen.yao@intel.com>2017-10-17 13:22:45 +0800
committerJiewen Yao <jiewen.yao@intel.com>2017-10-24 19:42:51 +0800
commit5e96ef6cdec8835eacdbe902309139ed07f33174 (patch)
treefc22ec344acd3f441910ba4f6d828dfb9f34e078 /Silicon
parente3539c30d8e94934fa97082951a3f9536c865658 (diff)
downloadedk2-platforms-5e96ef6cdec8835eacdbe902309139ed07f33174.tar.xz
Performance improvement.
MemoryInit code will consume the DISB bit in PCH (DRAM Initialization Scratchpad Bit - GEN_PMCON_A[23]) to decide if it goes optimization path. With this change, the time of MemoryInit API is reduced from 10 seconad to 69 millisecond. Cc: Michael A Kubacki <michael.a.kubacki@intel.com> Cc: Amy Chan <amy.chan@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Brett Wang <brett.wang@intel.com> Cc: Daocheng Bu <daocheng.bu@intel.com> Cc: Isaac W Oram <isaac.w.oram@intel.com> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Amy Chan <amy.chan@intel.com>
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