diff options
| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-12-09 10:00:21 +0000 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-12-12 18:36:31 +0000 |
| commit | ace0059c18862e7fd2d02e48db38ab23edfd5342 (patch) | |
| tree | fe9398540ac829778153c2e786a30d82df20cef6 /Silicon | |
| parent | d7b0eeadeda2622836817ec7d05adeb553365a62 (diff) | |
| download | edk2-platforms-ace0059c18862e7fd2d02e48db38ab23edfd5342.tar.xz | |
Silicon/SynQuacerEvalBoard: enable PCI #0 only when card is detected
The EVB does not boot if PCI RC #0 has no card inserted, and will hang in
the PCIe initialization code. So let's check the presence detect GPIO,
and only enable PCI RC #0 if it is asserted.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Silicon')
3 files changed, 52 insertions, 21 deletions
diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c index e4aec8b091..7c529a22c6 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.c @@ -24,7 +24,10 @@ #include <Ppi/EmbeddedGpio.h>
#include <Ppi/MemoryDiscovered.h>
-#define CLEAR_SETTINGS_GPIO_NOT_IMPLEMENTED MAX_UINT8
+#define GPIO_NOT_IMPLEMENTED MAX_UINT8
+
+#define CLEAR_SETTINGS_GPIO_ASSERTED 1
+#define PCIE_GPIO_CARD_PRESENT 0
STATIC
CONST DRAM_INFO *mDramInfo = (VOID *)(UINTN)FixedPcdGet64 (PcdDramInfoBase);
@@ -100,6 +103,35 @@ STATIC CONST EFI_PEI_PPI_DESCRIPTOR mDramInfoPpiDescriptor = { &mDramInfoPpi
};
+STATIC
+EFI_STATUS
+ReadGpioInput (
+ IN EMBEDDED_GPIO_PPI *Gpio,
+ IN UINT8 Pin,
+ OUT UINTN *Value
+ )
+{
+ EFI_STATUS Status;
+
+ if (Pin == GPIO_NOT_IMPLEMENTED) {
+ return EFI_NOT_FOUND;
+ }
+
+ Status = Gpio->Set (Gpio, Pin, GPIO_MODE_INPUT);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "%a: failed to set GPIO %d as input - %r\n",
+ __FUNCTION__, Pin, Status));
+ return Status;
+ }
+
+ Status = Gpio->Get (Gpio, Pin, Value);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "%a: failed to get GPIO %d state - %r\n",
+ __FUNCTION__, Pin, Status));
+ }
+ return Status;
+}
+
EFI_STATUS
EFIAPI
PlatformPeim (
@@ -109,30 +141,26 @@ PlatformPeim ( EMBEDDED_GPIO_PPI *Gpio;
EFI_STATUS Status;
UINTN Value;
- UINT8 Pin;
ASSERT (mDramInfo->NumRegions > 0);
- Pin = FixedPcdGet8 (PcdClearSettingsGpioPin);
- if (Pin != CLEAR_SETTINGS_GPIO_NOT_IMPLEMENTED) {
- Status = PeiServicesLocatePpi (&gEdkiiEmbeddedGpioPpiGuid, 0, NULL,
- (VOID **)&Gpio);
- ASSERT_EFI_ERROR (Status);
+ Status = PeiServicesLocatePpi (&gEdkiiEmbeddedGpioPpiGuid, 0, NULL,
+ (VOID **)&Gpio);
+ ASSERT_EFI_ERROR (Status);
- Status = Gpio->Set (Gpio, Pin, GPIO_MODE_INPUT);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "%a: failed to set GPIO as input - %r\n",
- __FUNCTION__, Status));
- } else {
- Status = Gpio->Get (Gpio, Pin, &Value);
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "%a: failed to get GPIO state - %r\n",
- __FUNCTION__, Status));
- } else if (Value > 0) {
- DEBUG ((DEBUG_INFO, "%a: clearing NVRAM\n", __FUNCTION__));
- PeiServicesSetBootMode (BOOT_WITH_DEFAULT_SETTINGS);
- }
- }
+ Status = ReadGpioInput (Gpio, FixedPcdGet8 (PcdClearSettingsGpioPin), &Value);
+ if (!EFI_ERROR (Status) && Value == CLEAR_SETTINGS_GPIO_ASSERTED) {
+ DEBUG ((DEBUG_INFO, "%a: clearing NVRAM\n", __FUNCTION__));
+ PeiServicesSetBootMode (BOOT_WITH_DEFAULT_SETTINGS);
+ }
+
+ Status = ReadGpioInput (Gpio, FixedPcdGet8 (PcdPcie0PresenceDetectGpioPin),
+ &Value);
+ if (!EFI_ERROR (Status) && Value == PCIE_GPIO_CARD_PRESENT) {
+ DEBUG ((DEBUG_INFO,
+ "%a: card detected in PCIe RC #0, enabling\n", __FUNCTION__));
+ Status = PcdSet8S (PcdPcieEnableMask, PcdGet8 (PcdPcieEnableMask) | BIT0);
+ ASSERT_EFI_ERROR (Status);
}
//
diff --git a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf index a6501fb205..eb6a5bf9ac 100644 --- a/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf +++ b/Silicon/Socionext/SynQuacer/Library/SynQuacerPlatformPeiLib/SynQuacerPlatformPeiLib.inf @@ -43,6 +43,7 @@ gArmTokenSpaceGuid.PcdFvSize
gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin
gSynQuacerTokenSpaceGuid.PcdDramInfoBase
+ gSynQuacerTokenSpaceGuid.PcdPcie0PresenceDetectGpioPin
[Ppis]
gEdkiiEmbeddedGpioPpiGuid ## CONSUMES
@@ -51,6 +52,7 @@ [Pcd]
gArmTokenSpaceGuid.PcdSystemMemoryBase
gArmTokenSpaceGuid.PcdSystemMemorySize
+ gSynQuacerTokenSpaceGuid.PcdPcieEnableMask
[Depex]
gEdkiiEmbeddedGpioPpiGuid
diff --git a/Silicon/Socionext/SynQuacer/SynQuacer.dec b/Silicon/Socionext/SynQuacer/SynQuacer.dec index 2e18cb3334..a21f12b5bc 100644 --- a/Silicon/Socionext/SynQuacer/SynQuacer.dec +++ b/Silicon/Socionext/SynQuacer/SynQuacer.dec @@ -36,6 +36,7 @@ # GPIO pin index [0 .. 31] or MAX_UINT8 for not implemented
gSynQuacerTokenSpaceGuid.PcdClearSettingsGpioPin|0xFF|UINT8|0x00000004
+ gSynQuacerTokenSpaceGuid.PcdPcie0PresenceDetectGpioPin|0xFF|UINT8|0x00000006
gSynQuacerTokenSpaceGuid.PcdI2cReferenceClock|62500000|UINT32|0x00000005
|