This revision can only work with Intel(c) UDK Debugger Tool version 1.2 or greater. Detailed change log is as below:

1. Define the transfer protocol revision mechanism. Increase the revision number to 0.2 and inform user to use the latest one when the HOST software is too old.
   New HOST software will implement logic to handle all other revision mismatch cases.
2. Define new debug message packet to print the debug agent trace information by debug port channel.
3. Add check sum mechanism in the communication protocol between TARGET/HOST.
4. Introduced one "try" mechanism to avoid Debug Agent crashed by some invalid HOST command.
5. Enable the late-attach feature: Change the break in from "!" to "\xFC". Add a new short symbol "\xFA" for attach and a new debug command for detach.
6. Support Terminal work on debug port by install EFI Serial IO protocol upon Debug Communication Library.
7. Enable CPUID feature.
8. Enable the hardware data breakpoint.
9. add handshake to improve usb debug cable identify stability issue.
10.Refine all the communication protocol packet to improve extensibility and debugging performance.
  a. Use 64bit for IO port address.
  b. Add additional Width field to READ_MEMORY/WRITE_MEMORY.
  c. Add SEARCH_SIGNATURE support to speed the symbol finding for late attach.
  d. Remove READ_GROUP register.
  e. Add READ_ALL_REGISTERS support (WinDbg always requests to read all registers).
11.Move AcquireDebugPortControl () in advance to fix resource collision on IpiSentByApFlag.
12.Fix IO break point does not work issue in PEI phase.
13.Avoid BSP/APs collision when they met break point at the same time.
14.Solve a bug of calculating debug handle in sec phase.
15.Use mailbox content at Dxe phase but not clear it and reinitialize again.
16.Fix FP/MMX/XMM/IO/MSR access issue in both Gdb and WinDbg.

Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Signed-off-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13437 6f19259b-4bc3-4df7-8a09-765794883524

6 files changed, 33 insertions, 800 deletions

diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchDebugSupport.c b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchDebugSupport.c
index 3c18b8676f..9803f0f76f 100644
--- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchDebugSupport.c
+++ b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchDebugSupport.c
@@ -1,7 +1,7 @@
 /** @file

-  Supporting functions for x64 architecture.

+  Supporting functions for X64 architecture.

 

-  Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -15,199 +15,6 @@
 #include "DebugAgent.h"

 

 /**

-  Read the offset of FP / MMX / XMM registers by register index.

-

-  @param[in]  Index    Register index.

-  @param[out] Width    Register width returned.

-

-  @return Offset in register address range.

-

-**/

-UINT16

-ArchReadFxStatOffset (

-  IN  UINT8                     Index,

-  OUT UINT8                     *Width

-  )

-{

-  if (Index < SOFT_DEBUGGER_REGISTER_ST0) {

-    switch (Index) {

-    case SOFT_DEBUGGER_REGISTER_FP_FCW:

-      *Width = (UINT8) sizeof (UINT16);

-      return OFFSET_OF(DEBUG_DATA_X64_FX_SAVE_STATE, Fcw);

-

-    case SOFT_DEBUGGER_REGISTER_FP_FSW:

-      *Width = (UINT8) sizeof (UINT16);

-      return OFFSET_OF(DEBUG_DATA_X64_FX_SAVE_STATE, Fsw);

-

-    case SOFT_DEBUGGER_REGISTER_FP_FTW:

-      *Width = (UINT8) sizeof (UINT16);

-      return OFFSET_OF(DEBUG_DATA_X64_FX_SAVE_STATE, Ftw);

-

-    case SOFT_DEBUGGER_REGISTER_FP_OPCODE:

-      *Width = (UINT8) sizeof (UINT16);

-      return OFFSET_OF(DEBUG_DATA_X64_FX_SAVE_STATE, Opcode);

-

-    case SOFT_DEBUGGER_REGISTER_FP_EIP:

-      *Width = (UINT8) sizeof (UINTN);

-      return OFFSET_OF(DEBUG_DATA_X64_FX_SAVE_STATE, Rip);

-

-    case SOFT_DEBUGGER_REGISTER_FP_DATAOFFSET:

-      *Width = (UINT8) sizeof (UINTN);

-      return OFFSET_OF(DEBUG_DATA_X64_FX_SAVE_STATE, DataOffset);

-

-    case SOFT_DEBUGGER_REGISTER_FP_MXCSR:

-      *Width = (UINT8) sizeof (UINT32);

-      return OFFSET_OF(DEBUG_DATA_X64_FX_SAVE_STATE, Mxcsr);

-

-    case SOFT_DEBUGGER_REGISTER_FP_MXCSR_MASK:

-      *Width = (UINT8) sizeof (UINT32);

-      return OFFSET_OF(DEBUG_DATA_X64_FX_SAVE_STATE, Mxcsr_Mask);

-

-    default:

-      return (UINT16) (-1);

-    }

-  }

-

-  if (Index < SOFT_DEBUGGER_REGISTER_XMM0) {

-    *Width = 10;

-  } else if (Index < SOFT_DEBUGGER_REGISTER_MM0 ) {

-    *Width = 16;

-  } else {

-    *Width = 8;

-    Index -= SOFT_DEBUGGER_REGISTER_MM0 - SOFT_DEBUGGER_REGISTER_ST0;

-  }

-

-  return OFFSET_OF(DEBUG_DATA_X64_FX_SAVE_STATE, St0Mm0) + (Index - SOFT_DEBUGGER_REGISTER_ST0) * 16;

-}

-

-/**

-  Write specified register into save CPU context.

-

-  @param[in] CpuContext         Pointer to saved CPU context.

-  @param[in] Index              Register index value.

-  @param[in] Offset             Offset in register address range

-  @param[in] Width              Data width to read.

-  @param[in] RegisterBuffer     Pointer to input buffer with data.

-

-**/

-VOID

-ArchWriteRegisterBuffer (

-  IN DEBUG_CPU_CONTEXT               *CpuContext,

-  IN UINT8                           Index,

-  IN UINT8                           Offset,

-  IN UINT8                           Width,

-  IN UINT8                           *RegisterBuffer

-  )

-{

-  UINT8           *Buffer;

-  if (Index < SOFT_DEBUGGER_REGISTER_FP_BASE) {

-    Buffer = (UINT8 *) CpuContext + sizeof (DEBUG_DATA_X64_FX_SAVE_STATE) + Index * 8;

-  } else {

-    //

-    // If it is MMX register, adjust its index position

-    //

-    if (Index >= SOFT_DEBUGGER_REGISTER_MM0) {

-      Index -= SOFT_DEBUGGER_REGISTER_MM0 - SOFT_DEBUGGER_REGISTER_ST0;

-    }

-

-    //

-    // FPU/MMX/XMM registers

-    //

-    Buffer = (UINT8 *) CpuContext + ArchReadFxStatOffset (Index, &Width);

-  }

-

-  CopyMem (Buffer + Offset, RegisterBuffer, Width);

-}

-

-/**

-  Read register value from saved CPU context.

-

-  @param[in] CpuContext         Pointer to saved CPU context.

-  @param[in] Index              Register index value.

-  @param[in] Offset             Offset in register address range

-  @param[in] Width              Data width to read.

-

-  @return The address of register value.

-

-**/

-UINT8 *

-ArchReadRegisterBuffer (

-  IN DEBUG_CPU_CONTEXT               *CpuContext,

-  IN UINT8                           Index,

-  IN UINT8                           Offset,

-  IN UINT8                           *Width

-  )

-{

-  UINT8           *Buffer;

-

-  if (Index < SOFT_DEBUGGER_REGISTER_FP_BASE) {

-    Buffer = (UINT8 *) CpuContext + sizeof (DEBUG_DATA_X64_FX_SAVE_STATE) + Index * 8;

-    if (*Width == 0) {

-      *Width = (UINT8) sizeof (UINTN);

-    }

-  } else {

-    //

-    // FPU/MMX/XMM registers

-    //

-    Buffer = (UINT8 *) CpuContext + ArchReadFxStatOffset (Index, Width);

-  }

-

-  return Buffer;

-}

-

-/**

-  Read group register of common registers.

-

-  @param[in] CpuContext           Pointer to saved CPU context.

-  @param[in] RegisterGroup        Pointer to Group registers.

-

-**/

-VOID

-ReadRegisterGroup (

-  IN DEBUG_CPU_CONTEXT                       *CpuContext,

-  IN DEBUG_DATA_REPONSE_READ_REGISTER_GROUP  *RegisterGroup

-  )

-{

-  RegisterGroup->Cs     = (UINT16) CpuContext->Cs;

-  RegisterGroup->Ds     = (UINT16) CpuContext->Ds;

-  RegisterGroup->Es     = (UINT16) CpuContext->Es;

-  RegisterGroup->Fs     = (UINT16) CpuContext->Fs;

-  RegisterGroup->Gs     = (UINT16) CpuContext->Gs;

-  RegisterGroup->Ss     = (UINT16) CpuContext->Ss;

-  RegisterGroup->Eflags = (UINT32) CpuContext->Eflags;

-  RegisterGroup->Rbp    = CpuContext->Rbp;

-  RegisterGroup->Eip    = CpuContext->Eip;

-  RegisterGroup->Rsp    = CpuContext->Rsp;

-  RegisterGroup->Eax    = CpuContext->Rax;

-  RegisterGroup->Rbx    = CpuContext->Rbx;

-  RegisterGroup->Rcx    = CpuContext->Rcx;

-  RegisterGroup->Rdx    = CpuContext->Rdx;

-  RegisterGroup->Rsi    = CpuContext->Rsi;

-  RegisterGroup->Rdi    = CpuContext->Rdi;

-  RegisterGroup->R8     = CpuContext->R8;

-  RegisterGroup->R9     = CpuContext->R9;

-  RegisterGroup->R10    = CpuContext->R10;

-  RegisterGroup->R11    = CpuContext->R11;

-  RegisterGroup->R12    = CpuContext->R12;

-  RegisterGroup->R13    = CpuContext->R13;

-  RegisterGroup->R14    = CpuContext->R14;

-  RegisterGroup->R15    = CpuContext->R15;

-  RegisterGroup->Dr0    = CpuContext->Dr0;

-  RegisterGroup->Dr1    = CpuContext->Dr1;

-  RegisterGroup->Dr2    = CpuContext->Dr2;

-  RegisterGroup->Dr3    = CpuContext->Dr3;

-  RegisterGroup->Dr6    = CpuContext->Dr6;

-  RegisterGroup->Dr7    = CpuContext->Dr7;

-  RegisterGroup->Cr0    = CpuContext->Cr0;

-  RegisterGroup->Cr2    = CpuContext->Cr2;

-  RegisterGroup->Cr3    = CpuContext->Cr3;

-  RegisterGroup->Cr4    = CpuContext->Cr4;

-  RegisterGroup->Cr8    = CpuContext->Cr8;

-

-  CopyMem ((UINT8 *) &RegisterGroup->Xmm0[0], (UINT8 *) &CpuContext->FxSaveState.Xmm0[0], 16 * 10);

-}

-

-/**

   Initialize IDT entries to support source level debug.

 

 **/

@@ -252,4 +59,9 @@ InitializeDebugIdt (
   IdtEntry[DEBUG_TIMER_VECTOR].Bits.OffsetUpper     = (UINT32)((UINTN)InterruptHandler >> 32);

   IdtEntry[DEBUG_TIMER_VECTOR].Bits.Selector        = CodeSegment;

   IdtEntry[DEBUG_TIMER_VECTOR].Bits.GateType        = IA32_IDT_GATE_TYPE_INTERRUPT_32;

+

+  //

+  // Set DE flag in CR4 to enable IO breakpoint

+  //

+  AsmWriteCr4 (AsmReadCr4 () | BIT3);

 }

diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchDebugSupport.h b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchDebugSupport.h
index 0b25a78d13..26e6d8a7d9 100644
--- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchDebugSupport.h
+++ b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchDebugSupport.h
@@ -1,7 +1,7 @@
 /** @file

   X64 specific defintions for debug agent library instance.

 

-  Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

@@ -15,17 +15,13 @@
 #ifndef _ARCH_DEBUG_SUPPORT_H_

 #define _ARCH_DEBUG_SUPPORT_H_

 

-#include "ArchRegisters.h"

+#include "ProcessorContext.h"

 #include "TransferProtocol.h"

 

-typedef DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_X64          DEBUG_DATA_REPONSE_READ_REGISTER_GROUP;

-typedef DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGLIM_X64   DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGLIM;

-typedef DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGBASE_X64  DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGBASE;

-

 #define DEBUG_SW_BREAKPOINT_SYMBOL       0xcc

-

 #define DEBUG_ARCH_SYMBOL                DEBUG_DATA_BREAK_CPU_ARCH_X64

 

+typedef DEBUG_DATA_X64_FX_SAVE_STATE     DEBUG_DATA_FX_SAVE_STATE;

 typedef DEBUG_DATA_X64_SYSTEM_CONTEXT    DEBUG_CPU_CONTEXT;

 

 #endif

diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchReadGroupRegister.c b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchReadGroupRegister.c
deleted file mode 100644
index 72d30fcf53..0000000000
--- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchReadGroupRegister.c
+++ /dev/null
@@ -1,259 +0,0 @@
-/** @file

-  x64 Group registers read support functions.

-

-  Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>

-  This program and the accompanying materials

-  are licensed and made available under the terms and conditions of the BSD License

-  which accompanies this distribution.  The full text of the license may be found at

-  http://opensource.org/licenses/bsd-license.php.

-

-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

-

-**/

-

-#include "DebugAgent.h"

-

-/**

-  Read segment selector by register index.

-

-  @param[in] CpuContext           Pointer to saved CPU context.

-  @param[in] RegisterIndex        Register Index.

-

-  @return Value of segment selector.

-

-**/

-UINT64

-ReadRegisterSelectorByIndex (

-  IN DEBUG_CPU_CONTEXT                       *CpuContext,

-  IN UINT8                                   RegisterIndex

-  )

-{

-  IA32_DESCRIPTOR               *Ia32Descriptor;

-  IA32_GDT                      *Ia32Gdt;

-  UINT16                        Selector;

-  UINT32                        Data32;

-

-  Ia32Descriptor = (IA32_DESCRIPTOR *) CpuContext->Gdtr;

-  Ia32Gdt = (IA32_GDT *) (Ia32Descriptor->Base);

-

-  Selector = 0;

-

-  switch (RegisterIndex) {

-  case SOFT_DEBUGGER_REGISTER_CSAS:

-    Selector = (UINT16) CpuContext->Cs;

-    break;

-  case SOFT_DEBUGGER_REGISTER_SSAS:

-    Selector = (UINT16) CpuContext->Ss;

-    break;

-  case SOFT_DEBUGGER_REGISTER_GSAS:

-    Selector = (UINT16) CpuContext->Gs;

-    break;

-  case SOFT_DEBUGGER_REGISTER_FSAS:

-    Selector = (UINT16) CpuContext->Fs;

-    break;

-  case SOFT_DEBUGGER_REGISTER_ESAS:

-    Selector = (UINT16) CpuContext->Es;

-    break;

-  case SOFT_DEBUGGER_REGISTER_DSAS:

-    Selector = (UINT16) CpuContext->Ds;

-  case SOFT_DEBUGGER_REGISTER_LDTAS:

-  case SOFT_DEBUGGER_REGISTER_TSSAS:

-    return 0x00820000;

-    break;

-  }

-

-  Data32 = (UINT32) RShiftU64 (Ia32Gdt[Selector / 8].Uint64, 24);

-  return (Data32 & (UINT32)(~0xff)) | Selector;

-

-}

-

-/**

-  Read group register of Segment Base.

-

-  @param[in] CpuContext           Pointer to saved CPU context.

-  @param[in] RegisterGroupSegBase Pointer to Group registers.

-

-**/

-VOID

-ReadRegisterGroupSegBase (

-  IN DEBUG_CPU_CONTEXT                              *CpuContext,

-  IN DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGBASE *RegisterGroupSegBase

-  )

-{

-  IA32_DESCRIPTOR               *Ia32Descriptor;

-  IA32_GDT                      *Ia32Gdt;

-  UINTN                         Index;

-

-  Ia32Descriptor = (IA32_DESCRIPTOR *) CpuContext->Gdtr;

-  Ia32Gdt = (IA32_GDT *) (Ia32Descriptor->Base);

-

-  Index = CpuContext->Cs / 8;

-  RegisterGroupSegBase->CsBas = (Ia32Gdt[Index].Bits.BaseLow) + (Ia32Gdt[Index].Bits.BaseMid << 16) + (Ia32Gdt[Index].Bits.BaseMid << 24);

-  Index = CpuContext->Ss / 8;

-  RegisterGroupSegBase->SsBas = (Ia32Gdt[Index].Bits.BaseLow) + (Ia32Gdt[Index].Bits.BaseMid << 16) + (Ia32Gdt[Index].Bits.BaseMid << 24);

-  Index = CpuContext->Gs / 8;

-  RegisterGroupSegBase->GsBas = (Ia32Gdt[Index].Bits.BaseLow) + (Ia32Gdt[Index].Bits.BaseMid << 16) + (Ia32Gdt[Index].Bits.BaseMid << 24);

-  Index = CpuContext->Fs / 8;

-  RegisterGroupSegBase->FsBas = (Ia32Gdt[Index].Bits.BaseLow) + (Ia32Gdt[Index].Bits.BaseMid << 16) + (Ia32Gdt[Index].Bits.BaseMid << 24);

-  Index = CpuContext->Es / 8;

-  RegisterGroupSegBase->EsBas = (Ia32Gdt[Index].Bits.BaseLow) + (Ia32Gdt[Index].Bits.BaseMid << 16) + (Ia32Gdt[Index].Bits.BaseMid << 24);

-  Index = CpuContext->Ds / 8;

-  RegisterGroupSegBase->DsBas = (Ia32Gdt[Index].Bits.BaseLow) + (Ia32Gdt[Index].Bits.BaseMid << 16) + (Ia32Gdt[Index].Bits.BaseMid << 24);

-

-  RegisterGroupSegBase->LdtBas = 0;

-  RegisterGroupSegBase->TssBas = 0;

-}

-

-/**

-  Read group register of Segment Limit.

-

-  @param[in] CpuContext           Pointer to saved CPU context.

-  @param[in] RegisterGroupSegLim  Pointer to Group registers.

-

-**/

-VOID

-ReadRegisterGroupSegLim (

-  IN DEBUG_CPU_CONTEXT                             *CpuContext,

-  IN DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGLIM *RegisterGroupSegLim

-  )

-{

-  IA32_DESCRIPTOR               *Ia32Descriptor;

-  IA32_GDT                      *Ia32Gdt;

-  UINTN                         Index;

-

-  Ia32Descriptor = (IA32_DESCRIPTOR *) CpuContext->Gdtr;

-  Ia32Gdt = (IA32_GDT *) (Ia32Descriptor->Base);

-

-  Index = CpuContext->Cs / 8;

-  RegisterGroupSegLim->CsLim = Ia32Gdt[Index].Bits.LimitLow + (Ia32Gdt[Index].Bits.LimitHigh << 16);

-  if (Ia32Gdt[Index].Bits.Granularity == 1) {

-    RegisterGroupSegLim->CsLim = (RegisterGroupSegLim->CsLim << 12) | 0xfff;

-  }

-

-  Index = CpuContext->Ss / 8;

-  RegisterGroupSegLim->SsLim = Ia32Gdt[Index].Bits.LimitLow + (Ia32Gdt[Index].Bits.LimitHigh << 16);

-  if (Ia32Gdt[Index].Bits.Granularity == 1) {

-    RegisterGroupSegLim->SsLim = (RegisterGroupSegLim->SsLim << 12) | 0xfff;

-  }

-

-  Index = CpuContext->Gs / 8;

-  RegisterGroupSegLim->GsLim = Ia32Gdt[Index].Bits.LimitLow + (Ia32Gdt[Index].Bits.LimitHigh << 16);

-  if (Ia32Gdt[Index].Bits.Granularity == 1) {

-    RegisterGroupSegLim->GsLim = (RegisterGroupSegLim->GsLim << 12) | 0xfff;

-  }

-

-  Index = CpuContext->Fs / 8;

-  RegisterGroupSegLim->FsLim = Ia32Gdt[Index].Bits.LimitLow + (Ia32Gdt[Index].Bits.LimitHigh << 16);

-  if (Ia32Gdt[Index].Bits.Granularity == 1) {

-    RegisterGroupSegLim->FsLim = (RegisterGroupSegLim->FsLim << 12) | 0xfff;

-  }

-

-  Index = CpuContext->Es / 8;

-  RegisterGroupSegLim->EsLim = Ia32Gdt[Index].Bits.LimitLow + (Ia32Gdt[Index].Bits.LimitHigh << 16);

-  if (Ia32Gdt[Index].Bits.Granularity == 1) {

-    RegisterGroupSegLim->EsLim = (RegisterGroupSegLim->EsLim << 12) | 0xfff;

-  }

-

-  Index = CpuContext->Ds / 8;

-  RegisterGroupSegLim->DsLim = Ia32Gdt[Index].Bits.LimitLow + (Ia32Gdt[Index].Bits.LimitHigh << 16);

-  if (Ia32Gdt[Index].Bits.Granularity == 1) {

-    RegisterGroupSegLim->DsLim = (RegisterGroupSegLim->DsLim << 12) | 0xfff;

-  }

-

-  RegisterGroupSegLim->LdtLim = 0xffff;

-  RegisterGroupSegLim->TssLim = 0xffff;

-}

-

-/**

-  Read group register by group index.

-

-  @param[in] CpuContext           Pointer to saved CPU context.

-  @param[in] GroupIndex           Group Index.

-

-  @retval RETURN_SUCCESS         Read successfully.

-  @retval RETURN_NOT_SUPPORTED   Group index cannot be supported.

-

-**/

-RETURN_STATUS

-ArchReadRegisterGroup (

-  IN DEBUG_CPU_CONTEXT                             *CpuContext,

-  IN UINT8                                         GroupIndex

-  )

-{

-  UINTN                                                    DataN;

-  DEBUG_DATA_REPONSE_READ_REGISTER_GROUP                   RegisterGroup;

-  DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGMENT_BAS_LIM   RegisterGroupBasLim;

-  DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGMENT_BASES_X64 RegisterGroupBases64;

-

-  switch (GroupIndex) {

-  case SOFT_DEBUGGER_REGISTER_GROUP_SEGMENT64:

-    ReadRegisterGroup (CpuContext, &RegisterGroup);

-    SendDataResponsePacket (CpuContext, (UINT8 *) &RegisterGroup, (UINT16) sizeof (DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGMENT));

-    break;

-

-  case SOFT_DEBUGGER_REGISTER_GROUP_SEGMENT_BAS_LIM64:

-    DataN = (UINTN) (CpuContext->Idtr[0] & 0xffff);

-    RegisterGroupBasLim.IdtLim = DataN;

-    DataN = (UINTN) (CpuContext->Gdtr[0] & 0xffff);

-    RegisterGroupBasLim.GdtLim = DataN;

-    DataN = (UINTN) RShiftU64 (CpuContext->Idtr[0], 16);

-    DataN |= (UINTN) LShiftU64 (CpuContext->Idtr[1], sizeof (UINTN) * 8 - 16);

-    RegisterGroupBasLim.IdtBas = DataN;

-    DataN = (UINTN) RShiftU64 (CpuContext->Gdtr[0], 16);

-    DataN |= (UINTN) LShiftU64 (CpuContext->Gdtr[1], sizeof (UINTN) * 8 - 16);

-    RegisterGroupBasLim.GdtBas = DataN;

-

-    ReadRegisterGroupSegLim (CpuContext, (DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGLIM *) &RegisterGroupBasLim.CsLim);

-    ReadRegisterGroupSegBase (CpuContext, (DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGBASE *) &RegisterGroupBasLim.CsBas);

-

-    SendDataResponsePacket (CpuContext, (UINT8 *) &RegisterGroupBasLim, (UINT16) sizeof (DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGMENT_BAS_LIM));

-    break;

-

-  case SOFT_DEBUGGER_REGISTER_GROUP_GP2_64:

-    ReadRegisterGroup (CpuContext, &RegisterGroup);

-    SendDataResponsePacket (CpuContext, (UINT8 *) &RegisterGroup.Eflags, (UINT16) sizeof (DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_GP2));

-    break;

-

-  case SOFT_DEBUGGER_REGISTER_GROUP_GP64:

-    ReadRegisterGroup (CpuContext, &RegisterGroup);

-    SendDataResponsePacket (CpuContext, (UINT8 *) &RegisterGroup.Eax, (UINT16) sizeof (DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_GP));

-    break;

-

-  case SOFT_DEBUGGER_REGISTER_GROUP_DR64:

-    ReadRegisterGroup (CpuContext, &RegisterGroup);

-    SendDataResponsePacket (CpuContext, (UINT8 *) &RegisterGroup.Dr0, (UINT16) sizeof (DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_DR));

-    break;

-

-  case SOFT_DEBUGGER_REGISTER_GROUP_SEGMENT_BASES64:

-    RegisterGroupBases64.Ldtr = (UINT16) CpuContext->Ldtr;

-    RegisterGroupBases64.Tr   = (UINT16) CpuContext->Tr;

-

-    RegisterGroupBases64.Csas = ReadRegisterSelectorByIndex (CpuContext, SOFT_DEBUGGER_REGISTER_CSAS);

-    RegisterGroupBases64.Ssas = ReadRegisterSelectorByIndex (CpuContext, SOFT_DEBUGGER_REGISTER_SSAS);

-    RegisterGroupBases64.Gsas = ReadRegisterSelectorByIndex (CpuContext, SOFT_DEBUGGER_REGISTER_GSAS);

-    RegisterGroupBases64.Fsas = ReadRegisterSelectorByIndex (CpuContext, SOFT_DEBUGGER_REGISTER_FSAS);

-    RegisterGroupBases64.Esas = ReadRegisterSelectorByIndex (CpuContext, SOFT_DEBUGGER_REGISTER_ESAS);

-    RegisterGroupBases64.Dsas = ReadRegisterSelectorByIndex (CpuContext, SOFT_DEBUGGER_REGISTER_DSAS);

-    RegisterGroupBases64.Ldtas = ReadRegisterSelectorByIndex (CpuContext, SOFT_DEBUGGER_REGISTER_LDTAS);

-    RegisterGroupBases64.Tssas = ReadRegisterSelectorByIndex (CpuContext, SOFT_DEBUGGER_REGISTER_TSSAS);

-

-    SendDataResponsePacket (CpuContext, (UINT8 *) &RegisterGroupBases64, (UINT16) sizeof (DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGMENT_BASES_X64));

-    break;

-

-  case SOFT_DEBUGGER_REGISTER_GROUP_CR64:

-    ReadRegisterGroup (CpuContext, &RegisterGroup);

-    SendDataResponsePacket (CpuContext, (UINT8 *) &RegisterGroup.Dr7 + 8, (UINT16) sizeof (DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_CR));

-    break;

-

-  case SOFT_DEBUGGER_REGISTER_GROUP_XMM64:

-    ReadRegisterGroup (CpuContext, &RegisterGroup);

-    SendDataResponsePacket (CpuContext, (UINT8 *) &RegisterGroup.Dr7 + 8 * 6, (UINT16) sizeof (DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_XMM));

-    break;

-

-  default:

-    return RETURN_UNSUPPORTED;

-  }

-

-  return RETURN_SUCCESS;

-}

diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchRegisters.h b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchRegisters.h
deleted file mode 100644
index 9675391956..0000000000
--- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/ArchRegisters.h
+++ /dev/null
@@ -1,332 +0,0 @@
-/** @file

-  X64 register defintions needed by debug transfer protocol.

-

-  Copyright (c) 2010 - 2011, Intel Corporation. All rights reserved.<BR>

-  This program and the accompanying materials

-  are licensed and made available under the terms and conditions of the BSD License

-  which accompanies this distribution.  The full text of the license may be found at

-  http://opensource.org/licenses/bsd-license.php.

-

-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

-

-**/

-

-#ifndef _ARCH_REGISTERS_H_

-#define _ARCH_REGISTERS_H_

-

-#pragma pack(1)

-

-///

-/// FXSAVE_STATE (promoted operation)

-/// FP / MMX / XMM registers (see fxrstor instruction definition)

-///

-typedef struct {

-  UINT16  Fcw;

-  UINT16  Fsw;

-  UINT16  Ftw;

-  UINT16  Opcode;

-  UINT64  Rip;

-  UINT64  DataOffset;

-  UINT32  Mxcsr;

-  UINT32  Mxcsr_Mask;

-  UINT8   St0Mm0[10];

-  UINT8   Reserved2[6];

-  UINT8   St1Mm1[10];

-  UINT8   Reserved3[6];

-  UINT8   St2Mm2[10];

-  UINT8   Reserved4[6];

-  UINT8   St3Mm3[10];

-  UINT8   Reserved5[6];

-  UINT8   St4Mm4[10];

-  UINT8   Reserved6[6];

-  UINT8   St5Mm5[10];

-  UINT8   Reserved7[6];

-  UINT8   St6Mm6[10];

-  UINT8   Reserved8[6];

-  UINT8   St7Mm7[10];

-  UINT8   Reserved9[6];

-  UINT8   Xmm0[16];

-  UINT8   Xmm1[16];

-  UINT8   Xmm2[16];

-  UINT8   Xmm3[16];

-  UINT8   Xmm4[16];

-  UINT8   Xmm5[16];

-  UINT8   Xmm6[16];

-  UINT8   Xmm7[16];

-  UINT8   Xmm8[16];

-  UINT8   Xmm9[16];

-  UINT8   Xmm10[16];

-  UINT8   Xmm11[16];

-  UINT8   Xmm12[16];

-  UINT8   Xmm13[16];

-  UINT8   Xmm14[16];

-  UINT8   Xmm15[16];

-  UINT8   Reserved11[6 * 16];

-} DEBUG_DATA_X64_FX_SAVE_STATE;

-

-///

-///  x64 processor context definition

-///

-typedef struct {

-  DEBUG_DATA_X64_FX_SAVE_STATE   FxSaveState;

-  UINT64                         Dr0;

-  UINT64                         Dr1;

-  UINT64                         Dr2;

-  UINT64                         Dr3;

-  UINT64                         Dr6;

-  UINT64                         Dr7;

-  UINT64                         Eflags;

-  UINT64                         Ldtr;

-  UINT64                         Tr;

-  UINT64                         Gdtr[2];

-  UINT64                         Idtr[2];

-  UINT64                         Eip;

-  UINT64                         Gs;

-  UINT64                         Fs;

-  UINT64                         Es;

-  UINT64                         Ds;

-  UINT64                         Cs;

-  UINT64                         Ss;

-  UINT64                         Cr0;

-  UINT64                         Cr1;  /* Reserved */

-  UINT64                         Cr2;

-  UINT64                         Cr3;

-  UINT64                         Cr4;

-  UINT64                         Rdi;

-  UINT64                         Rsi;

-  UINT64                         Rbp;

-  UINT64                         Rsp;

-  UINT64                         Rdx;

-  UINT64                         Rcx;

-  UINT64                         Rbx;

-  UINT64                         Rax;

-  UINT64                         Cr8;

-  UINT64                         R8;

-  UINT64                         R9;

-  UINT64                         R10;

-  UINT64                         R11;

-  UINT64                         R12;

-  UINT64                         R13;

-  UINT64                         R14;

-  UINT64                         R15;

-} DEBUG_DATA_X64_SYSTEM_CONTEXT;

-

-

-///

-///  x64 GROUP register

-///

-typedef struct {

-  UINT16         Cs;

-  UINT16         Ds;

-  UINT16         Es;

-  UINT16         Fs;

-  UINT16         Gs;

-  UINT16         Ss;

-  UINT32         Eflags;

-  UINT64         Rbp;

-  UINT64         Eip;

-  UINT64         Rsp;

-  UINT64         Eax;

-  UINT64         Rbx;

-  UINT64         Rcx;

-  UINT64         Rdx;

-  UINT64         Rsi;

-  UINT64         Rdi;

-  UINT64         R8;

-  UINT64         R9;

-  UINT64         R10;

-  UINT64         R11;

-  UINT64         R12;

-  UINT64         R13;

-  UINT64         R14;

-  UINT64         R15;

-  UINT64         Dr0;

-  UINT64         Dr1;

-  UINT64         Dr2;

-  UINT64         Dr3;

-  UINT64         Dr6;

-  UINT64         Dr7;

-  UINT64         Cr0;

-  UINT64         Cr2;

-  UINT64         Cr3;

-  UINT64         Cr4;

-  UINT64         Cr8;

-  UINT8          Xmm0[16];

-  UINT8          Xmm1[16];

-  UINT8          Xmm2[16];

-  UINT8          Xmm3[16];

-  UINT8          Xmm4[16];

-  UINT8          Xmm5[16];

-  UINT8          Xmm6[16];

-  UINT8          Xmm7[16];

-  UINT8          Xmm8[16];

-  UINT8          Xmm9[16];

-  UINT8          Xmm10[16];

-  UINT8          Xmm11[16];

-  UINT8          Xmm12[16];

-  UINT8          Xmm13[16];

-  UINT8          Xmm14[16];

-  UINT8          Xmm15[16];

-} DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_X64;

-

-///

-///  x64 Segment Limit GROUP register

-///

-typedef struct {

-  UINT64         CsLim;

-  UINT64         SsLim;

-  UINT64         GsLim;

-  UINT64         FsLim;

-  UINT64         EsLim;

-  UINT64         DsLim;

-  UINT64         LdtLim;

-  UINT64         TssLim;

-} DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGLIM_X64;

-

-///

-///  x64 Segment Base GROUP register

-///

-typedef struct {

-  UINT64         CsBas;

-  UINT64         SsBas;

-  UINT64         GsBas;

-  UINT64         FsBas;

-  UINT64         EsBas;

-  UINT64         DsBas;

-  UINT64         LdtBas;

-  UINT64         TssBas;

-} DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGBASE_X64;

-

-///

-///  x64 Segment Base/Limit GROUP register

-///

-typedef struct {

-  UINT64         IdtBas;

-  UINT64         IdtLim;

-  UINT64         GdtBas;

-  UINT64         GdtLim;

-  UINT64         CsLim;

-  UINT64         SsLim;

-  UINT64         GsLim;

-  UINT64         FsLim;

-  UINT64         EsLim;

-  UINT64         DsLim;

-  UINT64         LdtLim;

-  UINT64         TssLim;

-  UINT64         CsBas;

-  UINT64         SsBas;

-  UINT64         GsBas;

-  UINT64         FsBas;

-  UINT64         EsBas;

-  UINT64         DsBas;

-  UINT64         LdtBas;

-  UINT64         TssBas;

-} DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGMENT_BAS_LIM;

-

-///

-///  x64 register GROUP register

-///

-typedef struct {

-  UINT32         Eflags;

-  UINT64         Rbp;

-  UINT64         Eip;

-  UINT64         Rsp;

-} DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_GP2;

-

-///

-///  x64 general register GROUP register

-///

-typedef struct {

-  UINT64         Eax;

-  UINT64         Rbx;

-  UINT64         Rcx;

-  UINT64         Rdx;

-  UINT64         Rsi;

-  UINT64         Rdi;

-  UINT64         R8;

-  UINT64         R9;

-  UINT64         R10;

-  UINT64         R11;

-  UINT64         R12;

-  UINT64         R13;

-  UINT64         R14;

-  UINT64         R15;

-} DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_GP;

-

-///

-///  x64 Segment GROUP register

-///

-typedef struct {

-  UINT16         Cs;

-  UINT16         Ds;

-  UINT16         Es;

-  UINT16         Fs;

-  UINT16         Gs;

-  UINT16         Ss;

-} DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGMENT;

-

-///

-///  x64 Debug Register GROUP register

-///

-typedef struct {

-  UINT64         Dr0;

-  UINT64         Dr1;

-  UINT64         Dr2;

-  UINT64         Dr3;

-  UINT64         Dr6;

-  UINT64         Dr7;

-} DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_DR;

-

-///

-///  x64 Control Register GROUP register

-///

-typedef struct {

-  UINT64         Cr0;

-  UINT64         Cr2;

-  UINT64         Cr3;

-  UINT64         Cr4;

-  UINT64         Cr8;

-} DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_CR;

-

-///

-///  x64 XMM Register GROUP register

-///

-typedef struct {

-  UINT8          Xmm0[16];

-  UINT8          Xmm1[16];

-  UINT8          Xmm2[16];

-  UINT8          Xmm3[16];

-  UINT8          Xmm4[16];

-  UINT8          Xmm5[16];

-  UINT8          Xmm6[16];

-  UINT8          Xmm7[16];

-  UINT8          Xmm8[16];

-  UINT8          Xmm9[16];

-  UINT8          Xmm10[16];

-  UINT8          Xmm11[16];

-  UINT8          Xmm12[16];

-  UINT8          Xmm13[16];

-  UINT8          Xmm14[16];

-  UINT8          Xmm15[16];

-} DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_XMM;

-

-///

-///  x64 Segment Base GROUP register

-///

-typedef struct {

-  UINT16         Ldtr;

-  UINT16         Tr;

-  UINT64         Csas;

-  UINT64         Ssas;

-  UINT64         Gsas;

-  UINT64         Fsas;

-  UINT64         Esas;

-  UINT64         Dsas;

-  UINT64         Ldtas;

-  UINT64         Tssas;

-} DEBUG_DATA_REPONSE_READ_REGISTER_GROUP_SEGMENT_BASES_X64;

-

-#pragma pack()

-

-#endif

diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/AsmFuncs.S b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/AsmFuncs.S
index 0d78e7d774..3de9767dba 100644
--- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/AsmFuncs.S
+++ b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/AsmFuncs.S
@@ -1,6 +1,6 @@
 #------------------------------------------------------------------------------

 #

-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>

+# Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>

 # This program and the accompanying materials

 # are licensed and made available under the terms and conditions of the BSD License

 # which accompanies this distribution.  The full text of the license may be found at

@@ -302,6 +302,9 @@ NoExtrPush:
    movq    %rsp, %rdi

    .byte   0x0f, 0xae, 0b00000111

 

+## save the exception data;

+   pushq   16(%rbp)

+

 ## Clear Direction Flag

   cld

 

@@ -313,9 +316,12 @@ NoExtrPush:
   # Per X64 calling convention, allocate maximum parameter stack space

   # and make sure RSP is 16-byte aligned

   #

-   subq    $(4 * 8), %rsp

+   subq    $(32 + 8), %rsp

    call    ASM_PFX(InterruptProcess)

-   addq    $(4 * 8), %rsp

+   addq    $(32 + 8), %rsp

+

+## skip the exception data;

+   addq    $8, %rsp

 

 ## FX_SAVE_STATE_X64 FxSaveState;

 

diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/AsmFuncs.asm b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/AsmFuncs.asm
index b712c428c8..16d73a4121 100644
--- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/AsmFuncs.asm
+++ b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/X64/AsmFuncs.asm
@@ -1,6 +1,6 @@
 ;------------------------------------------------------------------------------

 ;

-; Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>

+; Copyright (c) 2010 - 2012, Intel Corporation. All rights reserved.<BR>

 ; This program and the accompanying materials

 ; are licensed and made available under the terms and conditions of the BSD License

 ; which accompanies this distribution.  The full text of the license may be found at

@@ -263,9 +263,12 @@ NoExtrPush:
     push    rax

 

     sub     rsp, 512

-    mov rdi, rsp

+    mov     rdi, rsp

     db 0fh, 0aeh, 00000111y ;fxsave [rdi]

 

+    ;; save the exception data

+    push    qword ptr [rbp + 16]

+

     ;; Clear Direction Flag

     cld

 	

@@ -273,9 +276,16 @@ NoExtrPush:
     mov     rdx, rsp      ; Structure

     mov     r15, rcx      ; save vector in r15

     

-    sub     rsp, 32

+    ;

+    ; Per X64 calling convention, allocate maximum parameter stack space

+    ; and make sure RSP is 16-byte aligned

+    ;

+    sub     rsp, 32 + 8

     call    InterruptProcess

-    add     rsp, 32

+    add     rsp, 32 + 8

+

+    ;; skip the exception data

+    add     rsp, 8

     

     mov     rsi, rsp

     db 0fh, 0aeh, 00001110y ; fxrstor [rsi]