UefiCpuPkg/CpuMpPei: Load GDT table on BSP

Load new GDT table and update segment accordingly.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17988 6f19259b-4bc3-4df7-8a09-765794883524

3 files changed, 126 insertions, 0 deletions

diff --git a/UefiCpuPkg/CpuMpPei/X64/MpEqu.inc b/UefiCpuPkg/CpuMpPei/X64/MpEqu.inc
new file mode 100644
index 0000000000..f59b2c4969
--- /dev/null
+++ b/UefiCpuPkg/CpuMpPei/X64/MpEqu.inc
@@ -0,0 +1,25 @@
+;------------------------------------------------------------------------------ ;
+; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+;   MpEqu.inc
+; 
+; Abstract:
+; 
+;   This is the equates file for Multiple Processor support
+;
+;-------------------------------------------------------------------------------
+
+LONG_MODE_CS                  equ        38h
+LONG_MODE_DS                  equ        30h
+
+
+
diff --git a/UefiCpuPkg/CpuMpPei/X64/MpFuncs.asm b/UefiCpuPkg/CpuMpPei/X64/MpFuncs.asm
new file mode 100644
index 0000000000..13a7b5f430
--- /dev/null
+++ b/UefiCpuPkg/CpuMpPei/X64/MpFuncs.asm
@@ -0,0 +1,51 @@
+;------------------------------------------------------------------------------ ;
+; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+;   MpFuncs32.asm
+;
+; Abstract:
+;
+;   This is the assembly code for MP support
+;
+;-------------------------------------------------------------------------------
+
+include  MpEqu.inc
+.code
+
+
+AsmInitializeGdt   PROC
+    push       rbp
+    mov        rbp, rsp
+
+    lgdt       fword PTR [rcx]  ; update the GDTR
+
+    sub        rsp, 0x10
+    lea        rax, SetCodeSelectorFarJump
+    mov        [rsp], rax
+    mov        rdx, LONG_MODE_CS
+    mov        [rsp + 4], dx    ; get new CS
+    jmp        fword ptr [rsp]
+SetCodeSelectorFarJump:
+    add        rsp, 0x10
+
+    mov        rax, LONG_MODE_DS          ; get new DS
+    mov        ds, ax
+    mov        es, ax
+    mov        fs, ax
+    mov        gs, ax
+    mov        ss, ax
+
+    pop        rbp
+    ret
+AsmInitializeGdt  ENDP
+
+END
diff --git a/UefiCpuPkg/CpuMpPei/X64/MpFuncs.nasm b/UefiCpuPkg/CpuMpPei/X64/MpFuncs.nasm
new file mode 100644
index 0000000000..bd595724c2
--- /dev/null
+++ b/UefiCpuPkg/CpuMpPei/X64/MpFuncs.nasm
@@ -0,0 +1,50 @@
+;------------------------------------------------------------------------------ ;
+; Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+;   MpFuncs.nasm
+;
+; Abstract:
+;
+;   This is the assembly code for MP support
+;
+;-------------------------------------------------------------------------------
+
+%include "MpEqu.inc"
+DEFAULT REL
+SECTION .text
+
+global ASM_PFX(AsmInitializeGdt)
+ASM_PFX(AsmInitializeGdt):
+    push       rbp
+    mov        rbp, rsp
+
+    lgdt       [rcx]  ; update the GDTR
+
+    sub        rsp, 0x10
+    mov        rax, ASM_PFX(SetCodeSelectorFarJump)
+    mov        [rsp], rax
+    mov        rdx, LONG_MODE_CS
+    mov        [rsp + 4], dx    ; get new CS
+    jmp        far dword [rsp]  ; far jump with new CS
+ASM_PFX(SetCodeSelectorFarJump):
+    add        rsp, 0x10
+
+    mov        rax, LONG_MODE_DS          ; get new DS
+    mov        ds, ax
+    mov        es, ax
+    mov        fs, ax
+    mov        gs, ax
+    mov        ss, ax
+
+    pop        rbp
+
+  ret