diff options
author | Jeff Fan <jeff.fan@intel.com> | 2016-09-06 18:47:34 +0800 |
---|---|---|
committer | Jeff Fan <jeff.fan@intel.com> | 2016-09-08 09:17:16 +0800 |
commit | a6b7bc3c2f967792c4accc9c73f1bc3b24279bd7 (patch) | |
tree | 3244573a2294327771cc71ecfbe9fbec6ac1b0c9 /UefiCpuPkg/Include/Register/Msr | |
parent | 800a651d6d3e0571fdc77ae9d2072243fafaeefb (diff) | |
download | edk2-platforms-a6b7bc3c2f967792c4accc9c73f1bc3b24279bd7.tar.xz |
UefiCpuPkg/BroadwellMsr.h: add MSR reference from SDM in comment
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Diffstat (limited to 'UefiCpuPkg/Include/Register/Msr')
-rw-r--r-- | UefiCpuPkg/Include/Register/Msr/BroadwellMsr.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/UefiCpuPkg/Include/Register/Msr/BroadwellMsr.h b/UefiCpuPkg/Include/Register/Msr/BroadwellMsr.h index 69c404eccd..067368560b 100644 --- a/UefiCpuPkg/Include/Register/Msr/BroadwellMsr.h +++ b/UefiCpuPkg/Include/Register/Msr/BroadwellMsr.h @@ -43,6 +43,7 @@ Msr.Uint64 = AsmReadMsr64 (MSR_BROADWELL_IA32_PERF_GLOBAL_STAUS);
AsmWriteMsr64 (MSR_BROADWELL_IA32_PERF_GLOBAL_STAUS, Msr.Uint64);
@endcode
+ @note MSR_BROADWELL_IA32_PERF_GLOBAL_STAUS is defined as IA32_PERF_GLOBAL_STAUS in SDM.
**/
#define MSR_BROADWELL_IA32_PERF_GLOBAL_STAUS 0x0000038E
@@ -128,6 +129,7 @@ typedef union { Msr.Uint64 = AsmReadMsr64 (MSR_BROADWELL_PKG_CST_CONFIG_CONTROL);
AsmWriteMsr64 (MSR_BROADWELL_PKG_CST_CONFIG_CONTROL, Msr.Uint64);
@endcode
+ @note MSR_BROADWELL_PKG_CST_CONFIG_CONTROL is defined as MSR_PKG_CST_CONFIG_CONTROL in SDM.
**/
#define MSR_BROADWELL_PKG_CST_CONFIG_CONTROL 0x000000E2
@@ -213,6 +215,7 @@ typedef union { Msr.Uint64 = AsmReadMsr64 (MSR_BROADWELL_TURBO_RATIO_LIMIT);
@endcode
+ @note MSR_BROADWELL_TURBO_RATIO_LIMIT is defined as MSR_TURBO_RATIO_LIMIT in SDM.
**/
#define MSR_BROADWELL_TURBO_RATIO_LIMIT 0x000001AD
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