diff options
| author | Yao, Jiewen <jiewen.yao@intel.com> | 2015-11-30 19:57:45 +0000 |
|---|---|---|
| committer | lersek <lersek@Edk2> | 2015-11-30 19:57:45 +0000 |
| commit | 53ba3fb8aaf91df4a65244480deb6fa60968c146 (patch) | |
| tree | 88fcdb7992f9d50dd1d46189e6c93491549e4a5d /UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm | |
| parent | 881520ea6778953c57d975ca2a9cf3f2114f99c4 (diff) | |
| download | edk2-platforms-53ba3fb8aaf91df4a65244480deb6fa60968c146.tar.xz | |
UefiCpuPkg/PiSmmCpu: Always set WP in CR0
So that we can use write-protection for code later.
It is REPOST.
It includes suggestion from Michael Kinney <michael.d.kinney@intel.com>:
- "For IA32 assembly, can we combine into a single OR instruction that
sets both page enable and WP?"
- "For X64, does it make sense to use single OR instruction instead of 2
BTS instructions as well?"
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Suggested-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Cc: "Fan, Jeff" <jeff.fan@intel.com>
Cc: "Kinney, Michael D" <michael.d.kinney@intel.com>
Cc: "Laszlo Ersek" <lersek@redhat.com>
Cc: "Paolo Bonzini" <pbonzini@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19068 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm')
| -rw-r--r-- | UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm index 8a12927300..ac1a9b48dd 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm @@ -129,7 +129,7 @@ gSmiCr3 DD ? @@: ; as cr4.PGE is not set here, refresh cr3
mov cr4, eax ; in PreModifyMtrrs() to flush TLB.
mov ebx, cr0
- or ebx, 080000000h ; enable paging
+ or ebx, 080010000h ; enable paging + WP
mov cr0, ebx
lea ebx, [edi + DSC_OFFSET]
mov ax, [ebx + DSC_DS]
|