diff options
| author | andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-07-22 19:22:34 +0000 |
|---|---|---|
| committer | andrewfish <andrewfish@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-07-22 19:22:34 +0000 |
| commit | 5fc3b5d6c8f3f23823069f060e8ffc8f80bccdf7 (patch) | |
| tree | eea72342052d6a03beb207bc579884b008f531eb /UnixPkg/Library/UnixBaseLib/X64/EnableCache.asm | |
| parent | 7119d96a6fdd28b2e215b20f97996193ca871a57 (diff) | |
| download | edk2-platforms-5fc3b5d6c8f3f23823069f060e8ffc8f80bccdf7.tar.xz | |
Added to support X64 port (with SV5 ABI). May be able to remove after we port everything, but Sec, to EFI X64 ABI.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10683 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'UnixPkg/Library/UnixBaseLib/X64/EnableCache.asm')
| -rw-r--r-- | UnixPkg/Library/UnixBaseLib/X64/EnableCache.asm | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/UnixPkg/Library/UnixBaseLib/X64/EnableCache.asm b/UnixPkg/Library/UnixBaseLib/X64/EnableCache.asm new file mode 100644 index 0000000000..88b71d706f --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/EnableCache.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableCache.Asm
+;
+; Abstract:
+;
+; Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
+; the NW bit of CR0 to 0
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmEnableCache (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmEnableCache PROC
+ wbinvd
+ mov rax, cr0
+ btr rax, 29
+ btr rax, 30
+ mov cr0, rax
+ ret
+AsmEnableCache ENDP
+
+ END
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