diff options
-rw-r--r-- | MdePkg/Library/BaseLib/AArch64/DisableInterrupts.S | 4 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/AArch64/EnableInterrupts.S | 3 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/AArch64/GetInterruptsState.S | 8 |
3 files changed, 9 insertions, 6 deletions
diff --git a/MdePkg/Library/BaseLib/AArch64/DisableInterrupts.S b/MdePkg/Library/BaseLib/AArch64/DisableInterrupts.S index 943cc44c70..9985f1cf68 100644 --- a/MdePkg/Library/BaseLib/AArch64/DisableInterrupts.S +++ b/MdePkg/Library/BaseLib/AArch64/DisableInterrupts.S @@ -19,6 +19,8 @@ .p2align 2
GCC_ASM_EXPORT(DisableInterrupts)
+.set DAIF_WR_IRQ_BIT, (1 << 1)
+
#/**
# Disables CPU interrupts.
#
@@ -30,5 +32,5 @@ GCC_ASM_EXPORT(DisableInterrupts) # );
#
ASM_PFX(DisableInterrupts):
- msr daifset, #2
+ msr daifset, #DAIF_WR_IRQ_BIT
ret
diff --git a/MdePkg/Library/BaseLib/AArch64/EnableInterrupts.S b/MdePkg/Library/BaseLib/AArch64/EnableInterrupts.S index a423102535..cdeff9d73d 100644 --- a/MdePkg/Library/BaseLib/AArch64/EnableInterrupts.S +++ b/MdePkg/Library/BaseLib/AArch64/EnableInterrupts.S @@ -19,6 +19,7 @@ .p2align 2
GCC_ASM_EXPORT(EnableInterrupts)
+.set DAIF_WR_IRQ_BIT, (1 << 1)
#/**
# Enables CPU interrupts.
@@ -31,5 +32,5 @@ GCC_ASM_EXPORT(EnableInterrupts) # );
#
ASM_PFX(EnableInterrupts):
- msr daifclr, #2
+ msr daifclr, #DAIF_WR_IRQ_BIT
ret
diff --git a/MdePkg/Library/BaseLib/AArch64/GetInterruptsState.S b/MdePkg/Library/BaseLib/AArch64/GetInterruptsState.S index 037f59acef..771299d1d4 100644 --- a/MdePkg/Library/BaseLib/AArch64/GetInterruptsState.S +++ b/MdePkg/Library/BaseLib/AArch64/GetInterruptsState.S @@ -19,6 +19,8 @@ .p2align 2
GCC_ASM_EXPORT(GetInterruptState)
+.set DAIF_RD_IRQ_BIT, (1 << 7)
+
#/**
# Retrieves the current CPU interrupt state.
#
@@ -38,8 +40,6 @@ GCC_ASM_EXPORT(GetInterruptState) #
ASM_PFX(GetInterruptState):
mrs x0, daif
- tst x0, #2 // Check if IRQ is enabled. Enabled if 0.
- mov w0, #0
- mov w1, #1
- csel w0, w1, w0, ne
+ tst x0, #DAIF_RD_IRQ_BIT // Check IRQ mask; set Z=1 if clear/unmasked
+ cset w0, eq // if Z=1 (eq) return 1, else 0
ret
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