3 files changed, 78 insertions, 0 deletions
diff --git a/EmulatorPkg/Library/PeiCoreServicesTablePointerLib/PeiServicesTablePointer.c b/EmulatorPkg/Library/PeiCoreServicesTablePointerLib/PeiServicesTablePointer.c
index 10f588843d..06f995b0d3 100644
--- a/EmulatorPkg/Library/PeiCoreServicesTablePointerLib/PeiServicesTablePointer.c
+++ b/EmulatorPkg/Library/PeiCoreServicesTablePointerLib/PeiServicesTablePointer.c
@@ -88,4 +88,30 @@ PeiServicesTablePointerLibConstructor (
   return EFI_SUCCESS;
 }
 
+/**
+  Perform CPU specific actions required to migrate the PEI Services Table 
+  pointer from temporary RAM to permanent RAM.
+
+  For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes 
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+  For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes 
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+  For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
+  a dedicated CPU register.  This means that there is no memory storage 
+  associated with storing the PEI Services Table pointer, so no additional 
+  migration actions are required for Itanium or ARM CPUs.
+
+**/
+VOID
+EFIAPI
+MigratePeiServicesTablePointer (
+  VOID
+  )
+{
+  //
+  //  PEI Services Table pointer is cached in the global variable. No additional 
+  //  migration actions are required.
+  //
+  return;
+}
 
diff --git a/EmulatorPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c b/EmulatorPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
index c34997854b..5aaf296389 100644
--- a/EmulatorPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
+++ b/EmulatorPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c
@@ -133,4 +133,30 @@ PeiServicesTablePointerLibConstructor (
   return Status;
 }
 
+/**
+  Perform CPU specific actions required to migrate the PEI Services Table 
+  pointer from temporary RAM to permanent RAM.
+
+  For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes 
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+  For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes 
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+  For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
+  a dedicated CPU register.  This means that there is no memory storage 
+  associated with storing the PEI Services Table pointer, so no additional 
+  migration actions are required for Itanium or ARM CPUs.
+
+**/
+VOID
+EFIAPI
+MigratePeiServicesTablePointer (
+  VOID
+  )
+{
+  //
+  //  PEI Services Table pointer is cached in the global variable. No additional 
+  //  migration actions are required.
+  //
+  return;
+}
 
diff --git a/EmulatorPkg/Library/PeiServicesTablePointerLibMagicPage/PeiServicesTablePointer.c b/EmulatorPkg/Library/PeiServicesTablePointerLibMagicPage/PeiServicesTablePointer.c
index 38ec0ea137..fa04ed3e04 100644
--- a/EmulatorPkg/Library/PeiServicesTablePointerLibMagicPage/PeiServicesTablePointer.c
+++ b/EmulatorPkg/Library/PeiServicesTablePointerLibMagicPage/PeiServicesTablePointer.c
@@ -71,5 +71,31 @@ GetPeiServicesTablePointer (
   return PeiServicesTablePointer;
 }
 
+/**
+  Perform CPU specific actions required to migrate the PEI Services Table 
+  pointer from temporary RAM to permanent RAM.
+
+  For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes 
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+  For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes 
+  immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+  For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
+  a dedicated CPU register.  This means that there is no memory storage 
+  associated with storing the PEI Services Table pointer, so no additional 
+  migration actions are required for Itanium or ARM CPUs.
+
+**/
+VOID
+EFIAPI
+MigratePeiServicesTablePointer (
+  VOID
+  )
+{
+  //
+  //  PEI Services Table pointer is cached in SRAM. No additional 
+  //  migration actions are required.
+  //
+  return;
+}