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-rw-r--r--ArmPkg/Drivers/PL390Gic/PL390GicDxe.c22
-rw-r--r--ArmPkg/Drivers/PL390Gic/PL390GicSec.c76
-rw-r--r--ArmPkg/Include/Chipset/ArmV7.h32
-rw-r--r--ArmPlatformPkg/Library/EblCmdLib/EblCmdMmu.c476
4 files changed, 322 insertions, 284 deletions
diff --git a/ArmPkg/Drivers/PL390Gic/PL390GicDxe.c b/ArmPkg/Drivers/PL390Gic/PL390GicDxe.c
index 94da7f5a74..d9d9b5f718 100644
--- a/ArmPkg/Drivers/PL390Gic/PL390GicDxe.c
+++ b/ArmPkg/Drivers/PL390Gic/PL390GicDxe.c
@@ -126,7 +126,7 @@ EnableInterruptSource (
RegShift = Source % 32;
// write set-enable register
- MmioWrite32 (PcdGet32(PcdGicDistributorBase) + GIC_ICDISER+(4*RegOffset), 1 << RegShift);
+ MmioWrite32 (PcdGet32(PcdGicDistributorBase) + GIC_ICDISER + (4*RegOffset), 1 << RegShift);
return EFI_SUCCESS;
}
@@ -156,12 +156,12 @@ DisableInterruptSource (
return EFI_UNSUPPORTED;
}
- // calculate enable register offset and bit position
+ // Calculate enable register offset and bit position
RegOffset = Source / 32;
RegShift = Source % 32;
- // write set-enable register
- MmioWrite32 (PcdGet32(PcdGicDistributorBase) + GIC_ICDICER+(4*RegOffset), 1 << RegShift);
+ // Write set-enable register
+ MmioWrite32 (PcdGet32(PcdGicDistributorBase) + GIC_ICDICER + (4*RegOffset), 1 << RegShift);
return EFI_SUCCESS;
}
@@ -197,7 +197,7 @@ GetInterruptSourceState (
RegOffset = Source / 32;
RegShift = Source % 32;
- if ((MmioRead32 (PcdGet32(PcdGicDistributorBase) + GIC_ICDISER+(4*RegOffset)) & (1<<RegShift)) == 0) {
+ if ((MmioRead32 (PcdGet32(PcdGicDistributorBase) + GIC_ICDISER + (4*RegOffset)) & (1<<RegShift)) == 0) {
*InterruptState = FALSE;
} else {
*InterruptState = TRUE;
@@ -389,27 +389,27 @@ InterruptDxeInitialize (
RegOffset = i / 4;
RegShift = (i % 4) * 8;
MmioAndThenOr32 (
- PcdGet32(PcdGicDistributorBase) + GIC_ICDIPR+(4*RegOffset),
+ PcdGet32(PcdGicDistributorBase) + GIC_ICDIPR + (4*RegOffset),
~(0xff << RegShift),
GIC_DEFAULT_PRIORITY << RegShift
);
}
- // configure interrupts for cpu 0
+ // Configure interrupts for cpu 0
for (i = 0; i < GIC_NUM_REG_PER_INT_BYTES; i++) {
MmioWrite32 (PcdGet32(PcdGicDistributorBase) + GIC_ICDIPTR + (i*4), 0x01010101);
}
- // set binary point reg to 0x7 (no preemption)
+ // Set binary point reg to 0x7 (no preemption)
MmioWrite32 (PcdGet32(PcdGicInterruptInterfaceBase) + GIC_ICCBPR, 0x7);
- // set priority mask reg to 0xff to allow all priorities through
+ // Set priority mask reg to 0xff to allow all priorities through
MmioWrite32 (PcdGet32(PcdGicInterruptInterfaceBase) + GIC_ICCPMR, 0xff);
- // enable gic cpu interface
+ // Enable gic cpu interface
MmioWrite32 (PcdGet32(PcdGicInterruptInterfaceBase) + GIC_ICCICR, 0x1);
- // enable gic distributor
+ // Enable gic distributor
MmioWrite32 (PcdGet32(PcdGicDistributorBase) + GIC_ICDDCR, 0x1);
ZeroMem (&gRegisteredInterruptHandlers, sizeof (gRegisteredInterruptHandlers));
diff --git a/ArmPkg/Drivers/PL390Gic/PL390GicSec.c b/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
index 156e0601e8..bf4c010b70 100644
--- a/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
+++ b/ArmPkg/Drivers/PL390Gic/PL390GicSec.c
@@ -12,6 +12,7 @@
*
**/
+#include <Uefi.h>
#include <Library/IoLib.h>
#include <Drivers/PL390Gic.h>
@@ -26,28 +27,27 @@ PL390GicSetupNonSecure (
IN INTN GicInterruptInterfaceBase
)
{
- UINTN CachedPriorityMask = MmioRead32(GicInterruptInterfaceBase + GIC_ICCPMR);
+ UINTN CachedPriorityMask = MmioRead32(GicInterruptInterfaceBase + GIC_ICCPMR);
- //Set priority Mask so that no interrupts get through to CPU
- MmioWrite32(GicInterruptInterfaceBase + GIC_ICCPMR, 0);
+ // Set priority Mask so that no interrupts get through to CPU
+ MmioWrite32(GicInterruptInterfaceBase + GIC_ICCPMR, 0);
- //Check if there are any pending interrupts
- while(0 != (MmioRead32(GicDistributorBase + GIC_ICDICPR) & 0xF))
- {
- //Some of the SGI's are still pending, read Ack register and send End of Interrupt Signal
- UINTN InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);
+ // Check if there are any pending interrupts
+ while(0 != (MmioRead32(GicDistributorBase + GIC_ICDICPR) & 0xF)) {
+ // Some of the SGI's are still pending, read Ack register and send End of Interrupt Signal
+ UINTN InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);
- //Write to End of interrupt signal
- MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);
- }
+ // Write to End of interrupt signal
+ MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);
+ }
// Ensure all GIC interrupts are Non-Secure
- MmioWrite32(GicDistributorBase + GIC_ICDISR, 0xffffffff); // IRQs 0-31 are Non-Secure : Private Peripheral Interrupt[31:16] & Software Generated Interrupt[15:0]
- MmioWrite32(GicDistributorBase + GIC_ICDISR + 4, 0xffffffff); // IRQs 32-63 are Non-Secure : Shared Peripheral Interrupt
- MmioWrite32(GicDistributorBase + GIC_ICDISR + 8, 0xffffffff); // And another 32 in case we're on the testchip : Shared Peripheral Interrupt (2)
+ MmioWrite32(GicDistributorBase + GIC_ICDISR, 0xffffffff); // IRQs 0-31 are Non-Secure : Private Peripheral Interrupt[31:16] & Software Generated Interrupt[15:0]
+ MmioWrite32(GicDistributorBase + GIC_ICDISR + 4, 0xffffffff); // IRQs 32-63 are Non-Secure : Shared Peripheral Interrupt
+ MmioWrite32(GicDistributorBase + GIC_ICDISR + 8, 0xffffffff); // And another 32 in case we're on the testchip : Shared Peripheral Interrupt (2)
// Ensure all interrupts can get through the priority mask
- MmioWrite32(GicInterruptInterfaceBase + GIC_ICCPMR, CachedPriorityMask);
+ MmioWrite32(GicInterruptInterfaceBase + GIC_ICCPMR, CachedPriorityMask);
}
VOID
@@ -63,12 +63,12 @@ PL390GicEnableInterruptInterface (
* Enable CPU inteface in Non-secure World
* Signal Secure Interrupts to CPU using FIQ line *
*/
- MmioWrite32(GicInterruptInterfaceBase + GIC_ICCICR,
- GIC_ICCICR_ENABLE_SECURE(1) |
- GIC_ICCICR_ENABLE_NS(1) |
- GIC_ICCICR_ACK_CTL(0) |
- GIC_ICCICR_SIGNAL_SECURE_TO_FIQ(1) |
- GIC_ICCICR_USE_SBPR(0));
+ MmioWrite32(GicInterruptInterfaceBase + GIC_ICCICR,
+ GIC_ICCICR_ENABLE_SECURE(1) |
+ GIC_ICCICR_ENABLE_NS(1) |
+ GIC_ICCICR_ACK_CTL(0) |
+ GIC_ICCICR_SIGNAL_SECURE_TO_FIQ(1) |
+ GIC_ICCICR_USE_SBPR(0));
}
VOID
@@ -77,7 +77,7 @@ PL390GicEnableDistributor (
IN INTN GicDistributorBase
)
{
- MmioWrite32(GicDistributorBase + GIC_ICDDCR, 1); // turn on the GIC distributor
+ MmioWrite32(GicDistributorBase + GIC_ICDDCR, 1); // turn on the GIC distributor
}
VOID
@@ -98,18 +98,18 @@ PL390GicAcknowledgeSgiFrom (
IN INTN CoreId
)
{
- INTN InterruptId;
+ INTN InterruptId;
- InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);
+ InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);
- //Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID
+ // Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID
if (((CoreId & 0x7) << 10) == (InterruptId & 0x1C00)) {
- //Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
+ // Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);
- return 1;
- } else {
- return 0;
- }
+ return 1;
+ } else {
+ return 0;
+ }
}
UINT32
@@ -120,16 +120,16 @@ PL390GicAcknowledgeSgi2From (
IN INTN SgiId
)
{
- INTN InterruptId;
+ INTN InterruptId;
- InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);
+ InterruptId = MmioRead32(GicInterruptInterfaceBase + GIC_ICCIAR);
- //Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID
+ // Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID
if((((CoreId & 0x7) << 10) | (SgiId & 0x3FF)) == (InterruptId & 0x1FFF)) {
- //Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
+ // Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
MmioWrite32(GicInterruptInterfaceBase + GIC_ICCEIOR, InterruptId);
- return 1;
- } else {
- return 0;
- }
+ return 1;
+ } else {
+ return 0;
+ }
}
diff --git a/ArmPkg/Include/Chipset/ArmV7.h b/ArmPkg/Include/Chipset/ArmV7.h
index 47d414ddf2..e986ae7407 100644
--- a/ArmPkg/Include/Chipset/ArmV7.h
+++ b/ArmPkg/Include/Chipset/ArmV7.h
@@ -339,7 +339,7 @@ ArmGetScuBaseAddress (
UINT32
EFIAPI
-ArmIsScuEnable(
+ArmIsScuEnable (
VOID
);
@@ -370,35 +370,35 @@ ArmSetupSmpNonSecure (
UINTN
EFIAPI
-ArmReadCbar(
-VOID
-);
+ArmReadCbar (
+ VOID
+ );
VOID
EFIAPI
-ArmInvalidateInstructionAndDataTlb(
-VOID
-);
+ArmInvalidateInstructionAndDataTlb (
+ VOID
+ );
UINTN
EFIAPI
-ArmReadMpidr(
-VOID
-);
+ArmReadMpidr (
+ VOID
+ );
UINTN
EFIAPI
-ArmReadTpidrurw(
-VOID
-);
+ArmReadTpidrurw (
+ VOID
+ );
VOID
EFIAPI
-ArmWriteTpidrurw(
-UINTN Value
-);
+ArmWriteTpidrurw (
+ UINTN Value
+ );
#endif // __ARM_V7_H__
diff --git a/ArmPlatformPkg/Library/EblCmdLib/EblCmdMmu.c b/ArmPlatformPkg/Library/EblCmdLib/EblCmdMmu.c
index fba4741699..4b001eaef3 100644
--- a/ArmPlatformPkg/Library/EblCmdLib/EblCmdMmu.c
+++ b/ArmPlatformPkg/Library/EblCmdLib/EblCmdMmu.c
@@ -67,247 +67,285 @@
typedef enum { Level0, Level1,Level2 } MMU_LEVEL;
typedef struct {
- MMU_LEVEL Level;
- UINT32 Value;
- UINT32 Index;
- UINT32* Table;
+ MMU_LEVEL Level;
+ UINT32 Value;
+ UINT32 Index;
+ UINT32* Table;
} MMU_ENTRY;
-MMU_ENTRY MmuEntryCreate(MMU_LEVEL Level,UINT32* Table,UINT32 Index) {
- MMU_ENTRY Entry;
- Entry.Level = Level;
- Entry.Value = Table[Index];
- Entry.Table = Table;
- Entry.Index = Index;
- return Entry;
+MMU_ENTRY
+MmuEntryCreate (
+ IN MMU_LEVEL Level,
+ IN UINT32* Table,
+ IN UINT32 Index
+ )
+{
+ MMU_ENTRY Entry;
+ Entry.Level = Level;
+ Entry.Value = Table[Index];
+ Entry.Table = Table;
+ Entry.Index = Index;
+ return Entry;
}
-UINT32 MmuEntryIsValidAddress(MMU_LEVEL Level, UINT32 Entry) {
- if (Level == Level0) {
- return 0;
- } else if (Level == Level1) {
- if ((Entry & 0x3) == 0) { // Ignored
- return 0;
- } else if ((Entry & 0x3) == 2) { // Section Type
- return 1;
- } else { // Page Type
- return 0;
- }
- } else if (Level == Level2){
- if ((Entry & 0x3) == 0) { // Ignored
- return 0;
- } else { // Page Type
- return 1;
- }
- } else {
- DEBUG((EFI_D_ERROR,"MmuEntryIsValidAddress: Level:%d Entry:0x%X\n",(UINT32)Level,(UINT32)Entry));
- ASSERT(0);
- return 0;
+UINT32
+MmuEntryIsValidAddress (
+ IN MMU_LEVEL Level,
+ IN UINT32 Entry
+ )
+{
+ if (Level == Level0) {
+ return 0;
+ } else if (Level == Level1) {
+ if ((Entry & 0x3) == 0) { // Ignored
+ return 0;
+ } else if ((Entry & 0x3) == 2) { // Section Type
+ return 1;
+ } else { // Page Type
+ return 0;
+ }
+ } else if (Level == Level2){
+ if ((Entry & 0x3) == 0) { // Ignored
+ return 0;
+ } else { // Page Type
+ return 1;
}
+ } else {
+ DEBUG((EFI_D_ERROR,"MmuEntryIsValidAddress: Level:%d Entry:0x%X\n",(UINT32)Level,(UINT32)Entry));
+ ASSERT(0);
+ return 0;
+ }
}
-UINT32 MmuEntryGetAddress(MMU_ENTRY Entry) {
- if (Entry.Level == Level1) {
- if ((Entry.Value & 0x3) == 0) {
- return 0;
- } else if ((Entry.Value & 0x3) == 2) { // Section Type
- return Entry.Value & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK;
- } else if ((Entry.Value & 0x3) == 1) { // Level2 Table
- MMU_ENTRY Entry = MmuEntryCreate(Level2,(UINT32*)(Entry.Value & 0xFFFFC000),0);
- return MmuEntryGetAddress(Entry);
- } else { // Page Type
- return 0;
- }
- } else if (Entry.Level == Level2) {
- if ((Entry.Value & 0x3) == 0) { // Ignored
- return 0;
- } else if ((Entry.Value & 0x3) == 1) { // Large Page
- return Entry.Value & 0xFFFF0000;
- } else if ((Entry.Value & 0x2) == 2) { // Small Page
- return Entry.Value & 0xFFFFF000;
- } else {
- return 0;
- }
+UINT32
+MmuEntryGetAddress (
+ IN MMU_ENTRY Entry
+ )
+{
+ if (Entry.Level == Level1) {
+ if ((Entry.Value & 0x3) == 0) {
+ return 0;
+ } else if ((Entry.Value & 0x3) == 2) { // Section Type
+ return Entry.Value & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK;
+ } else if ((Entry.Value & 0x3) == 1) { // Level2 Table
+ MMU_ENTRY Entry = MmuEntryCreate(Level2,(UINT32*)(Entry.Value & 0xFFFFC000),0);
+ return MmuEntryGetAddress(Entry);
+ } else { // Page Type
+ return 0;
+ }
+ } else if (Entry.Level == Level2) {
+ if ((Entry.Value & 0x3) == 0) { // Ignored
+ return 0;
+ } else if ((Entry.Value & 0x3) == 1) { // Large Page
+ return Entry.Value & 0xFFFF0000;
+ } else if ((Entry.Value & 0x2) == 2) { // Small Page
+ return Entry.Value & 0xFFFFF000;
} else {
- ASSERT(0);
- return 0;
+ return 0;
}
+ } else {
+ ASSERT(0);
+ return 0;
+ }
}
-UINT32 MmuEntryGetSize(MMU_ENTRY Entry) {
- if (Entry.Level == Level1) {
- if ((Entry.Value & 0x3) == 0) {
- return 0;
- } else if ((Entry.Value & 0x3) == 2) {
- if (Entry.Value & (1 << 18))
- return 16*SIZE_1MB;
- else
- return SIZE_1MB;
- } else if ((Entry.Value & 0x3) == 1) { // Level2 Table split 1MB section
- return SIZE_1MB;
- } else {
- DEBUG((EFI_D_ERROR, "MmuEntryGetSize: Value:0x%X",Entry.Value));
- ASSERT(0);
- return 0;
- }
- } else if (Entry.Level == Level2) {
- if ((Entry.Value & 0x3) == 0) { // Ignored
- return 0;
- } else if ((Entry.Value & 0x3) == 1) { // Large Page
- return SIZE_64KB;
- } else if ((Entry.Value & 0x2) == 2) { // Small Page
- return SIZE_4KB;
- } else {
- ASSERT(0);
- return 0;
- }
+UINT32
+MmuEntryGetSize (
+ IN MMU_ENTRY Entry
+ )
+{
+ if (Entry.Level == Level1) {
+ if ((Entry.Value & 0x3) == 0) {
+ return 0;
+ } else if ((Entry.Value & 0x3) == 2) {
+ if (Entry.Value & (1 << 18))
+ return 16*SIZE_1MB;
+ else
+ return SIZE_1MB;
+ } else if ((Entry.Value & 0x3) == 1) { // Level2 Table split 1MB section
+ return SIZE_1MB;
} else {
- ASSERT(0);
- return 0;
+ DEBUG((EFI_D_ERROR, "MmuEntryGetSize: Value:0x%X",Entry.Value));
+ ASSERT(0);
+ return 0;
}
+ } else if (Entry.Level == Level2) {
+ if ((Entry.Value & 0x3) == 0) { // Ignored
+ return 0;
+ } else if ((Entry.Value & 0x3) == 1) { // Large Page
+ return SIZE_64KB;
+ } else if ((Entry.Value & 0x2) == 2) { // Small Page
+ return SIZE_4KB;
+ } else {
+ ASSERT(0);
+ return 0;
+ }
+ } else {
+ ASSERT(0);
+ return 0;
+ }
}
-CONST CHAR8* MmuEntryGetAttributesName(MMU_ENTRY Entry) {
- if (Entry.Level == Level1) {
- if (GET_TT_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_SECTION_WRITE_BACK(0))
- return "TT_DESCRIPTOR_SECTION_WRITE_BACK";
- else if (GET_TT_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_SECTION_WRITE_THROUGH(0))
- return "TT_DESCRIPTOR_SECTION_WRITE_THROUGH";
- else if (GET_TT_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_SECTION_DEVICE(0))
- return "TT_DESCRIPTOR_SECTION_DEVICE";
- else if (GET_TT_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_SECTION_UNCACHED(0))
- return "TT_DESCRIPTOR_SECTION_UNCACHED";
- else if (GET_TT_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_SECTION_STRONGLY_ORDER)
- return "TT_DESCRIPTOR_SECTION_STRONGLY_ORDERED";
- else {
- return "SectionUnknown";
- }
- } else if ((Entry.Level == Level2) && ((Entry.Value & 0x2) == 2)) { //Small Page
- if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_WRITE_BACK)
- return "TT_DESCRIPTOR_PAGE_WRITE_BACK";
- else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_WRITE_THROUGH)
- return "TT_DESCRIPTOR_PAGE_WRITE_THROUGH";
- else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_DEVICE)
- return "TT_DESCRIPTOR_PAGE_DEVICE";
- else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_UNCACHED)
- return "TT_DESCRIPTOR_PAGE_UNCACHED";
- else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_STRONGLY_ORDER)
- return "TT_DESCRIPTOR_PAGE_STRONGLY_ORDERED";
- else {
- return "PageUnknown";
- }
- } else if ((Entry.Level == Level2) && ((Entry.Value & 0x3) == 1)) { //Large Page
- if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_WRITE_BACK)
- return "TT_DESCRIPTOR_LARGEPAGE_WRITE_BACK";
- else if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_WRITE_THROUGH)
- return "TT_DESCRIPTOR_LARGEPAGE_WRITE_THROUGH";
- else if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_DEVICE)
- return "TT_DESCRIPTOR_LARGEPAGE_DEVICE";
- else if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_UNCACHED)
- return "TT_DESCRIPTOR_LARGEPAGE_UNCACHED";
- else {
- return "LargePageUnknown";
- }
- } else {
- ASSERT(0);
- return "";
+CONST CHAR8*
+MmuEntryGetAttributesName (
+ IN MMU_ENTRY Entry
+ )
+{
+ UINT32 Value;
+
+ if (Entry.Level == Level1) {
+ Value = GET_TT_ATTRIBUTES(Entry.Value) | TT_DESCRIPTOR_SECTION_NS_MASK;
+ if (Value == TT_DESCRIPTOR_SECTION_WRITE_BACK(0))
+ return "TT_DESCRIPTOR_SECTION_WRITE_BACK";
+ else if (Value == TT_DESCRIPTOR_SECTION_WRITE_THROUGH(0))
+ return "TT_DESCRIPTOR_SECTION_WRITE_THROUGH";
+ else if (Value == TT_DESCRIPTOR_SECTION_DEVICE(0))
+ return "TT_DESCRIPTOR_SECTION_DEVICE";
+ else if (Value == TT_DESCRIPTOR_SECTION_UNCACHED(0))
+ return "TT_DESCRIPTOR_SECTION_UNCACHED";
+ else if (Value == TT_DESCRIPTOR_SECTION_STRONGLY_ORDER)
+ return "TT_DESCRIPTOR_SECTION_STRONGLY_ORDERED";
+ else {
+ return "SectionUnknown";
+ }
+ } else if ((Entry.Level == Level2) && ((Entry.Value & 0x2) == 2)) { //Small Page
+ Value = GET_TT_PAGE_ATTRIBUTES(Entry.Value);
+ if (Value == TT_DESCRIPTOR_PAGE_WRITE_BACK)
+ return "TT_DESCRIPTOR_PAGE_WRITE_BACK";
+ else if (Value == TT_DESCRIPTOR_PAGE_WRITE_THROUGH)
+ return "TT_DESCRIPTOR_PAGE_WRITE_THROUGH";
+ else if (Value == TT_DESCRIPTOR_PAGE_DEVICE)
+ return "TT_DESCRIPTOR_PAGE_DEVICE";
+ else if (Value == TT_DESCRIPTOR_PAGE_UNCACHED)
+ return "TT_DESCRIPTOR_PAGE_UNCACHED";
+ else if (Value == TT_DESCRIPTOR_PAGE_STRONGLY_ORDER)
+ return "TT_DESCRIPTOR_PAGE_STRONGLY_ORDERED";
+ else {
+ return "PageUnknown";
+ }
+ } else if ((Entry.Level == Level2) && ((Entry.Value & 0x3) == 1)) { //Large Page
+ Value = GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value);
+ if (Value == TT_DESCRIPTOR_LARGEPAGE_WRITE_BACK)
+ return "TT_DESCRIPTOR_LARGEPAGE_WRITE_BACK";
+ else if (Value == TT_DESCRIPTOR_LARGEPAGE_WRITE_THROUGH)
+ return "TT_DESCRIPTOR_LARGEPAGE_WRITE_THROUGH";
+ else if (Value == TT_DESCRIPTOR_LARGEPAGE_DEVICE)
+ return "TT_DESCRIPTOR_LARGEPAGE_DEVICE";
+ else if (Value == TT_DESCRIPTOR_LARGEPAGE_UNCACHED)
+ return "TT_DESCRIPTOR_LARGEPAGE_UNCACHED";
+ else {
+ return "LargePageUnknown";
}
+ } else {
+ ASSERT(0);
+ return "";
+ }
}
-UINT32 MmuEntryGetAttributes(MMU_ENTRY Entry) {
- if (Entry.Level == Level1) {
- if ((Entry.Value & 0x3) == 0) {
- return 0;
- } else if ((Entry.Value & 0x3) == 2) {
- return GET_TT_ATTRIBUTES(Entry.Value);
- } else {
- return 0;
- }
- } else if ((Entry.Level == Level2) && ((Entry.Value & 0x2) == 2)) { //Small Page
- if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_WRITE_BACK)
- return TT_DESCRIPTOR_SECTION_WRITE_BACK(0);
- else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_WRITE_THROUGH)
- return TT_DESCRIPTOR_SECTION_WRITE_THROUGH(0);
- else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_DEVICE)
- return TT_DESCRIPTOR_SECTION_DEVICE(0);
- else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_UNCACHED)
- return TT_DESCRIPTOR_SECTION_UNCACHED(0);
- else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_STRONGLY_ORDER)
- return TT_DESCRIPTOR_SECTION_STRONGLY_ORDER;
- else {
- return 0;
- }
- } else if ((Entry.Level == Level2) && ((Entry.Value & 0x3) == 1)) { //Large Page
- if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_WRITE_BACK)
- return TT_DESCRIPTOR_SECTION_WRITE_BACK(0);
- else if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_WRITE_THROUGH)
- return TT_DESCRIPTOR_SECTION_WRITE_THROUGH(0);
- else if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_DEVICE)
- return TT_DESCRIPTOR_SECTION_DEVICE(0);
- else if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_UNCACHED)
- return TT_DESCRIPTOR_SECTION_UNCACHED(0);
- else {
- return 0;
- }
+UINT32
+MmuEntryGetAttributes (
+ IN MMU_ENTRY Entry
+ )
+{
+ if (Entry.Level == Level1) {
+ if ((Entry.Value & 0x3) == 0) {
+ return 0;
+ } else if ((Entry.Value & 0x3) == 2) {
+ return GET_TT_ATTRIBUTES(Entry.Value);
} else {
- return 0;
+ return 0;
+ }
+ } else if ((Entry.Level == Level2) && ((Entry.Value & 0x2) == 2)) { //Small Page
+ if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_WRITE_BACK)
+ return TT_DESCRIPTOR_SECTION_WRITE_BACK(0);
+ else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_WRITE_THROUGH)
+ return TT_DESCRIPTOR_SECTION_WRITE_THROUGH(0);
+ else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_DEVICE)
+ return TT_DESCRIPTOR_SECTION_DEVICE(0);
+ else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_UNCACHED)
+ return TT_DESCRIPTOR_SECTION_UNCACHED(0);
+ else if (GET_TT_PAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_PAGE_STRONGLY_ORDER)
+ return TT_DESCRIPTOR_SECTION_STRONGLY_ORDER;
+ else {
+ return 0;
+ }
+ } else if ((Entry.Level == Level2) && ((Entry.Value & 0x3) == 1)) { //Large Page
+ if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_WRITE_BACK)
+ return TT_DESCRIPTOR_SECTION_WRITE_BACK(0);
+ else if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_WRITE_THROUGH)
+ return TT_DESCRIPTOR_SECTION_WRITE_THROUGH(0);
+ else if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_DEVICE)
+ return TT_DESCRIPTOR_SECTION_DEVICE(0);
+ else if (GET_TT_LARGEPAGE_ATTRIBUTES(Entry.Value) == TT_DESCRIPTOR_LARGEPAGE_UNCACHED)
+ return TT_DESCRIPTOR_SECTION_UNCACHED(0);
+ else {
+ return 0;
}
+ } else {
+ return 0;
+ }
}
-MMU_ENTRY DumpMmuLevel(MMU_LEVEL Level, UINT32* Table, MMU_ENTRY PreviousEntry) {
- UINT32 Index = 0, Count;
- MMU_ENTRY LastEntry, Entry;
+MMU_ENTRY
+DumpMmuLevel (
+ IN MMU_LEVEL Level,
+ IN UINT32* Table,
+ IN MMU_ENTRY PreviousEntry
+ )
+{
+ UINT32 Index = 0, Count;
+ MMU_ENTRY LastEntry, Entry;
ASSERT((Level == Level1) || (Level == Level2));
- if (Level == Level1) Count = 4096;
- else Count = 256;
+ if (Level == Level1) Count = 4096;
+ else Count = 256;
- // At Level1, we will get into this function because PreviousEntry is not valid
- if (!MmuEntryIsValidAddress((MMU_LEVEL)(Level-1),PreviousEntry.Value)) {
- // Find the first valid address
- for (; (Index < Count) && (!MmuEntryIsValidAddress(Level,Table[Index])); Index++);
+ // At Level1, we will get into this function because PreviousEntry is not valid
+ if (!MmuEntryIsValidAddress((MMU_LEVEL)(Level-1),PreviousEntry.Value)) {
+ // Find the first valid address
+ for (; (Index < Count) && (!MmuEntryIsValidAddress(Level,Table[Index])); Index++);
- LastEntry = MmuEntryCreate(Level,Table,Index);
- Index++;
- } else {
- LastEntry = PreviousEntry;
- }
+ LastEntry = MmuEntryCreate(Level,Table,Index);
+ Index++;
+ } else {
+ LastEntry = PreviousEntry;
+ }
- for (; Index < Count; Index++) {
- Entry = MmuEntryCreate(Level,Table,Index);
- if ((Level == Level1) && ((Entry.Value & 0x3) == 1)) { // We have got a Level2 table redirection
- LastEntry = DumpMmuLevel(Level2,(UINT32*)(Entry.Value & 0xFFFFFC00),LastEntry);
- } else if (!MmuEntryIsValidAddress(Level,Table[Index])) {
- if (MmuEntryIsValidAddress(LastEntry.Level,LastEntry.Value)) {
- AsciiPrint("0x%08X-0x%08X\t%a\n",
- MmuEntryGetAddress(LastEntry),MmuEntryGetAddress(PreviousEntry)+MmuEntryGetSize(PreviousEntry)-1,
- MmuEntryGetAttributesName(LastEntry));
- }
- LastEntry = Entry;
- } else {
- if (MmuEntryGetAttributes(LastEntry) != MmuEntryGetAttributes(Entry)) {
- if (MmuEntryIsValidAddress(Level,LastEntry.Value)) {
- AsciiPrint("0x%08X-0x%08X\t%a\n",
- MmuEntryGetAddress(LastEntry),MmuEntryGetAddress(PreviousEntry)+MmuEntryGetSize(PreviousEntry)-1,
- MmuEntryGetAttributesName(LastEntry));
- }
- LastEntry = Entry;
- } else {
- ASSERT(LastEntry.Value != 0);
- }
- }
- PreviousEntry = Entry;
+ for (; Index < Count; Index++) {
+ Entry = MmuEntryCreate(Level,Table,Index);
+ if ((Level == Level1) && ((Entry.Value & 0x3) == 1)) { // We have got a Level2 table redirection
+ LastEntry = DumpMmuLevel(Level2,(UINT32*)(Entry.Value & 0xFFFFFC00),LastEntry);
+ } else if (!MmuEntryIsValidAddress(Level,Table[Index])) {
+ if (MmuEntryIsValidAddress(LastEntry.Level,LastEntry.Value)) {
+ AsciiPrint("0x%08X-0x%08X\t%a\n",
+ MmuEntryGetAddress(LastEntry),MmuEntryGetAddress(PreviousEntry)+MmuEntryGetSize(PreviousEntry)-1,
+ MmuEntryGetAttributesName(LastEntry));
+ }
+ LastEntry = Entry;
+ } else {
+ if (MmuEntryGetAttributes(LastEntry) != MmuEntryGetAttributes(Entry)) {
+ if (MmuEntryIsValidAddress(Level,LastEntry.Value)) {
+ AsciiPrint("0x%08X-0x%08X\t%a\n",
+ MmuEntryGetAddress(LastEntry),MmuEntryGetAddress(PreviousEntry)+MmuEntryGetSize(PreviousEntry)-1,
+ MmuEntryGetAttributesName(LastEntry));
+ }
+ LastEntry = Entry;
+ } else {
+ ASSERT(LastEntry.Value != 0);
+ }
}
+ PreviousEntry = Entry;
+ }
- if ((Level == Level1) && (LastEntry.Index != Index) && MmuEntryIsValidAddress(Level,LastEntry.Value)) {
- AsciiPrint("0x%08X-0x%08X\t%a\n",
- MmuEntryGetAddress(LastEntry),MmuEntryGetAddress(PreviousEntry)+MmuEntryGetSize(PreviousEntry)-1,
- MmuEntryGetAttributesName(LastEntry));
- }
+ if ((Level == Level1) && (LastEntry.Index != Index) && MmuEntryIsValidAddress(Level,LastEntry.Value)) {
+ AsciiPrint("0x%08X-0x%08X\t%a\n",
+ MmuEntryGetAddress(LastEntry),MmuEntryGetAddress(PreviousEntry)+MmuEntryGetSize(PreviousEntry)-1,
+ MmuEntryGetAttributesName(LastEntry));
+ }
- return LastEntry;
+ return LastEntry;
}
@@ -317,17 +355,17 @@ EblDumpMmu (
IN CHAR8 **Argv
)
{
- UINT32 *TTEntry;
- MMU_ENTRY NoEntry;
+ UINT32 *TTEntry;
+ MMU_ENTRY NoEntry;
+
+ TTEntry = ArmGetTTBR0BaseAddress();
- TTEntry = ArmGetTTBR0BaseAddress();
+ AsciiPrint ("\nTranslation Table:0x%X\n",TTEntry);
+ AsciiPrint ("Address Range\t\tAttributes\n");
+ AsciiPrint ("____________________________________________________\n");
- AsciiPrint ("\nTranslation Table:0x%X\n",TTEntry);
- AsciiPrint ("Address Range\t\tAttributes\n");
- AsciiPrint ("____________________________________________________\n");
-
- NoEntry.Level = (MMU_LEVEL)200;
- DumpMmuLevel(Level1,TTEntry,NoEntry);
+ NoEntry.Level = (MMU_LEVEL)200;
+ DumpMmuLevel(Level1,TTEntry,NoEntry);
- return EFI_SUCCESS;
+ return EFI_SUCCESS;
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-24 03:27:35 +0000