diff options
| -rw-r--r-- | MdePkg/Library/BaseLib/BaseLib.inf | 2 | ||||
| -rw-r--r-- | MdePkg/Library/BaseLib/Ia32/DisableCache.nasm | 42 |
2 files changed, 44 insertions, 0 deletions
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf index 61b49a68c8..7d6bb071a7 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -346,6 +346,7 @@ Ia32/EnablePaging64.asm | INTEL
Ia32/EnableCache.nasm| INTEL
Ia32/EnableCache.asm | INTEL
+ Ia32/DisableCache.nasm| INTEL
Ia32/DisableCache.asm | INTEL
Ia32/RdRand.nasm| INTEL
Ia32/RdRand.asm | INTEL
@@ -398,6 +399,7 @@ Ia32/LShiftU64.S | GCC
Ia32/EnableCache.nasm| GCC
Ia32/EnableCache.S | GCC
+ Ia32/DisableCache.nasm| GCC
Ia32/DisableCache.S | GCC
Ia32/RdRand.nasm| GCC
Ia32/RdRand.S | GCC
diff --git a/MdePkg/Library/BaseLib/Ia32/DisableCache.nasm b/MdePkg/Library/BaseLib/Ia32/DisableCache.nasm new file mode 100644 index 0000000000..7b384d2035 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DisableCache.nasm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; DisableCache.Asm
+;
+; Abstract:
+;
+; Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a
+; WBINVD instruction.
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmDisableCache (
+; VOID
+; );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmDisableCache)
+ASM_PFX(AsmDisableCache):
+ mov eax, cr0
+ bts eax, 30
+ btr eax, 29
+ mov cr0, eax
+ wbinvd
+ ret
+
|