summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--MdePkg/Library/BaseCpuLib/Arm/CpuSleep.S11
-rw-r--r--MdePkg/Library/BaseCpuLib/Arm/CpuSleep.asm13
2 files changed, 17 insertions, 7 deletions
diff --git a/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.S b/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.S
index 44160d4c32..2c859306db 100644
--- a/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.S
+++ b/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.S
@@ -1,6 +1,12 @@
#------------------------------------------------------------------------------
#
-# CpuSleep() for ARM
+# CpuSleep() for ARMv7
+#
+# ARMv6 versions was:
+# MOV r0,#0
+# MCR p15,0,r0,c7,c0,4 ;Wait for Interrupt instruction
+#
+# But this is a no-op on ARMv7
#
# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
@@ -33,6 +39,5 @@ GCC_ASM_EXPORT(CpuSleep)
# );
#
ASM_PFX(CpuSleep):
- mov r0,#0
- mcr p15,0,r0,c7,c0,4 // Wait for Interrupt instruction
+ wfi
bx lr
diff --git a/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.asm b/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.asm
index 1a18eb0d07..a51e2cd9dd 100644
--- a/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.asm
+++ b/MdePkg/Library/BaseCpuLib/Arm/CpuSleep.asm
@@ -1,9 +1,15 @@
;------------------------------------------------------------------------------
;
-; CpuSleep() for ARM
+; CpuSleep() for ARMv7
+;
+; ARMv6 versions was:
+; MOV r0,#0
+; MCR p15,0,r0,c7,c0,4 ;Wait for Interrupt instruction
+;
+; But this is a no-op on ARMv7
;
; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>
-; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+; Portions copyright (c) 2008 - 2011, Apple Inc. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@@ -32,8 +38,7 @@
; );
;
CpuSleep
- MOV r0,#0
- MCR p15,0,r0,c7,c0,4 ;Wait for Interrupt instruction
+ WFI
BX LR
END