1 files changed, 65 insertions, 0 deletions
diff --git a/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c b/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c
new file mode 100644
index 0000000000..0bbc509550
--- /dev/null
+++ b/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c
@@ -0,0 +1,65 @@
+/** @file
+*
+*  Copyright (c) 2014, ARM Limited. All rights reserved.
+*
+*  This program and the accompanying materials
+*  are licensed and made available under the terms and conditions of the BSD License
+*  which accompanies this distribution.  The full text of the license may be found at
+*  http://opensource.org/licenses/bsd-license.php
+*
+*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+*
+**/
+
+#include <Uefi.h>
+#include <Library/IoLib.h>
+#include <Library/ArmGicLib.h>
+
+
+VOID
+EFIAPI
+ArmGicEnableInterruptInterface (
+  IN  INTN          GicInterruptInterfaceBase
+  )
+{  
+  /*
+  * Enable the CPU interface in Non-Secure world
+  * Note: The ICCICR register is banked when Security extensions are implemented
+  */
+  MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x1);
+}
+
+VOID
+EFIAPI
+ArmGicDisableInterruptInterface (
+  IN  INTN          GicInterruptInterfaceBase
+  )
+{
+  // Disable Gic Interface
+  MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x0);
+  MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x0);
+}
+
+VOID
+EFIAPI
+ArmGicEnableDistributor (
+  IN  INTN          GicDistributorBase
+  )
+{
+  /*
+   * Enable GIC distributor in Non-Secure world.
+   * Note: The ICDDCR register is banked when Security extensions are implemented
+   */
+  MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1);
+}
+
+VOID
+EFIAPI
+ArmGicDisableDistributor (
+  IN  INTN          GicDistributorBase
+  )
+{
+  // Disable Gic Distributor
+  MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x0);
+}