diff options
Diffstat (limited to 'ArmPkg/Library')
-rw-r--r-- | ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S | 1 | ||||
-rw-r--r-- | ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm | 1 | ||||
-rw-r--r-- | ArmPkg/Library/ArmLib/Common/ArmLibSupport.S | 1 | ||||
-rw-r--r-- | ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm | 1 |
4 files changed, 4 insertions, 0 deletions
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S index 3bb601541d..5ac3552403 100644 --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S @@ -347,6 +347,7 @@ ASM_PFX(ArmEnableVFP): orr r0, r0, #0x00f00000
# Write back CPACR (Coprocessor Access Control Register)
mcr p15, 0, r0, c1, c0, 2
+ isb
# Set EN bit in FPEXC. The Advanced SIMD and VFP extensions are enabled and operate normally.
mov r0, #0x40000000
mcr p10,#0x7,r0,c8,c0,#0
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm index 28a4564aca..8fedcdba97 100644 --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm @@ -341,6 +341,7 @@ ArmEnableVFP orr r0, r0, #0x00f00000
// Write back CPACR (Coprocessor Access Control Register)
mcr p15, 0, r0, c1, c0, 2
+ isb
// Set EN bit in FPEXC. The Advanced SIMD and VFP extensions are enabled and operate normally.
mov r0, #0x40000000
mcr p10,#0x7,r0,c8,c0,#0
diff --git a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S index edd94d2995..d00a3623c5 100644 --- a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S +++ b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S @@ -88,6 +88,7 @@ ASM_PFX(CPSRRead): ASM_PFX(ArmWriteCPACR):
mcr p15, 0, r0, c1, c0, 2
+ isb
bx lr
ASM_PFX(ArmWriteAuxCr):
diff --git a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm index 3f603873f3..b892603518 100644 --- a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm +++ b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm @@ -88,6 +88,7 @@ CPSRRead ArmWriteCPACR
mcr p15, 0, r0, c1, c0, 2
+ isb
bx lr
ArmWriteAuxCr
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