4 files changed, 25 insertions, 12 deletions
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7MPCore.c b/ArmPkg/Library/ArmLib/ArmV7/ArmV7MPCore.c
index 65c09a1a35..929140774c 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7MPCore.c
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7MPCore.c
@@ -50,8 +50,8 @@ ArmInvalidScu (
 
     scu_base = ArmGetScuBaseAddress();
 
-    /* Invalidate all: write -1 to SCU Invalidate All register */
+    // Invalidate all: write -1 to SCU Invalidate All register
     MmioWrite32(scu_base + SCU_INVALL_OFFSET, 0xffffffff);
-    /* Enable SCU */
+    // Enable SCU
     MmioWrite32(scu_base + SCU_CONTROL_OFFSET, 0x1);
 }
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
index 7dbbaf7d0f..5b12d1dee2 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
@@ -295,21 +295,21 @@ ASM_PFX(ArmWriteCPACR):
   bx      lr
 
 ASM_PFX(ArmEnableVFP):
-  // Enable VFP registers
+  # Enable VFP registers
   mrc     p15, 0, r0, c1, c0, 2
-  orr     r0, r0, #0x00f00000   // Enable VPF access (V* instructions)
+  orr     r0, r0, #0x00f00000   @ Enable VPF access (V* instructions)
   mcr     p15, 0, r0, c1, c0, 2
-  mov     r0, #0x40000000       // Set EN bit in FPEXC
-  mcr     p10,#0x7,r0,c8,c0,#0  // msr     FPEXC,r0 in ARM assembly
+  mov     r0, #0x40000000       @ Set EN bit in FPEXC
+  mcr     p10,#0x7,r0,c8,c0,#0  @ msr     FPEXC,r0 in ARM assembly
   bx      lr
 
 ASM_PFX(ArmCallWFI):
   wfi
   bx      lr
 
-//Note: Return 0 in Uniprocessor implementation
+#Note: Return 0 in Uniprocessor implementation
 ASM_PFX(ArmReadCbar):
-  mrc     p15, 4, r0, c15, c0, 0  //Read Configuration Base Address Register
+  mrc     p15, 4, r0, c15, c0, 0  @ Read Configuration Base Address Register
   bx      lr
 
 ASM_PFX(ArmInvalidateInstructionAndDataTlb):
diff --git a/ArmPkg/Library/ArmMPCoreMailBoxLib/ArmMPCoreMailBox.c b/ArmPkg/Library/ArmMPCoreMailBoxLib/ArmMPCoreMailBox.c
index c7a9341e86..28edd674c0 100644
--- a/ArmPkg/Library/ArmMPCoreMailBoxLib/ArmMPCoreMailBox.c
+++ b/ArmPkg/Library/ArmMPCoreMailBoxLib/ArmMPCoreMailBox.c
@@ -16,10 +16,18 @@
 #include <Library/PcdLib.h>
 #include <Library/IoLib.h>
 
-VOID ArmClearMPCoreMailbox() {
+VOID
+ArmClearMPCoreMailbox (
+  VOID
+  )
+{
   MmioWrite32(PcdGet32(PcdMPCoreMailboxClearAddress),PcdGet32(PcdMPCoreMailboxClearValue));
 }
 
-UINTN ArmGetMPCoreMailbox() {
-    return MmioRead32(PcdGet32(PcdMPCoreMailboxGetAddress));
+UINTN
+ArmGetMPCoreMailbox (
+  VOID
+  )
+{
+  return MmioRead32(PcdGet32(PcdMPCoreMailboxGetAddress));
 }
diff --git a/ArmPkg/Library/L2X0CacheLibNull/L2X0Cache.c b/ArmPkg/Library/L2X0CacheLibNull/L2X0Cache.c
index b7d79c3c6e..6193cb6132 100644
--- a/ArmPkg/Library/L2X0CacheLibNull/L2X0Cache.c
+++ b/ArmPkg/Library/L2X0CacheLibNull/L2X0Cache.c
@@ -15,6 +15,11 @@
 #include <Library/L2X0CacheLib.h>
 
 // Initialize L2X0 Cache Controller
-VOID L2x0CacheInit(UINTN L2x0Base, BOOLEAN CacheEnabled) {
+VOID
+L2x0CacheInit (
+  IN  UINTN   L2x0Base,
+  IN  BOOLEAN CacheEnabled
+  )
+{
     //No implementation
 }