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-rw-r--r--ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S6
-rw-r--r--ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm6
-rw-r--r--ArmPkg/Library/ArmLib/Common/ArmLib.c11
-rw-r--r--ArmPkg/Library/ArmLib/Common/ArmLibSupport.S33
-rw-r--r--ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm35
5 files changed, 82 insertions, 9 deletions
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
index 5ac3552403..910e50e401 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
@@ -42,6 +42,7 @@ GCC_ASM_EXPORT (ArmV7PerformPoUDataCacheOperation)
GCC_ASM_EXPORT (ArmDataMemoryBarrier)
GCC_ASM_EXPORT (ArmDataSyncronizationBarrier)
GCC_ASM_EXPORT (ArmInstructionSynchronizationBarrier)
+GCC_ASM_EXPORT (ArmReadVBar)
GCC_ASM_EXPORT (ArmWriteVBar)
GCC_ASM_EXPORT (ArmEnableVFP)
GCC_ASM_EXPORT (ArmCallWFI)
@@ -330,6 +331,11 @@ ASM_PFX(ArmInstructionSynchronizationBarrier):
isb
bx LR
+ASM_PFX(ArmReadVBar):
+ # Set the Address of the Vector Table in the VBAR register
+ mrc p15, 0, r0, c12, c0, 0
+ bx lr
+
ASM_PFX(ArmWriteVBar):
# Set the Address of the Vector Table in the VBAR register
mcr p15, 0, r0, c12, c0, 0
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm
index 8fedcdba97..8035400599 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm
@@ -39,6 +39,7 @@
EXPORT ArmDataMemoryBarrier
EXPORT ArmDataSyncronizationBarrier
EXPORT ArmInstructionSynchronizationBarrier
+ EXPORT ArmReadVBar
EXPORT ArmWriteVBar
EXPORT ArmEnableVFP
EXPORT ArmCallWFI
@@ -324,6 +325,11 @@ ArmInstructionSynchronizationBarrier
isb
bx LR
+ArmReadVBar
+ // Set the Address of the Vector Table in the VBAR register
+ mrc p15, 0, r0, c12, c0, 0
+ bx lr
+
ArmWriteVBar
// Set the Address of the Vector Table in the VBAR register
mcr p15, 0, r0, c12, c0, 0
diff --git a/ArmPkg/Library/ArmLib/Common/ArmLib.c b/ArmPkg/Library/ArmLib/Common/ArmLib.c
index ae1b785608..a7b9551ba1 100644
--- a/ArmPkg/Library/ArmLib/Common/ArmLib.c
+++ b/ArmPkg/Library/ArmLib/Common/ArmLib.c
@@ -1,6 +1,7 @@
/** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ Copyright (c) 2011 - 2012, ARM Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -70,3 +71,13 @@ ArmSetAuxCrBit (
ArmWriteAuxCr(val);
}
+VOID
+EFIAPI
+ArmUnsetAuxCrBit (
+ IN UINT32 Bits
+ )
+{
+ UINT32 val = ArmReadAuxCr();
+ val &= ~Bits;
+ ArmWriteAuxCr(val);
+}
diff --git a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S
index da927b9d43..b19185412c 100644
--- a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S
+++ b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S
@@ -32,16 +32,21 @@ GCC_ASM_EXPORT(ArmSetTTBR0)
GCC_ASM_EXPORT(ArmSetDomainAccessControl)
GCC_ASM_EXPORT(CPSRMaskInsert)
GCC_ASM_EXPORT(CPSRRead)
-GCC_ASM_EXPORT(ArmWriteCPACR)
+GCC_ASM_EXPORT(ArmReadCpacr)
+GCC_ASM_EXPORT(ArmWriteCpacr)
GCC_ASM_EXPORT(ArmWriteAuxCr)
GCC_ASM_EXPORT(ArmReadAuxCr)
GCC_ASM_EXPORT(ArmInvalidateTlb)
GCC_ASM_EXPORT(ArmUpdateTranslationTableEntry)
+GCC_ASM_EXPORT(ArmReadNsacr)
GCC_ASM_EXPORT(ArmWriteNsacr)
+GCC_ASM_EXPORT(ArmReadScr)
GCC_ASM_EXPORT(ArmWriteScr)
-GCC_ASM_EXPORT(ArmWriteVMBar)
+GCC_ASM_EXPORT(ArmReadMVBar)
+GCC_ASM_EXPORT(ArmWriteMVBar)
GCC_ASM_EXPORT(ArmCallWFE)
GCC_ASM_EXPORT(ArmCallSEV)
+GCC_ASM_EXPORT(ArmReadSctlr)
#------------------------------------------------------------------------------
@@ -88,7 +93,11 @@ ASM_PFX(CPSRRead):
mrs r0, cpsr
bx lr
-ASM_PFX(ArmWriteCPACR):
+ASM_PFX(ArmReadCpacr):
+ mrc p15, 0, r0, c1, c0, 2
+ bx lr
+
+ASM_PFX(ArmWriteCpacr):
mcr p15, 0, r0, c1, c0, 2
isb
bx lr
@@ -136,15 +145,27 @@ ASM_PFX(ArmInvalidateTlb):
isb
bx lr
+ASM_PFX(ArmReadNsacr):
+ mrc p15, 0, r0, c1, c1, 2
+ bx lr
+
ASM_PFX(ArmWriteNsacr):
mcr p15, 0, r0, c1, c1, 2
bx lr
+ASM_PFX(ArmReadScr):
+ mrc p15, 0, r0, c1, c1, 0
+ bx lr
+
ASM_PFX(ArmWriteScr):
mcr p15, 0, r0, c1, c1, 0
bx lr
-ASM_PFX(ArmWriteVMBar):
+ASM_PFX(ArmReadMVBar):
+ mrc p15, 0, r0, c12, c0, 1
+ bx lr
+
+ASM_PFX(ArmWriteMVBar):
mcr p15, 0, r0, c12, c0, 1
bx lr
@@ -156,4 +177,8 @@ ASM_PFX(ArmCallSEV):
sev
bx lr
+ASM_PFX(ArmReadSctlr):
+ mrc p15, 0, R0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
+ bx lr
+
ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm
index 186ee33dfa..fd0f332bd6 100644
--- a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm
+++ b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm
@@ -1,7 +1,7 @@
//------------------------------------------------------------------------------
//
// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-// Copyright (c) 2011, ARM Limited. All rights reserved.
+// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -32,16 +32,21 @@
EXPORT ArmSetDomainAccessControl
EXPORT CPSRMaskInsert
EXPORT CPSRRead
- EXPORT ArmWriteCPACR
+ EXPORT ArmReadCpacr
+ EXPORT ArmWriteCpacr
EXPORT ArmWriteAuxCr
EXPORT ArmReadAuxCr
EXPORT ArmInvalidateTlb
EXPORT ArmUpdateTranslationTableEntry
+ EXPORT ArmReadNsacr
EXPORT ArmWriteNsacr
+ EXPORT ArmReadScr
EXPORT ArmWriteScr
- EXPORT ArmWriteVMBar
+ EXPORT ArmReadMVBar
+ EXPORT ArmWriteMVBar
EXPORT ArmCallWFE
EXPORT ArmCallSEV
+ EXPORT ArmReadSctlr
AREA ArmLibSupport, CODE, READONLY
@@ -88,7 +93,11 @@ CPSRRead
mrs r0, cpsr
bx lr
-ArmWriteCPACR
+ArmReadCpacr
+ mrc p15, 0, r0, c1, c0, 2
+ bx lr
+
+ArmWriteCpacr
mcr p15, 0, r0, c1, c0, 2
isb
bx lr
@@ -136,15 +145,27 @@ ArmInvalidateTlb
isb
bx lr
+ArmReadNsacr
+ mrc p15, 0, r0, c1, c1, 2
+ bx lr
+
ArmWriteNsacr
mcr p15, 0, r0, c1, c1, 2
bx lr
+ArmReadScr
+ mrc p15, 0, r0, c1, c1, 0
+ bx lr
+
ArmWriteScr
mcr p15, 0, r0, c1, c1, 0
bx lr
-ArmWriteVMBar
+ArmReadMVBar
+ mrc p15, 0, r0, c12, c0, 1
+ bx lr
+
+ArmWriteMVBar
mcr p15, 0, r0, c12, c0, 1
bx lr
@@ -156,4 +177,8 @@ ArmCallSEV
sev
blx lr
+ArmReadSctlr
+ mrc p15, 0, R0, c1, c0, 0 // Read SCTLR into R0 (Read control register configuration data)
+ bx lr
+
END