diff options
Diffstat (limited to 'ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMSec.c')
| -rw-r--r-- | ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMSec.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMSec.c b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMSec.c index 76a8bc1ba0..a4eee5ca0c 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMSec.c +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMSec.c @@ -18,6 +18,8 @@ #include <Library/DebugLib.h> #include <Library/PcdLib.h> #include <Drivers/PL310L2Cache.h> +#include <Drivers/SP804Timer.h> +#include <ArmPlatform.h> /** Initialize the Secure peripherals and memory regions @@ -46,6 +48,14 @@ ArmPlatformSecInitialize ( VOID ) { + // Configure periodic timer (TIMER0) for 1MHz operation + MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER0_TIMCLK); + // Configure 1MHz clock + MmioOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, SP810_SYS_CTRL_TIMER1_TIMCLK); + // Configure SP810 to use 1MHz clock and disable + MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER2_EN, SP810_SYS_CTRL_TIMER2_TIMCLK); + // Configure SP810 to use 1MHz clock and disable + MmioAndThenOr32 (SP810_CTRL_BASE + SP810_SYS_CTRL_REG, ~SP810_SYS_CTRL_TIMER3_EN, SP810_SYS_CTRL_TIMER3_TIMCLK); } /** |