diff options
Diffstat (limited to 'ArmPlatformPkg')
4 files changed, 19 insertions, 36 deletions
diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEb.c b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEb.c index 5709ca6c01..a245c239aa 100644 --- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEb.c +++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEb.c @@ -43,21 +43,6 @@ ArmPlatformTrustzoneSupported ( } /** - Initialize the Secure peripherals and memory regions - - If Trustzone is supported by your platform then this function makes the required initialization - of the secure peripherals and memory regions. - -**/ -VOID -ArmPlatformTrustzoneInit ( - VOID - ) -{ - ASSERT(FALSE); -} - -/** Remap the memory at 0x0 Some platform requires or gives the ability to remap the memory at the address 0x0. @@ -88,20 +73,6 @@ ArmPlatformGetBootMode ( } /** - Initialize controllers that must setup at the early stage - - Some peripherals must be initialized in Secure World. - For example, some L2x0 requires to be initialized in Secure World - -**/ -VOID -ArmPlatformSecInitialize ( - VOID - ) { - // Do nothing yet -} - -/** Initialize controllers that must setup in the normal world This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei diff --git a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSecLib.inf b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSecLib.inf index 60b40074e5..17df8100a4 100644 --- a/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSecLib.inf +++ b/ArmPlatformPkg/ArmRealViewEbPkg/Library/ArmRealViewEbLibRTSM/ArmRealViewEbSecLib.inf @@ -32,6 +32,7 @@ [Sources.common]
ArmRealViewEb.c
+ ArmRealViewEbSec.c
ArmRealViewEbHelper.asm | RVCT
ArmRealViewEbHelper.S | GCC
ArmRealViewEbBoot.asm | RVCT
@@ -39,3 +40,6 @@ [FeaturePcd]
gEmbeddedTokenSpaceGuid.PcdCacheEnable
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdNormalFvBaseAddress
diff --git a/ArmPlatformPkg/Include/Drivers/SP804Timer.h b/ArmPlatformPkg/Include/Drivers/SP804Timer.h index dee337ebf9..f9a89c5376 100644 --- a/ArmPlatformPkg/Include/Drivers/SP804Timer.h +++ b/ArmPlatformPkg/Include/Drivers/SP804Timer.h @@ -17,13 +17,17 @@ #define _SP804_TIMER_H__
// SP804 Timer constants
-#define SP804_TIMER_LOAD_REG 0x00
-#define SP804_TIMER_CURRENT_REG 0x04
-#define SP804_TIMER_CONTROL_REG 0x08
-#define SP804_TIMER_INT_CLR_REG 0x0C
-#define SP804_TIMER_RAW_INT_STS_REG 0x10
-#define SP804_TIMER_MSK_INT_STS_REG 0x14
-#define SP804_TIMER_BG_LOAD_REG 0x18
+// Note: The SP804 Timer module comprises two timers, Timer_0 and Timer_1
+// These timers are identical and all their registers have an offset of 0x20
+// i.e. SP804_TIMER_0_LOAD_REG = 0x00 and SP804_TIMER_1_LOAD_REG = 0x20
+// Therefore, define all registers only once and adjust the base addresses by 0x20
+#define SP804_TIMER_LOAD_REG 0x00
+#define SP804_TIMER_CURRENT_REG 0x04
+#define SP804_TIMER_CONTROL_REG 0x08
+#define SP804_TIMER_INT_CLR_REG 0x0C
+#define SP804_TIMER_RAW_INT_STS_REG 0x10
+#define SP804_TIMER_MSK_INT_STS_REG 0x14
+#define SP804_TIMER_BG_LOAD_REG 0x18
// Timer control register bit definitions
#define SP804_TIMER_CTRL_ONESHOT BIT0
@@ -36,6 +40,9 @@ #define SP804_TIMER_CTRL_PERIODIC BIT6
#define SP804_TIMER_CTRL_ENABLE BIT7
+// Other SP804 Timer definitions
+#define SP804_MAX_TICKS 0xFFFFFFFF
+
// SP810 System Controller constants
#define SP810_SYS_CTRL_REG 0x00
#define SP810_SYS_CTRL_TIMER0_TIMCLK BIT15 // 0=REFCLK, 1=TIMCLK
diff --git a/ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf b/ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf index 33f2457b7e..5c0811b837 100644 --- a/ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf +++ b/ArmPlatformPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf @@ -43,4 +43,5 @@ gArmPlatformTokenSpaceGuid.PcdPeiServicePtrGlobalOffset
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase
gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize
+ gArmPlatformTokenSpaceGuid.PcdPeiGlobalVariableSize
|