diff options
Diffstat (limited to 'BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm')
24 files changed, 80 insertions, 67 deletions
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/MpFuncs.S b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/MpFuncs.S index 7d29b44385..ebc100a74e 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/MpFuncs.S +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/MpFuncs.S @@ -42,7 +42,7 @@ RendezvousFunnelProcStart: .byte 0x8c,0xc8 # mov ax, cs
.byte 0x8e,0xd8 # mov ds, ax
.byte 0x8e,0xc0 # mov es, ax
- .byte 0x8e,0xd0 # mov ss, ax
+ .byte 0x8e,0xd0 # mov ss, ax
.byte 0x33,0xc0 # xor ax, ax
.byte 0x8e,0xe0 # mov fs, ax
.byte 0x8e,0xe8 # mov gs, ax
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/MpFuncs.asm b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/MpFuncs.asm index 9cfb54e4fa..106aa199fd 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/MpFuncs.asm +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/MpFuncs.asm @@ -14,8 +14,8 @@ ;;
.686p
-.model flat,C
-.code
+.model flat,C
+.code
EXTERN InitializeFloatingPointUnits:PROC
@@ -47,7 +47,7 @@ RendezvousFunnelProcStart:: db 8ch, 0c8h ; mov ax, cs
db 8eh, 0d8h ; mov ds, ax
db 8eh, 0c0h ; mov es, ax
- db 8eh, 0d0h ; mov ss, ax
+ db 8eh, 0d0h ; mov ss, ax
db 33h, 0c0h ; xor ax, ax
db 8eh, 0e0h ; mov fs, ax
db 8eh, 0e8h ; mov gs, ax
@@ -67,10 +67,10 @@ flat32Start:: dw IdtrProfile ; mov si, IdtrProfile
db 66h ; db 66h
db 2Eh, 0Fh, 01h, 1Ch ; lidt fword ptr cs:[si]
-
+
db 33h, 0C0h ; xor ax, ax
db 8Eh, 0D8h ; mov ds, ax
-
+
db 0Fh, 20h, 0C0h ; mov eax, cr0 ; Get control register 0
db 66h, 83h, 0C8h, 01h ; or eax, 000000001h ; Set PE bit (bit #0)
db 0Fh, 22h, 0C0h ; mov cr0, eax
@@ -133,12 +133,12 @@ Releaselock:: test eax, eax
jz GoToSleep
call eax ; Call C function
-
+
GoToSleep::
cli
hlt
jmp $-2
-
+
RendezvousFunnelProc ENDP
RendezvousFunnelProcEnd::
;-------------------------------------------------------------------------------------
@@ -148,16 +148,16 @@ AsmGetAddressMap PROC near C PUBLIC pushad
mov ebp,esp
-
+
mov ebx, dword ptr [ebp+24h]
mov dword ptr [ebx], RendezvousFunnelProcStart
mov dword ptr [ebx+4h], PMODE_ENTRY - RendezvousFunnelProcStart
mov dword ptr [ebx+8h], FLAT32_JUMP - RendezvousFunnelProcStart
mov dword ptr [ebx+0ch], RendezvousFunnelProcEnd - RendezvousFunnelProcStart
-
+
popad
ret
-
+
AsmGetAddressMap ENDP
END
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmiEntry.S b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmiEntry.S index f2f81a1991..8038cd2203 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmiEntry.S +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmiEntry.S @@ -82,7 +82,7 @@ ASM_PFX(gSmbase): .space 4 .space 2
_GdtDesc: .space 4
.space 2
-Start32bit:
+Start32bit:
leal DSC_OFFSET(%edi),%ebx
movw DSC_DS(%ebx),%ax
movl %eax,%ds
@@ -118,7 +118,7 @@ L1: popl %ebp
movl $0x80000001, %eax
cpuid
- btl $29, %edx # check cpuid to identify X64 or IA32
+ btl $29, %edx # check cpuid to identify X64 or IA32
leal (0x7fc8 - (L1 - _SmiEntryPoint))(%ebp), %edi
leal 4(%edi), %esi
jnc L2
@@ -132,7 +132,7 @@ L7: L3:
pushl (%esp)
-
+
movl $ASM_PFX(SmiRendezvous), %eax
call *%eax
popl %ecx
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm index 3bd34376f8..f132627d6b 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmiEntry.asm @@ -121,7 +121,7 @@ gSmiStack DD ? pop ebp
mov eax, 80000001h
cpuid
- bt edx, 29 ; check cpuid to identify X64 or IA32
+ bt edx, 29 ; check cpuid to identify X64 or IA32
lea edi, [ebp - (@1 - _SmiEntryPoint) + 7fc8h]
lea esi, [edi + 4]
jnc @2
@@ -134,14 +134,14 @@ gSmiStack DD ? mov dr7, edx ; restore DR6 & DR7 before running C code
@3:
mov ecx, [esp] ; CPU Index
-
+
push ecx
mov eax, SmiRendezvous
call eax
pop ecx
cmp FeaturePcdGet (PcdCpuSmmDebug), 0
- jz @4
+ jz @4
mov ecx, dr6
mov edx, dr7
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmiException.S b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmiException.S index 4650437d71..76e2cf9ff7 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmiException.S +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmiException.S @@ -24,7 +24,7 @@ ASM_GLOBAL ASM_PFX(gSavedDebugExceptionIdtEntry) ASM_GLOBAL ASM_PFX(FeaturePcdGet (PcdCpuSmmProfileEnable))
ASM_GLOBAL ASM_PFX(InitializeSmmExternalVectorTablePtr)
- .data
+ .data
NullSeg: .quad 0
.quad 0 # reserved for future use
@@ -436,16 +436,16 @@ ExternalVectorTablePtr: .long 0 # Saved IDT Entry for Page Fault
#
ASM_PFX(gSavedPageFaultIdtEntry):
- .long 0
- .long 0
+ .long 0
+ .long 0
#
# Saved IDT Entry for INT 1
#
ASM_PFX(gSavedDebugExceptionIdtEntry):
- .long 0
- .long 0
-
+ .long 0
+ .long 0
+
.text
ASM_PFX(InitializeSmmExternalVectorTablePtr):
@@ -917,7 +917,7 @@ PFHandlerEntry: # Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
# is 16-byte aligned
#
- andl $0xfffffff0, %esp
+ andl $0xfffffff0, %esp
subl $12, %esp
## UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
@@ -1120,7 +1120,7 @@ ASM_PFX(InitializeIDT): .long IDT_SIZE / 8
lea _SmiExceptionHandlers - 8, %ebx
popl %ecx
-L1:
+L1:
leal (%ebx,%ecx,8),%eax
movw %ax,(%edx,%ecx,8)
shrl $16,%eax
@@ -1155,10 +1155,10 @@ L2: cmpb $0, ASM_PFX(FeaturePcdGet (PcdCpuSmmProfileEnable))
jz L3
-
+
#
# Save INT 1 IDT entry in gSavedDebugExceptionIdtEntry
-#
+#
leal _SmiIDT + 1 * 8, %ebx
leal ASM_PFX(gSavedDebugExceptionIdtEntry), %edx
movl (%ebx), %eax
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmiException.asm b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmiException.asm index 33b4d8387f..b548b60bf1 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmiException.asm +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmiException.asm @@ -276,7 +276,7 @@ gSavedPageFaultIdtEntry LABEL DWORD gSavedDebugExceptionIdtEntry LABEL DWORD
DD 0
DD 0
-
+
.code
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c index fbca8c4afe..a473dd9127 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c @@ -64,3 +64,4 @@ RestorePageTableAbove4G ( )
{
}
+
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.h b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.h index e41949563c..601373785b 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.h +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.h @@ -96,3 +96,4 @@ InitPagesForPFHandler ( );
#endif // _SMM_PROFILE_ARCH_H_
+
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/MpService.c b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/MpService.c index 76fd20dc1b..3ee896ccee 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/MpService.c +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/MpService.c @@ -1757,3 +1757,4 @@ SmmCpuSync2SendSmiAllExcludingSelf ( SendSmiIpiAllExcludingSelf();
return EFI_SUCCESS;
}
+
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c index d4ab88dff8..1d61307d91 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c @@ -1594,3 +1594,4 @@ PerformRemainingTasks ( mSmmReadyToLock = FALSE;
}
}
+
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h index 39c7ba5049..ab2489aa8e 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h @@ -778,3 +778,4 @@ PerformRemainingTasks ( );
#endif
+
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf index fd497ac2b8..ccef8cacd4 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf @@ -83,7 +83,7 @@ MdeModulePkg/MdeModulePkg.dec
UefiCpuPkg/UefiCpuPkg.dec
IntelFrameworkPkg/IntelFrameworkPkg.dec
- BraswellPlatformPkg/BraswellPlatformPkg.dec
+ BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/IntelSiliconBasic.dec
[LibraryClasses]
UefiDriverEntryPoint
@@ -193,3 +193,4 @@ [Depex]
gEfiMpServiceProtocolGuid
+
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SmmFeatures.h b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SmmFeatures.h index 2eabc82e50..5b124030cc 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SmmFeatures.h +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SmmFeatures.h @@ -218,3 +218,4 @@ SmmWriteReg64 ( );
#endif
+
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SmmProfile.c b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SmmProfile.c index b781d2032b..0af6660fb2 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SmmProfile.c +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SmmProfile.c @@ -1367,3 +1367,4 @@ InitIdtr ( {
SmmRegisterExceptionHandler (&mSmmCpuService, EXCEPT_IA32_DEBUG, DebugExceptionHandler);
}
+
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SmmProfile.h b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SmmProfile.h index 0c5411b7ba..4d348eacd9 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SmmProfile.h +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SmmProfile.h @@ -74,3 +74,4 @@ SmmProfileStart ( );
#endif // _SMM_PROFILE_H_
+
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SmmProfileInternal.h b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SmmProfileInternal.h index 7403c4fc46..fbb53afa0f 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SmmProfileInternal.h +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SmmProfileInternal.h @@ -188,3 +188,4 @@ SmiDefaultPFHandler ( );
#endif // _SMM_PROFILE_H_
+
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SyncTimer.c b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SyncTimer.c index a2c2f1e75b..1a426f5ff3 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SyncTimer.c +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/SyncTimer.c @@ -109,3 +109,4 @@ IsSyncTimerTimeout ( return (BOOLEAN) (Delta >= mTimeoutTicker);
}
+
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/MpFuncs.asm b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/MpFuncs.asm index f0a0bc3f89..db45a06c60 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/MpFuncs.asm +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/MpFuncs.asm @@ -39,7 +39,7 @@ Cr3OffsetLocation equ LockLocation + 38h ;text SEGMENT
.code
-RendezvousFunnelProc PROC
+RendezvousFunnelProc PROC
RendezvousFunnelProcStart::
; At this point CS = 0x(vv00) and ip= 0x0.
@@ -47,7 +47,7 @@ RendezvousFunnelProcStart:: db 8ch, 0c8h ; mov ax, cs
db 8eh, 0d8h ; mov ds, ax
db 8eh, 0c0h ; mov es, ax
- db 8eh, 0d0h ; mov ss, ax
+ db 8eh, 0d0h ; mov ss, ax
db 33h, 0c0h ; xor ax, ax
db 8eh, 0e0h ; mov fs, ax
db 8eh, 0e8h ; mov gs, ax
@@ -61,7 +61,7 @@ flat32Start:: db 0BEh
dw Cr3OffsetLocation ; mov si, Cr3Location
db 66h, 8Bh, 0Ch ; mov ecx,dword ptr [si] ; ECX is keeping the value of CR3
-
+
db 0BEh
dw GdtrLocation ; mov si, GdtrProfile
db 66h ; db 66h
@@ -71,10 +71,10 @@ flat32Start:: dw IdtrLocation ; mov si, IdtrProfile
db 66h ; db 66h
db 2Eh, 0Fh, 01h, 1Ch ; lidt fword ptr cs:[si]
-
+
db 33h, 0C0h ; xor ax, ax
db 8Eh, 0D8h ; mov ds, ax
-
+
db 0Fh, 20h, 0C0h ; mov eax, cr0 ; Get control register 0
db 66h, 83h, 0C8h, 01h ; or eax, 000000001h ; Set PE bit (bit #0)
db 0Fh, 22h, 0C0h ; mov cr0, eax
@@ -99,25 +99,25 @@ NemInit:: ; protected mode entry point db 0Fh, 22h, 0E0h ; mov cr4, eax
db 0Fh, 22h, 0D9h ; mov cr3, ecx
-
+
db 8Bh, 0F2h ; mov esi, edx ; Save wakeup buffer address
-
+
db 0B9h
dd 0C0000080h ; mov ecx, 0c0000080h ; EFER MSR number.
db 0Fh, 32h ; rdmsr ; Read EFER.
db 0Fh, 0BAh, 0E8h, 08h ; bts eax, 8 ; Set LME=1.
db 0Fh, 30h ; wrmsr ; Write EFER.
-
+
db 0Fh, 20h, 0C0h ; mov eax, cr0 ; Read CR0.
db 0Fh, 0BAh, 0E8h, 1Fh ; bts eax, 31 ; Set PG=1.
db 0Fh, 22h, 0C0h ; mov cr0, eax ; Write CR0.
LONG_JUMP::
-
+
db 67h, 0EAh ; far jump
dd 0h ; 32-bit offset
dw 38h ; 16-bit selector
-
+
LongModeStart::
mov ax, 30h
@@ -172,12 +172,12 @@ Releaselock:: sub rsp, 20h
call rax
add rsp, 20h
-
+
GoToSleep::
cli
hlt
jmp $-2
-
+
RendezvousFunnelProcEnd::
RendezvousFunnelProc ENDP
@@ -186,7 +186,7 @@ RendezvousFunnelProc ENDP ; AsmGetAddressMap (&AddressMap);
;-------------------------------------------------------------------------------------
; comments here for definition of address map
-AsmGetAddressMap PROC
+AsmGetAddressMap PROC
mov rax, offset RendezvousFunnelProcStart
mov qword ptr [rcx], rax
mov qword ptr [rcx+8h], NemInit - RendezvousFunnelProcStart
@@ -195,7 +195,7 @@ AsmGetAddressMap PROC mov qword ptr [rcx+20h], LongModeStart - RendezvousFunnelProcStart
mov qword ptr [rcx+28h], LONG_JUMP - RendezvousFunnelProcStart
ret
-
+
AsmGetAddressMap ENDP
END
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmiEntry.asm b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmiEntry.asm index 7e174b2373..766891eff6 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmiEntry.asm +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmiEntry.asm @@ -202,7 +202,7 @@ gSmiStack DQ ? sub rsp, 208h
DB 48h ; FXSAVE64
fxsave [rsp]
-
+
add rsp, -20h
call rax
add rsp, 20h
@@ -211,8 +211,8 @@ gSmiStack DQ ? ; Restore FP registers
;
DB 48h ; FXRSTOR64
- fxrstor [rsp]
-
+ fxrstor [rsp]
+
mov rax, offset FeaturePcdGet (PcdCpuSmmDebug) ;Get absolute address. Avoid RIP relative addressing
cmp byte ptr [rax], 0
jz @2
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmiException.S b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmiException.S index e786a4395d..dd91e1a9d4 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmiException.S +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmiException.S @@ -357,16 +357,16 @@ _SmiIDTEnd: # Saved IDT Entry for Page Fault
#
ASM_PFX(gSavedPageFaultIdtEntry):
- .quad 0
- .quad 0
+ .quad 0
+ .quad 0
#
# Saved IDT Entry for INT 1
#
ASM_PFX(gSavedDebugExceptionIdtEntry):
- .quad 0
- .quad 0
-
+ .quad 0
+ .quad 0
+
ExternalVectorTablePtr: .quad 0 # point to the external interrupt vector table
#
@@ -550,7 +550,7 @@ L1: # Since here the stack pointer is 16-byte aligned, so
# EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
# is 16-byte aligned
- #
+ #
## UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
## UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
@@ -683,7 +683,7 @@ L5: ## UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
## Skip restoration of DRx registers to support in-circuit emualators
## or debuggers set breakpoint in interrupt/exception context
- addq $8 * 6, %rsp
+ addq $8 * 6, %rsp
## UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
popq %rax
@@ -758,7 +758,7 @@ L6: cmpq $1, 8(%rsp)
jnz Done
# Clear TF bit after INT1 handler runs
- btcl $8, 40(%rsp) #RFLAGS
+ btcl $8, 40(%rsp) #RFLAGS
Done:
@@ -816,7 +816,7 @@ L3: movq (%rcx), %rax
movq %rax, (%rdx)
movq 8(%rcx), %rax
- movq %rax, 8(%rdx)
-
+ movq %rax, 8(%rdx)
+
L4:
ret
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmiException.asm b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmiException.asm index 551f179848..31126d5c71 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmiException.asm +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmiException.asm @@ -158,15 +158,15 @@ IDT_SIZE = (offset _SmiIDTEnd - offset _SmiIDT) ; Saved IDT Entry for Page Fault
;
gSavedPageFaultIdtEntry LABEL QWORD
- DQ 0
- DQ 0
+ DQ 0
+ DQ 0
;
; Saved IDT Entry for INT 1
;
gSavedDebugExceptionIdtEntry LABEL QWORD
- DQ 0
- DQ 0
+ DQ 0
+ DQ 0
ExternalVectorTablePtr QWORD 0 ; point to the external interrupt vector table
@@ -179,7 +179,7 @@ _PFLOCK DB 0 .code
-InitializeSmmExternalVectorTablePtr PROC
+InitializeSmmExternalVectorTablePtr PROC
mov ExternalVectorTablePtr, rcx
ret
InitializeSmmExternalVectorTablePtr ENDP
@@ -231,7 +231,7 @@ IHDLRIDX = IHDLRIDX + 1 ; Since here the stack pointer is 16-byte aligned, so
; EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
; is 16-byte aligned
- ;
+ ;
;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
@@ -330,7 +330,7 @@ IHDLRIDX = IHDLRIDX + 1 ;; call into exception handler
mov rcx, [rbp + 8]
mov rax, ExternalVectorTablePtr ; get the interrupt vectors base
- mov rax, [rax + rcx * 8]
+ mov rax, [rax + rcx * 8]
or rax, rax ; NULL?
je nonNullValue;
@@ -439,7 +439,7 @@ nonNullValue: cmp qword ptr [rsp + 8], 1
jnz @Done
; Clear TF bit after INT1 handler runs
- btc dword ptr [rsp + 40], 8 ;RFLAGS
+ btc dword ptr [rsp + 40], 8 ;RFLAGS
@Done:
@@ -497,7 +497,7 @@ InitializeIDT PROC mov [rdx], rax
mov rax, [rcx + 8]
mov [rdx + 8], rax
-@@:
+@@:
ret
InitializeIDT ENDP
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmmInit.asm b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmmInit.asm index b5724d53c6..889d873143 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmmInit.asm +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmmInit.asm @@ -82,7 +82,7 @@ gSmmInitStack DQ ? movdqa [rsp + 40h], xmm4
movdqa [rsp + 50h], xmm5
- add rsp, -20h
+ add rsp, -20h
call SmmInitHandler
add rsp, 20h
@@ -94,7 +94,7 @@ gSmmInitStack DQ ? movdqa xmm2, [rsp + 20h]
movdqa xmm3, [rsp + 30h]
movdqa xmm4, [rsp + 40h]
- movdqa xmm5, [rsp + 50h]
+ movdqa xmm5, [rsp + 50h]
rsm
SmmStartup ENDP
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmmProfileArch.c b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmmProfileArch.c index 535ee7f231..72d1cc4529 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmmProfileArch.c +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmmProfileArch.c @@ -300,3 +300,4 @@ RestorePageTableAbove4G ( return;
}
+
diff --git a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmmProfileArch.h b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmmProfileArch.h index ea43d143a6..428612c900 100644 --- a/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmmProfileArch.h +++ b/BraswellPlatformPkg/Common/Silicon/IntelSiliconBasic/PiSmmCpuDxeSmm/X64/SmmProfileArch.h @@ -104,3 +104,4 @@ InitPagesForPFHandler ( );
#endif // _SMM_PROFILE_ARCH_H_
+
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