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Diffstat (limited to 'Core/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm')
-rw-r--r--Core/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm55
1 files changed, 55 insertions, 0 deletions
diff --git a/Core/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm b/Core/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm
new file mode 100644
index 0000000000..1979f6d9eb
--- /dev/null
+++ b/Core/MdePkg/Library/BaseLib/Ia32/FlushCacheLine.asm
@@ -0,0 +1,55 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; FlushCacheLine.Asm
+;
+; Abstract:
+;
+; AsmFlushCacheLine function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .xmm
+ .code
+
+;------------------------------------------------------------------------------
+; VOID *
+; EFIAPI
+; AsmFlushCacheLine (
+; IN VOID *LinearAddress
+; );
+;------------------------------------------------------------------------------
+AsmFlushCacheLine PROC
+ ;
+ ; If the CPU does not support CLFLUSH instruction,
+ ; then promote flush range to flush entire cache.
+ ;
+ mov eax, 1
+ push ebx
+ cpuid
+ pop ebx
+ mov eax, [esp + 4]
+ test edx, BIT19
+ jz @F
+ clflush [eax]
+ ret
+@@:
+ wbinvd
+ ret
+AsmFlushCacheLine ENDP
+
+ END