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Diffstat (limited to 'Core/MdePkg/Library/BaseLib/X64/EnableCache.asm')
-rw-r--r--Core/MdePkg/Library/BaseLib/X64/EnableCache.asm43
1 files changed, 43 insertions, 0 deletions
diff --git a/Core/MdePkg/Library/BaseLib/X64/EnableCache.asm b/Core/MdePkg/Library/BaseLib/X64/EnableCache.asm
new file mode 100644
index 0000000000..88b71d706f
--- /dev/null
+++ b/Core/MdePkg/Library/BaseLib/X64/EnableCache.asm
@@ -0,0 +1,43 @@
+;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; EnableCache.Asm
+;
+; Abstract:
+;
+; Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear
+; the NW bit of CR0 to 0
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmEnableCache (
+; VOID
+; );
+;------------------------------------------------------------------------------
+AsmEnableCache PROC
+ wbinvd
+ mov rax, cr0
+ btr rax, 29
+ btr rax, 30
+ mov cr0, rax
+ ret
+AsmEnableCache ENDP
+
+ END