diff options
Diffstat (limited to 'Core/MdePkg/Library/BaseSynchronizationLib/Ia32')
12 files changed, 737 insertions, 0 deletions
diff --git a/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c new file mode 100644 index 0000000000..bd81aad6c2 --- /dev/null +++ b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/GccInline.c @@ -0,0 +1,215 @@ +/** @file
+ GCC inline implementation of BaseSynchronizationLib processor specific functions.
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+/**
+ Performs an atomic increment of an 32-bit unsigned integer.
+
+ Performs an atomic increment of the 32-bit unsigned integer specified by
+ Value and returns the incremented value. The increment operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ @param Value A pointer to the 32-bit value to increment.
+
+ @return The incremented value.
+
+**/
+UINT32
+EFIAPI
+InternalSyncIncrement (
+ IN volatile UINT32 *Value
+ )
+{
+ UINT32 Result;
+
+ __asm__ __volatile__ (
+ "lock \n\t"
+ "incl %2 \n\t"
+ "movl %2, %%eax "
+ : "=a" (Result), // %0
+ "=m" (*Value) // %1
+ : "m" (*Value) // %2
+ : "memory",
+ "cc"
+ );
+
+ return Result;
+
+}
+
+
+/**
+ Performs an atomic decrement of an 32-bit unsigned integer.
+
+ Performs an atomic decrement of the 32-bit unsigned integer specified by
+ Value and returns the decremented value. The decrement operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ @param Value A pointer to the 32-bit value to decrement.
+
+ @return The decremented value.
+
+**/
+UINT32
+EFIAPI
+InternalSyncDecrement (
+ IN volatile UINT32 *Value
+ )
+{
+ UINT32 Result;
+
+ __asm__ __volatile__ (
+ "lock \n\t"
+ "decl %2 \n\t"
+ "movl %2, %%eax "
+ : "=a" (Result), // %0
+ "=m" (*Value) // %1
+ : "m" (*Value) // %2
+ : "memory",
+ "cc"
+ );
+
+ return Result;
+}
+
+/**
+ Performs an atomic compare exchange operation on a 16-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 16-bit unsigned integer
+ specified by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
+ then Value is returned. The compare exchange operation must be performed using
+ MP safe mechanisms.
+
+
+ @param Value A pointer to the 16-bit value for the compare exchange
+ operation.
+ @param CompareValue 16-bit value used in compare operation.
+ @param ExchangeValue 16-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT16
+EFIAPI
+InternalSyncCompareExchange16 (
+ IN OUT volatile UINT16 *Value,
+ IN UINT16 CompareValue,
+ IN UINT16 ExchangeValue
+ )
+{
+
+ __asm__ __volatile__ (
+ " \n\t"
+ "lock \n\t"
+ "cmpxchgw %1, %2 \n\t"
+ : "=a" (CompareValue)
+ : "q" (ExchangeValue),
+ "m" (*Value),
+ "0" (CompareValue)
+ : "memory",
+ "cc"
+ );
+
+ return CompareValue;
+}
+
+/**
+ Performs an atomic compare exchange operation on a 32-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 32-bit unsigned integer
+ specified by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
+ then Value is returned. The compare exchange operation must be performed using
+ MP safe mechanisms.
+
+
+ @param Value A pointer to the 32-bit value for the compare exchange
+ operation.
+ @param CompareValue 32-bit value used in compare operation.
+ @param ExchangeValue 32-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT32
+EFIAPI
+InternalSyncCompareExchange32 (
+ IN OUT volatile UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ )
+{
+
+ __asm__ __volatile__ (
+ " \n\t"
+ "lock \n\t"
+ "cmpxchgl %1, %2 \n\t"
+ : "=a" (CompareValue) // %0
+ : "q" (ExchangeValue), // %1
+ "m" (*Value), // %2
+ "0" (CompareValue) // %4
+ : "memory",
+ "cc"
+ );
+
+ return CompareValue;
+}
+
+/**
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
+ by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
+ CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
+ The compare exchange operation must be performed using MP safe mechanisms.
+
+
+ @param Value A pointer to the 64-bit value for the compare exchange
+ operation.
+ @param CompareValue 64-bit value used in compare operation.
+ @param ExchangeValue 64-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT64
+EFIAPI
+InternalSyncCompareExchange64 (
+ IN OUT volatile UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ )
+{
+ __asm__ __volatile__ (
+ " \n\t"
+ "push %%ebx \n\t"
+ "movl %2,%%ebx \n\t"
+ "lock \n\t"
+ "cmpxchg8b (%1) \n\t"
+ "pop %%ebx \n\t"
+ : "+A" (CompareValue) // %0
+ : "S" (Value), // %1
+ "r" ((UINT32) ExchangeValue), // %2
+ "c" ((UINT32) (ExchangeValue >> 32)) // %3
+ : "memory",
+ "cc"
+ );
+
+ return CompareValue;
+}
diff --git a/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange16.asm b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange16.asm new file mode 100644 index 0000000000..92a0f49bc0 --- /dev/null +++ b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange16.asm @@ -0,0 +1,46 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2015, Linaro Ltd. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedCompareExchange16.Asm
+;
+; Abstract:
+;
+; InterlockedCompareExchange16 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .486
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT16
+; EFIAPI
+; InternalSyncCompareExchange16 (
+; IN UINT16 *Value,
+; IN UINT16 CompareValue,
+; IN UINT16 ExchangeValue
+; );
+;------------------------------------------------------------------------------
+InternalSyncCompareExchange16 PROC
+ mov ecx, [esp + 4]
+ mov ax, [esp + 8]
+ mov dx, [esp + 12]
+ lock cmpxchg [ecx], dx
+ ret
+InternalSyncCompareExchange16 ENDP
+
+ END
diff --git a/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange16.c b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange16.c new file mode 100644 index 0000000000..3d5213743e --- /dev/null +++ b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange16.c @@ -0,0 +1,51 @@ +/** @file
+ InterlockedCompareExchange16 function
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015, Linaro Ltd. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Performs an atomic compare exchange operation on a 16-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 16-bit unsigned integer
+ specified by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
+ then Value is returned. The compare exchange operation must be performed using
+ MP safe mechanisms.
+
+ @param Value A pointer to the 16-bit value for the compare exchange
+ operation.
+ @param CompareValue 16-bit value used in compare operation.
+ @param ExchangeValue 16-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT16
+EFIAPI
+InternalSyncCompareExchange16 (
+ IN UINT16 *Value,
+ IN UINT16 CompareValue,
+ IN UINT16 ExchangeValue
+ )
+{
+ _asm {
+ mov ecx, Value
+ mov ax, CompareValue
+ mov dx, ExchangeValue
+ lock cmpxchg [ecx], dx
+ }
+}
+
diff --git a/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange32.asm b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange32.asm new file mode 100644 index 0000000000..78ea72c5c4 --- /dev/null +++ b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange32.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedCompareExchange32.Asm
+;
+; Abstract:
+;
+; InterlockedCompareExchange32 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .486
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InternalSyncCompareExchange32 (
+; IN UINT32 *Value,
+; IN UINT32 CompareValue,
+; IN UINT32 ExchangeValue
+; );
+;------------------------------------------------------------------------------
+InternalSyncCompareExchange32 PROC
+ mov ecx, [esp + 4]
+ mov eax, [esp + 8]
+ mov edx, [esp + 12]
+ lock cmpxchg [ecx], edx
+ ret
+InternalSyncCompareExchange32 ENDP
+
+ END
diff --git a/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange32.c b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange32.c new file mode 100644 index 0000000000..a2c6838970 --- /dev/null +++ b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange32.c @@ -0,0 +1,50 @@ +/** @file
+ InterlockedCompareExchange32 function
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Performs an atomic compare exchange operation on a 32-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 32-bit unsigned integer
+ specified by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
+ then Value is returned. The compare exchange operation must be performed using
+ MP safe mechanisms.
+
+ @param Value A pointer to the 32-bit value for the compare exchange
+ operation.
+ @param CompareValue 32-bit value used in compare operation.
+ @param ExchangeValue 32-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT32
+EFIAPI
+InternalSyncCompareExchange32 (
+ IN UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ )
+{
+ _asm {
+ mov ecx, Value
+ mov eax, CompareValue
+ mov edx, ExchangeValue
+ lock cmpxchg [ecx], edx
+ }
+}
+
diff --git a/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange64.asm b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange64.asm new file mode 100644 index 0000000000..0fcbd230ee --- /dev/null +++ b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange64.asm @@ -0,0 +1,47 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedCompareExchange64.Asm
+;
+; Abstract:
+;
+; InterlockedCompareExchange64 function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .586P
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT64
+; EFIAPI
+; InternalSyncCompareExchange64 (
+; IN UINT64 *Value,
+; IN UINT64 CompareValue,
+; IN UINT64 ExchangeValue
+; );
+;------------------------------------------------------------------------------
+InternalSyncCompareExchange64 PROC USES esi ebx
+ mov esi, [esp + 12]
+ mov eax, [esp + 16]
+ mov edx, [esp + 20]
+ mov ebx, [esp + 24]
+ mov ecx, [esp + 28]
+ lock cmpxchg8b qword ptr [esi]
+ ret
+InternalSyncCompareExchange64 ENDP
+
+ END
diff --git a/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange64.c b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange64.c new file mode 100644 index 0000000000..73af6ef91a --- /dev/null +++ b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedCompareExchange64.c @@ -0,0 +1,50 @@ +/** @file
+ InterlockedCompareExchange64 function
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
+ by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
+ CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
+ The compare exchange operation must be performed using MP safe mechanisms.
+
+ @param Value A pointer to the 64-bit value for the compare exchange
+ operation.
+ @param CompareValue A 64-bit value used in a compare operation.
+ @param ExchangeValue A 64-bit value used in an exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT64
+EFIAPI
+InternalSyncCompareExchange64 (
+ IN UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ )
+{
+ _asm {
+ mov esi, Value
+ mov eax, dword ptr [CompareValue + 0]
+ mov edx, dword ptr [CompareValue + 4]
+ mov ebx, dword ptr [ExchangeValue + 0]
+ mov ecx, dword ptr [ExchangeValue + 4]
+ lock cmpxchg8b qword ptr [esi]
+ }
+}
diff --git a/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedDecrement.asm b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedDecrement.asm new file mode 100644 index 0000000000..22cb0b2d38 --- /dev/null +++ b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedDecrement.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedDecrement.Asm
+;
+; Abstract:
+;
+; InterlockedDecrement function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InternalSyncDecrement (
+; IN UINT32 *Value
+; );
+;------------------------------------------------------------------------------
+InternalSyncDecrement PROC
+ mov eax, [esp + 4]
+ lock dec dword ptr [eax]
+ mov eax, [eax]
+ ret
+InternalSyncDecrement ENDP
+
+ END
diff --git a/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedDecrement.c b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedDecrement.c new file mode 100644 index 0000000000..7f18e0b6b7 --- /dev/null +++ b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedDecrement.c @@ -0,0 +1,42 @@ +/** @file
+ InterlockedDecrement function
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Performs an atomic decrement of an 32-bit unsigned integer.
+
+ Performs an atomic decrement of the 32-bit unsigned integer specified by
+ Value and returns the decrement value. The decrement operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ @param Value A pointer to the 32-bit value to decrement.
+
+ @return The decrement value.
+
+**/
+UINT32
+EFIAPI
+InternalSyncDecrement (
+ IN UINT32 *Value
+ )
+{
+ _asm {
+ mov eax, Value
+ lock dec dword ptr [eax]
+ mov eax, [eax]
+ }
+}
diff --git a/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedIncrement.asm b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedIncrement.asm new file mode 100644 index 0000000000..51675f600a --- /dev/null +++ b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedIncrement.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+; InterlockedIncrement.Asm
+;
+; Abstract:
+;
+; InterlockedIncrement function
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+ .386
+ .model flat,C
+ .code
+
+;------------------------------------------------------------------------------
+; UINT32
+; EFIAPI
+; InternalSyncIncrement (
+; IN UINT32 *Value
+; );
+;------------------------------------------------------------------------------
+InternalSyncIncrement PROC
+ mov eax, [esp + 4]
+ lock inc dword ptr [eax]
+ mov eax, [eax]
+ ret
+InternalSyncIncrement ENDP
+
+ END
diff --git a/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedIncrement.c b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedIncrement.c new file mode 100644 index 0000000000..cf9f92a021 --- /dev/null +++ b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InterlockedIncrement.c @@ -0,0 +1,43 @@ +/** @file
+ InterLockedIncrement function
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+ Performs an atomic increment of an 32-bit unsigned integer.
+
+ Performs an atomic increment of the 32-bit unsigned integer specified by
+ Value and returns the incremented value. The increment operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ @param Value A pointer to the 32-bit value to increment.
+
+ @return The incremented value.
+
+**/
+UINT32
+EFIAPI
+InternalSyncIncrement (
+ IN UINT32 *Value
+ )
+{
+ _asm {
+ mov eax, Value
+ lock inc dword ptr [eax]
+ mov eax, [eax]
+ }
+}
+
diff --git a/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c new file mode 100644 index 0000000000..60f5c7f36b --- /dev/null +++ b/Core/MdePkg/Library/BaseSynchronizationLib/Ia32/InternalGetSpinLockProperties.c @@ -0,0 +1,64 @@ +/** @file
+ Internal function to get spin lock alignment.
+
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "BaseSynchronizationLibInternals.h"
+
+/**
+ Internal function to retrieve the architecture specific spin lock alignment
+ requirements for optimal spin lock performance.
+
+ @return The architecture specific spin lock alignment.
+
+**/
+UINTN
+InternalGetSpinLockProperties (
+ VOID
+ )
+{
+ UINT32 RegEax;
+ UINT32 RegEbx;
+ UINTN FamilyId;
+ UINTN ModelId;
+ UINTN CacheLineSize;
+
+ //
+ // Retrieve CPUID Version Information
+ //
+ AsmCpuid (0x01, &RegEax, &RegEbx, NULL, NULL);
+ //
+ // EBX: Bits 15 - 08: CLFLUSH line size (Value * 8 = cache line size)
+ //
+ CacheLineSize = ((RegEbx >> 8) & 0xff) * 8;
+ //
+ // Retrieve CPU Family and Model
+ //
+ FamilyId = (RegEax >> 8) & 0xf;
+ ModelId = (RegEax >> 4) & 0xf;
+ if (FamilyId == 0x0f) {
+ //
+ // In processors based on Intel NetBurst microarchitecture, use two cache lines
+ //
+ ModelId = ModelId | ((RegEax >> 12) & 0xf0);
+ if (ModelId <= 0x04 || ModelId == 0x06) {
+ CacheLineSize *= 2;
+ }
+ }
+
+ if (CacheLineSize < 32) {
+ CacheLineSize = 32;
+ }
+
+ return CacheLineSize;
+}
+
|