diff options
Diffstat (limited to 'EdkCompatibilityPkg/Foundation/Cpu')
8 files changed, 990 insertions, 0 deletions
diff --git a/EdkCompatibilityPkg/Foundation/Cpu/Itanium/CpuIa64Lib/CpuIA64Lib.inf b/EdkCompatibilityPkg/Foundation/Cpu/Itanium/CpuIa64Lib/CpuIA64Lib.inf new file mode 100644 index 0000000000..62a3c49b0e --- /dev/null +++ b/EdkCompatibilityPkg/Foundation/Cpu/Itanium/CpuIa64Lib/CpuIA64Lib.inf @@ -0,0 +1,37 @@ +#/*++
+#
+# Copyright (c) 2004 - 2005, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuIA64Lib.inf
+#
+# Abstract:
+#
+# Component description file for the Cpu IA64 library.
+#
+#--*/
+
+[defines]
+BASE_NAME = CpuIA64Lib
+COMPONENT_TYPE = LIBRARY
+
+[sources.common]
+
+[sources.ipf]
+ Ipf\CpuIA64.s
+
+[includes.common]
+ $(EDK_SOURCE)\Foundation\Efi
+ .
+ $(EDK_SOURCE)\Foundation\Cpu\Itanium\Include
+ $(EDK_SOURCE)\Foundation\include
+
+[nmake.common]
diff --git a/EdkCompatibilityPkg/Foundation/Cpu/Itanium/CpuIa64Lib/Ipf/CpuIa64.s b/EdkCompatibilityPkg/Foundation/Cpu/Itanium/CpuIa64Lib/Ipf/CpuIa64.s new file mode 100644 index 0000000000..ddf5984e1a --- /dev/null +++ b/EdkCompatibilityPkg/Foundation/Cpu/Itanium/CpuIa64Lib/Ipf/CpuIa64.s @@ -0,0 +1,33 @@ +//****************************************************************************
+//
+// Copyright (c) 2004, Intel Corporation
+// All rights reserved. This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+// Module Name:
+//
+// CpuIA64.s
+//
+// Abstract:
+//
+// Contains basic assembly procedures to support IPF CPU.
+//
+//****************************************************************************
+
+.file "CpuIA64.s"
+
+#include "IpfMacro.i"
+#include "IpfDefines.h"
+
+
+PROCEDURE_ENTRY (EfiReadTsc)
+
+ mov r8 = ar.itc
+ br.ret.dpnt b0;;
+
+PROCEDURE_EXIT (EfiReadTsc)
\ No newline at end of file diff --git a/EdkCompatibilityPkg/Foundation/Cpu/Itanium/Include/CpuIa64.h b/EdkCompatibilityPkg/Foundation/Cpu/Itanium/Include/CpuIa64.h new file mode 100644 index 0000000000..c90cfe70c3 --- /dev/null +++ b/EdkCompatibilityPkg/Foundation/Cpu/Itanium/Include/CpuIa64.h @@ -0,0 +1,39 @@ +/*++
+
+Copyright (c) 2004, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ CpuIA64.h
+
+Abstract:
+
+--*/
+
+#ifndef _CPU_IA64_H
+#define _CPU_IA64_H
+
+#include "Tiano.h"
+
+UINT64
+EfiReadTsc (
+ VOID
+ )
+/*++
+Routine Description:
+ Read Time stamp
+Arguments:
+ None
+Returns:
+ Return the read data
+--*/
+;
+
+#endif
diff --git a/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/CpuIA32Lib.inf b/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/CpuIA32Lib.inf new file mode 100644 index 0000000000..09a464b941 --- /dev/null +++ b/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/CpuIA32Lib.inf @@ -0,0 +1,42 @@ +#/*++
+#
+# Copyright (c) 2004 - 2005, Intel Corporation
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+# Module Name:
+#
+# CpuIA32Lib.inf
+#
+# Abstract:
+#
+# Component description file for the Cpu IA32 library.
+#
+#--*/
+
+[defines]
+BASE_NAME = CpuIA32Lib
+COMPONENT_TYPE = LIBRARY
+
+[sources.common]
+ EfiCpuVersion.c
+
+[sources.ia32]
+ Ia32\CpuIA32.c
+
+[sources.x64]
+ x64\Cpu.asm
+[includes.common]
+ $(EDK_SOURCE)\Foundation\Efi
+ $(EDK_SOURCE)\Foundation\Efi\Include
+ $(EDK_SOURCE)\Foundation\Framework\Include
+ .
+ $(EDK_SOURCE)\Foundation\Cpu\Pentium\Include
+ $(EDK_SOURCE)\Foundation\Include
+
+[nmake.common]
diff --git a/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/EfiCpuVersion.c b/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/EfiCpuVersion.c new file mode 100644 index 0000000000..192469fecf --- /dev/null +++ b/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/EfiCpuVersion.c @@ -0,0 +1,73 @@ +/*++
+
+Copyright (c) 2004 - 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ EfiCpuVersion.c
+
+Abstract:
+
+ Provide cpu version extract considering extended family & model ID.
+--*/
+
+#include "CpuIA32.h"
+
+VOID
+EfiCpuVersion (
+ IN OUT UINT16 *FamilyId, OPTIONAL
+ IN OUT UINT8 *Model, OPTIONAL
+ IN OUT UINT8 *SteppingId, OPTIONAL
+ IN OUT UINT8 *Processor OPTIONAL
+ )
+/*++
+
+Routine Description:
+ Extract CPU detail version infomation
+
+Arguments:
+ FamilyId - FamilyId, including ExtendedFamilyId
+ Model - Model, including ExtendedModel
+ SteppingId - SteppingId
+ Processor - Processor
+
+--*/
+{
+ EFI_CPUID_REGISTER Register;
+ UINT8 TempFamilyId;
+
+ EfiCpuid (EFI_CPUID_VERSION_INFO, &Register);
+
+ if (SteppingId != NULL) {
+ *SteppingId = (UINT8) (Register.RegEax & 0xF);
+ }
+
+ if (Processor != NULL) {
+ *Processor = (UINT8) ((Register.RegEax >> 12) & 0x3);
+ }
+
+ if (Model != NULL || FamilyId != NULL) {
+ TempFamilyId = (UINT8) ((Register.RegEax >> 8) & 0xF);
+
+ if (Model != NULL) {
+ *Model = (UINT8) ((Register.RegEax >> 4) & 0xF);
+ if (TempFamilyId == 0x6 || TempFamilyId == 0xF) {
+ *Model |= (Register.RegEax >> 12) & 0xF0;
+ }
+ }
+
+ if (FamilyId != NULL) {
+ *FamilyId = TempFamilyId;
+ if (TempFamilyId == 0xF) {
+ *FamilyId = *FamilyId + (UINT16) ((Register.RegEax >> 20) & 0xFF);
+ }
+ }
+ }
+}
diff --git a/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/IA32/CpuIA32.c b/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/IA32/CpuIA32.c new file mode 100644 index 0000000000..4956179bab --- /dev/null +++ b/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/IA32/CpuIA32.c @@ -0,0 +1,179 @@ +/*++
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ CpuIA32.c
+
+Abstract:
+
+--*/
+
+#include "CpuIA32.h"
+
+VOID
+EfiHalt (VOID)
+{
+ __asm {
+ hlt
+ }
+}
+
+VOID
+EfiWbinvd (VOID)
+{
+ __asm {
+ wbinvd
+ }
+}
+
+VOID
+EfiInvd (VOID)
+{
+ __asm {
+ invd
+ }
+}
+
+VOID
+EfiCpuid (IN UINT32 RegisterInEax,
+ OUT EFI_CPUID_REGISTER *Reg OPTIONAL)
+{
+ __asm {
+ pushad
+
+ mov eax, RegisterInEax
+ cpuid
+ cmp Reg, 0
+ je _Exit
+ mov edi, DWORD PTR Reg
+
+ mov DWORD PTR [edi].RegEax, eax ; Reg->RegEax
+ mov DWORD PTR [edi].RegEbx, ebx ; Reg->RegEbx
+ mov DWORD PTR [edi].RegEcx, ecx ; Reg->RegEcx
+ mov DWORD PTR [edi].RegEdx, edx ; Reg->RegEdx
+
+_Exit:
+ popad
+ }
+}
+
+UINT64
+EfiReadMsr (IN UINT32 Index)
+{
+ __asm {
+ mov ecx, Index
+ rdmsr
+ }
+}
+
+VOID
+EfiWriteMsr (
+ IN UINT32 Index,
+ IN UINT64 Value
+ )
+{
+ __asm {
+ mov ecx, Index
+ mov eax, DWORD PTR Value[0]
+ mov edx, DWORD PTR Value[4]
+ wrmsr
+ }
+}
+
+UINT64
+EfiReadTsc (VOID)
+{
+ __asm {
+ rdtsc
+ }
+}
+
+VOID
+EfiDisableCache (VOID)
+{
+ __asm {
+ mov eax, cr0
+ bswap eax
+ and al, 60h
+ cmp al, 60h
+ je Exit
+ wbinvd
+ mov eax, cr0
+ or eax, 060000000h
+ mov cr0, eax
+Exit:
+ }
+}
+
+VOID
+EfiEnableCache (VOID)
+{
+ __asm {
+ invd
+ mov eax, cr0
+ and eax, 09fffffffh
+ mov cr0, eax
+ }
+}
+
+UINT32
+EfiGetEflags (
+ VOID
+ )
+{
+ __asm {
+ pushfd
+ pop eax
+ }
+}
+
+VOID
+EfiDisableInterrupts (VOID)
+{
+ __asm {
+ cli
+ }
+}
+
+VOID
+EfiEnableInterrupts (
+ VOID
+ )
+{
+ __asm {
+ sti
+ }
+}
+
+VOID
+EfiCpuidExt (
+ IN UINT32 RegisterInEax,
+ IN UINT32 CacheLevel,
+ OUT EFI_CPUID_REGISTER *Regs
+ )
+{
+ __asm {
+ pushad
+
+ mov eax, RegisterInEax
+ mov ecx, CacheLevel
+ cpuid
+ mov edi, DWORD PTR Regs
+
+ mov DWORD PTR [edi].RegEax, eax ; Reg->RegEax
+ mov DWORD PTR [edi].RegEbx, ebx ; Reg->RegEbx
+ mov DWORD PTR [edi].RegEcx, ecx ; Reg->RegEcx
+ mov DWORD PTR [edi].RegEdx, edx ; Reg->RegEdx
+
+ popad
+ }
+}
diff --git a/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/x64/Cpu.asm b/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/x64/Cpu.asm new file mode 100644 index 0000000000..8e46f9b69f --- /dev/null +++ b/EdkCompatibilityPkg/Foundation/Cpu/Pentium/CpuIA32Lib/x64/Cpu.asm @@ -0,0 +1,215 @@ +TITLE Cpu.asm: Assembly code for the x64 resources
+
+;------------------------------------------------------------------------------
+;*
+;* Copyright (c) 2005 - 2007, Intel Corporation
+;* All rights reserved. This program and the accompanying materials
+;* are licensed and made available under the terms and conditions of the BSD License
+;* which accompanies this distribution. The full text of the license may be found at
+;* http://opensource.org/licenses/bsd-license.php
+;*
+;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;*
+;* Module Name:
+;*
+;* Cpu.asm
+;*
+;* Abstract:
+;*
+;------------------------------------------------------------------------------
+
+text SEGMENT
+
+
+;------------------------------------------------------------------------------
+; VOID
+; EfiHalt (
+; VOID
+; )
+;------------------------------------------------------------------------------
+EfiHalt PROC PUBLIC
+ hlt
+ ret
+EfiHalt ENDP
+
+
+;------------------------------------------------------------------------------
+; VOID
+; EfiWbinvd (
+; VOID
+; )
+;------------------------------------------------------------------------------
+EfiWbinvd PROC PUBLIC
+ wbinvd
+ ret
+EfiWbinvd ENDP
+
+
+;------------------------------------------------------------------------------
+; VOID
+; EfiInvd (
+; VOID
+; )
+;------------------------------------------------------------------------------
+EfiInvd PROC PUBLIC
+ invd
+ ret
+EfiInvd ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EfiCpuid (
+; IN UINT32 RegisterInEax, // rcx
+; OUT EFI_CPUID_REGISTER *Reg OPTIONAL // rdx
+; )
+;------------------------------------------------------------------------------
+EfiCpuid PROC PUBLIC
+ push rbx
+
+ mov r8, rdx ; r8 = *Reg
+ mov rax, rcx ; RegisterInEax
+ cpuid
+ cmp r8, 0
+ je _Exit
+ mov [r8 + 0], eax ; Reg->RegEax
+ mov [r8 + 4], ebx ; Reg->RegEbx
+ mov [r8 + 8], ecx ; Reg->RegEcx
+ mov [r8 + 12], edx ; Reg->RegEdx
+
+_Exit:
+ pop rbx
+ ret
+EfiCpuid ENDP
+
+;------------------------------------------------------------------------------
+; UINT64
+; EfiReadMsr (
+; IN UINT32 Index, // rcx
+; )
+;------------------------------------------------------------------------------
+EfiReadMsr PROC PUBLIC
+ rdmsr
+ sal rdx, 32 ; edx:eax -> rax
+ or rax, rdx ; rax = edx:eax
+ ret
+EfiReadMsr ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EfiWriteMsr (
+; IN UINT32 Index, // rcx
+; IN UINT64 Value // rdx
+; )
+;------------------------------------------------------------------------------
+EfiWriteMsr PROC PUBLIC
+ mov rax, rdx ; rdx = Value
+ sar rdx, 32 ; convert rdx to edx upper 32-bits
+ wrmsr ; wrmsr[ecx] result = edx:eax
+ ret
+EfiWriteMsr ENDP
+
+
+;------------------------------------------------------------------------------
+; UINT64
+; EfiReadTsc (
+; VOID
+; );
+;------------------------------------------------------------------------------
+EfiReadTsc PROC PUBLIC
+ rdtsc
+ shl rax, 32
+ shrd rax, rdx, 32
+ ret
+EfiReadTsc ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EfiDisableCache (
+; VOID
+; );
+;------------------------------------------------------------------------------
+EfiDisableCache PROC PUBLIC
+; added a check to see if cache is already disabled. If it is, then skip.
+ mov rax, cr0
+ and rax, 060000000h
+ cmp rax, 0
+ jne @f
+ wbinvd
+ mov rax, cr0
+ or rax, 060000000h
+ mov cr0, rax
+@@:
+ ret
+EfiDisableCache ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EfiEnableCache (
+; VOID
+; );
+;------------------------------------------------------------------------------
+EfiEnableCache PROC PUBLIC
+ invd
+ mov rax, cr0
+ and rax, 09fffffffh
+ mov cr0, rax
+ ret
+EfiEnableCache ENDP
+
+;------------------------------------------------------------------------------
+; UINTN
+; EfiGetEflags (
+; VOID
+; );
+;------------------------------------------------------------------------------
+EfiGetEflags PROC PUBLIC
+ pushfq
+ pop rax
+ ret
+EfiGetEflags ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EfiDisableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+EfiDisableInterrupts PROC PUBLIC
+ cli
+ ret
+EfiDisableInterrupts ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EfiEnableInterrupts (
+; VOID
+; );
+;------------------------------------------------------------------------------
+EfiEnableInterrupts PROC PUBLIC
+ sti
+ ret
+EfiEnableInterrupts ENDP
+;------------------------------------------------------------------------------
+; VOID
+; EfiCpuidExt (
+; IN UINT32 RegisterInEax,
+; IN UINT32 CacheLevel,
+; OUT EFI_CPUID_REGISTER *Regs
+; )
+;------------------------------------------------------------------------------
+EfiCpuidExt PROC PUBLIC
+ push rbx
+ mov rax, rcx ; rax = RegisterInEax
+ mov rcx, rdx ; rcx = CacheLevel
+
+ cpuid
+ mov [r8 + 0 ], eax ; Reg->RegEax
+ mov [r8 + 4 ], ebx ; Reg->RegEbx
+ mov [r8 + 8 ], ecx ; Reg->RegEcx
+ mov [r8 + 12], edx ; Reg->RegEdx
+
+ pop rbx
+ ret
+EfiCpuidExt ENDP
+END
diff --git a/EdkCompatibilityPkg/Foundation/Cpu/Pentium/Include/CpuIA32.h b/EdkCompatibilityPkg/Foundation/Cpu/Pentium/Include/CpuIA32.h new file mode 100644 index 0000000000..a7fe8b0005 --- /dev/null +++ b/EdkCompatibilityPkg/Foundation/Cpu/Pentium/Include/CpuIA32.h @@ -0,0 +1,372 @@ +/*++
+
+Copyright (c) 2004 - 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ CpuIA32.h
+
+Abstract:
+
+--*/
+
+#ifndef _CPU_IA32_H
+#define _CPU_IA32_H
+
+#include "Tiano.h"
+
+#define IA32API __cdecl
+
+typedef struct {
+ UINT32 RegEax;
+ UINT32 RegEbx;
+ UINT32 RegEcx;
+ UINT32 RegEdx;
+} EFI_CPUID_REGISTER;
+
+typedef struct {
+ UINT32 HeaderVersion;
+ UINT32 UpdateRevision;
+ UINT32 Date;
+ UINT32 ProcessorId;
+ UINT32 Checksum;
+ UINT32 LoaderRevision;
+ UINT32 ProcessorFlags;
+ UINT32 DataSize;
+ UINT32 TotalSize;
+ UINT8 Reserved[12];
+} EFI_CPU_MICROCODE_HEADER;
+
+typedef struct {
+ UINT32 ExtendedSignatureCount;
+ UINT32 ExtendedTableChecksum;
+ UINT8 Reserved[12];
+} EFI_CPU_MICROCODE_EXTENDED_TABLE_HEADER;
+
+typedef struct {
+ UINT32 ProcessorSignature;
+ UINT32 ProcessorFlag;
+ UINT32 ProcessorChecksum;
+} EFI_CPU_MICROCODE_EXTENDED_TABLE;
+
+typedef struct {
+ UINT32 Stepping : 4;
+ UINT32 Model : 4;
+ UINT32 Family : 4;
+ UINT32 Type : 2;
+ UINT32 Reserved1 : 2;
+ UINT32 ExtendedModel : 4;
+ UINT32 ExtendedFamily : 8;
+ UINT32 Reserved2 : 4;
+} EFI_CPU_VERSION;
+
+#define EFI_CPUID_SIGNATURE 0x0
+#define EFI_CPUID_VERSION_INFO 0x1
+#define EFI_CPUID_CACHE_INFO 0x2
+#define EFI_CPUID_SERIAL_NUMBER 0x3
+#define EFI_CPUID_EXTENDED_FUNCTION 0x80000000
+#define EFI_CPUID_EXTENDED_CPU_SIG 0x80000001
+#define EFI_CPUID_BRAND_STRING1 0x80000002
+#define EFI_CPUID_BRAND_STRING2 0x80000003
+#define EFI_CPUID_BRAND_STRING3 0x80000004
+
+#define EFI_MSR_IA32_PLATFORM_ID 0x17
+#define EFI_MSR_IA32_APIC_BASE 0x1B
+#define EFI_MSR_EBC_HARD_POWERON 0x2A
+#define EFI_MSR_EBC_SOFT_POWERON 0x2B
+#define BINIT_DRIVER_DISABLE 0x40
+#define INTERNAL_MCERR_DISABLE 0x20
+#define INITIATOR_MCERR_DISABLE 0x10
+#define EFI_MSR_EBC_FREQUENCY_ID 0x2C
+#define EFI_MSR_IA32_BIOS_UPDT_TRIG 0x79
+#define EFI_MSR_IA32_BIOS_SIGN_ID 0x8B
+#define EFI_MSR_PSB_CLOCK_STATUS 0xCD
+#define EFI_APIC_GLOBAL_ENABLE 0x800
+#define EFI_MSR_IA32_MISC_ENABLE 0x1A0
+#define LIMIT_CPUID_MAXVAL_ENABLE_BIT 0x00400000
+#define AUTOMATIC_THERMAL_CONTROL_ENABLE_BIT 0x00000008
+#define COMPATIBLE_FPU_OPCODE_ENABLE_BIT 0x00000004
+#define LOGICAL_PROCESSOR_PRIORITY_ENABLE_BIT 0x00000002
+#define FAST_STRING_ENABLE_BIT 0x00000001
+
+#define EFI_CACHE_VARIABLE_MTRR_BASE 0x200
+#define EFI_CACHE_VARIABLE_MTRR_END 0x20F
+#define EFI_CACHE_IA32_MTRR_DEF_TYPE 0x2FF
+#define EFI_CACHE_MTRR_VALID 0x800
+#define EFI_CACHE_FIXED_MTRR_VALID 0x400
+#define EFI_CACHE_VALID_ADDRESS 0xFFFFFF000
+#define EFI_MSR_VALID_MASK 0xFFFFFFFFF
+#define EFI_CACHE_VALID_EXTENDED_ADDRESS 0xFFFFFFFFFF000
+#define EFI_MSR_VALID_EXTENDED_MASK 0xFFFFFFFFFFFFF
+
+#define EFI_IA32_MTRR_FIX64K_00000 0x250
+#define EFI_IA32_MTRR_FIX16K_80000 0x258
+#define EFI_IA32_MTRR_FIX16K_A0000 0x259
+#define EFI_IA32_MTRR_FIX4K_C0000 0x268
+#define EFI_IA32_MTRR_FIX4K_C8000 0x269
+#define EFI_IA32_MTRR_FIX4K_D0000 0x26A
+#define EFI_IA32_MTRR_FIX4K_D8000 0x26B
+#define EFI_IA32_MTRR_FIX4K_E0000 0x26C
+#define EFI_IA32_MTRR_FIX4K_E8000 0x26D
+#define EFI_IA32_MTRR_FIX4K_F0000 0x26E
+#define EFI_IA32_MTRR_FIX4K_F8000 0x26F
+
+#define EFI_IA32_MCG_CAP 0x179
+#define EFI_IA32_MCG_CTL 0x17B
+#define EFI_IA32_MC0_CTL 0x400
+#define EFI_IA32_MC0_STATUS 0x401
+
+#define EFI_IA32_PERF_STATUS 0x198
+#define EFI_IA32_PERF_CTL 0x199
+
+#define EFI_CACHE_UNCACHEABLE 0
+#define EFI_CACHE_WRITECOMBINING 1
+#define EFI_CACHE_WRITETHROUGH 4
+#define EFI_CACHE_WRITEPROTECTED 5
+#define EFI_CACHE_WRITEBACK 6
+
+//
+// Combine f(FamilyId), m(Model), s(SteppingId) to a single 32 bit number
+//
+#define EfiMakeCpuVersion(f, m, s) \
+ (((UINT32) (f) << 16) | ((UINT32) (m) << 8) | ((UINT32) (s)))
+
+VOID
+IA32API
+EfiHalt (
+ VOID
+ )
+;
+
+/*++
+Routine Description:
+ Halt the Cpu
+Arguments:
+ None
+Returns:
+ None
+--*/
+VOID
+IA32API
+EfiWbinvd (
+ VOID
+ )
+;
+
+/*++
+Routine Description:
+ Write back and invalidate the Cpu cache
+Arguments:
+ None
+Returns:
+ None
+--*/
+VOID
+IA32API
+EfiInvd (
+ VOID
+ )
+;
+
+/*++
+Routine Description:
+ Invalidate the Cpu cache
+Arguments:
+ None
+Returns:
+ None
+--*/
+VOID
+IA32API
+EfiCpuid (
+ IN UINT32 RegisterInEax,
+ OUT EFI_CPUID_REGISTER *Regs
+ )
+;
+
+/*++
+Routine Description:
+ Get the Cpu info by excute the CPUID instruction
+Arguments:
+ RegisterInEax: -The input value to put into register EAX
+ Regs: -The Output value
+Returns:
+ None
+--*/
+
+VOID
+IA32API
+EfiCpuidExt (
+ IN UINT32 RegisterInEax,
+ IN UINT32 CacheLevel,
+ OUT EFI_CPUID_REGISTER *Regs
+ )
+/*++
+Routine Description:
+ When RegisterInEax != 4, the functionality is the same as EfiCpuid.
+ When RegisterInEax == 4, the function return the deterministic cache
+ parameters by excuting the CPUID instruction
+Arguments:
+ RegisterInEax: - The input value to put into register EAX
+ CacheLevel: - The deterministic cache level
+ Regs: - The Output value
+Returns:
+ None
+--*/
+;
+
+UINT64
+IA32API
+EfiReadMsr (
+ IN UINT32 Index
+ )
+;
+
+/*++
+Routine Description:
+ Read Cpu MSR
+Arguments:
+ Index: -The index value to select the register
+
+Returns:
+ Return the read data
+--*/
+VOID
+IA32API
+EfiWriteMsr (
+ IN UINT32 Index,
+ IN UINT64 Value
+ )
+;
+
+/*++
+Routine Description:
+ Write Cpu MSR
+Arguments:
+ Index: -The index value to select the register
+ Value: -The value to write to the selected register
+Returns:
+ None
+--*/
+UINT64
+IA32API
+EfiReadTsc (
+ VOID
+ )
+;
+
+/*++
+Routine Description:
+ Read Time stamp
+Arguments:
+ None
+Returns:
+ Return the read data
+--*/
+VOID
+IA32API
+EfiDisableCache (
+ VOID
+ )
+;
+
+/*++
+Routine Description:
+ Writing back and invalidate the cache,then diable it
+Arguments:
+ None
+Returns:
+ None
+--*/
+VOID
+IA32API
+EfiEnableCache (
+ VOID
+ )
+;
+
+/*++
+Routine Description:
+ Invalidate the cache,then Enable it
+Arguments:
+ None
+Returns:
+ None
+--*/
+UINT32
+IA32API
+EfiGetEflags (
+ VOID
+ )
+;
+
+/*++
+Routine Description:
+ Get Eflags
+Arguments:
+ None
+Returns:
+ Return the Eflags value
+--*/
+VOID
+IA32API
+EfiDisableInterrupts (
+ VOID
+ )
+;
+
+/*++
+Routine Description:
+ Disable Interrupts
+Arguments:
+ None
+Returns:
+ None
+--*/
+VOID
+IA32API
+EfiEnableInterrupts (
+ VOID
+ )
+;
+
+/*++
+Routine Description:
+ Enable Interrupts
+Arguments:
+ None
+Returns:
+ None
+--*/
+
+
+VOID
+IA32API
+EfiCpuVersion (
+ IN UINT16 *FamilyId, OPTIONAL
+ IN UINT8 *Model, OPTIONAL
+ IN UINT8 *SteppingId, OPTIONAL
+ IN UINT8 *Processor OPTIONAL
+ )
+/*++
+
+Routine Description:
+ Extract CPU detail version infomation
+
+Arguments:
+ FamilyId - FamilyId, including ExtendedFamilyId
+ Model - Model, including ExtendedModel
+ SteppingId - SteppingId
+ Processor - Processor
+
+--*/
+;
+
+#endif
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