diff options
Diffstat (limited to 'IntelFrameworkPkg/Include/Framework')
10 files changed, 4462 insertions, 0 deletions
diff --git a/IntelFrameworkPkg/Include/Framework/DataHubRecords.h b/IntelFrameworkPkg/Include/Framework/DataHubRecords.h new file mode 100644 index 0000000000..cd7fe979cb --- /dev/null +++ b/IntelFrameworkPkg/Include/Framework/DataHubRecords.h @@ -0,0 +1,1917 @@ +/** @file
+ This file defines GUIDs and associated data structures for records posted to the Data Hub.
+ The producers of these records use these definitions to construct records.
+ The consumers of these records use these definitions to retrieve, filter and parse records.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DataHubRecords.h
+
+ @par Revision Reference:
+ DataHubRecord.h include all data hub sub class defitions from Cache subclass
+ spec 0.9, DataHub SubClass spec 0.9, Memory SubClass Spec 0.9, Processor
+ Subclass spec 0.9,Misc SubClass spec 0.9.
+
+**/
+
+#ifndef _DATAHUB_RECORDS_H_
+#define _DATAHUB_RECORDS_H_
+
+#include <PiPei.h>
+#include <Protocol/DevicePath.h>
+
+#define EFI_PROCESSOR_SUBCLASS_VERSION 0x00010000
+
+#include <Protocol/DevicePath.h>
+
+#pragma pack(1)
+
+typedef struct _USB_PORT_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} USB_PORT_DEVICE_PATH;
+
+//
+// IDE
+//
+typedef struct _IDE_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} IDE_DEVICE_PATH;
+
+//
+// RMC Connector
+//
+typedef struct _RMC_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} RMC_CONN_DEVICE_PATH;
+
+//
+// RIDE
+//
+typedef struct _RIDE_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} RIDE_DEVICE_PATH;
+
+//
+// Gigabit NIC
+//
+typedef struct _GB_NIC_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBridgeDevicePath;
+ PCI_DEVICE_PATH PciXBridgeDevicePath;
+ PCI_DEVICE_PATH PciXBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} GB_NIC_DEVICE_PATH;
+
+//
+// P/S2 Connector
+//
+typedef struct _PS2_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} PS2_CONN_DEVICE_PATH;
+
+//
+// Serial Port Connector
+//
+typedef struct _SERIAL_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} SERIAL_CONN_DEVICE_PATH;
+
+//
+// Parallel Port Connector
+//
+typedef struct _PARALLEL_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} PARALLEL_CONN_DEVICE_PATH;
+
+//
+// Floopy Connector
+//
+typedef struct _FLOOPY_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} FLOOPY_CONN_DEVICE_PATH;
+
+typedef union _EFI_MISC_PORT_DEVICE_PATH {
+ USB_PORT_DEVICE_PATH UsbDevicePath;
+ IDE_DEVICE_PATH IdeDevicePath;
+ RMC_CONN_DEVICE_PATH RmcConnDevicePath;
+ RIDE_DEVICE_PATH RideDevicePath;
+ GB_NIC_DEVICE_PATH GbNicDevicePath;
+ PS2_CONN_DEVICE_PATH Ps2ConnDevicePath;
+ SERIAL_CONN_DEVICE_PATH SerialConnDevicePath;
+ PARALLEL_CONN_DEVICE_PATH ParallelConnDevicePath;
+ FLOOPY_CONN_DEVICE_PATH FloppyConnDevicePath;
+} EFI_MISC_PORT_DEVICE_PATH;
+
+#pragma pack()
+
+//
+// String Token Definition
+//
+#define EFI_STRING_TOKEN UINT16
+
+typedef struct {
+ UINT32 Version;
+ UINT32 HeaderSize;
+ UINT16 Instance;
+ UINT16 SubInstance;
+ UINT32 RecordType;
+} EFI_SUBCLASS_TYPE1_HEADER;
+
+typedef struct {
+ EFI_GUID ProducerName;
+ UINT16 Instance;
+ UINT16 SubInstance;
+} EFI_INTER_LINK_DATA;
+
+
+//
+// EXP data
+//
+
+typedef struct {
+ UINT16 Value;
+ UINT16 Exponent;
+} EFI_EXP_BASE2_DATA;
+
+
+typedef struct {
+ UINT16 Value;
+ UINT16 Exponent;
+} EFI_EXP_BASE10_DATA;
+
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_CORE_FREQUENCY_DATA;
+
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_FSB_FREQUENCY_DATA;
+
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_CORE_FREQUENCY_DATA;
+
+typedef EFI_EXP_BASE10_DATA *EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA;
+
+typedef EFI_EXP_BASE10_DATA *EFI_PROCESSOR_FSB_FREQUENCY_LIST_DATA;
+
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_FSB_FREQUENCY_DATA;
+
+typedef STRING_REF EFI_PROCESSOR_VERSION_DATA;
+
+typedef STRING_REF EFI_PROCESSOR_MANUFACTURER_DATA;
+
+typedef STRING_REF EFI_PROCESSOR_SERIAL_NUMBER_DATA;
+
+typedef STRING_REF EFI_PROCESSOR_ASSET_TAG_DATA;
+
+typedef struct {
+ UINT32 ProcessorSteppingId:4;
+ UINT32 ProcessorModel: 4;
+ UINT32 ProcessorFamily: 4;
+ UINT32 ProcessorType: 2;
+ UINT32 ProcessorReserved1: 2;
+ UINT32 ProcessorXModel: 4;
+ UINT32 ProcessorXFamily: 8;
+ UINT32 ProcessorReserved2: 4;
+} EFI_PROCESSOR_SIGNATURE;
+
+typedef struct {
+ UINT32 ProcessorBrandIndex :8;
+ UINT32 ProcessorClflush :8;
+ UINT32 ProcessorReserved :8;
+ UINT32 ProcessorDfltApicId :8;
+} EFI_PROCESSOR_MISC_INFO;
+
+typedef struct {
+ UINT32 ProcessorFpu: 1;
+ UINT32 ProcessorVme: 1;
+ UINT32 ProcessorDe: 1;
+ UINT32 ProcessorPse: 1;
+ UINT32 ProcessorTsc: 1;
+ UINT32 ProcessorMsr: 1;
+ UINT32 ProcessorPae: 1;
+ UINT32 ProcessorMce: 1;
+ UINT32 ProcessorCx8: 1;
+ UINT32 ProcessorApic: 1;
+ UINT32 ProcessorReserved1: 1;
+ UINT32 ProcessorSep: 1;
+ UINT32 ProcessorMtrr: 1;
+ UINT32 ProcessorPge: 1;
+ UINT32 ProcessorMca: 1;
+ UINT32 ProcessorCmov: 1;
+ UINT32 ProcessorPat: 1;
+ UINT32 ProcessorPse36: 1;
+ UINT32 ProcessorPsn: 1;
+ UINT32 ProcessorClfsh: 1;
+ UINT32 ProcessorReserved2: 1;
+ UINT32 ProcessorDs: 1;
+ UINT32 ProcessorAcpi: 1;
+ UINT32 ProcessorMmx: 1;
+ UINT32 ProcessorFxsr: 1;
+ UINT32 ProcessorSse: 1;
+ UINT32 ProcessorSse2: 1;
+ UINT32 ProcessorSs: 1;
+ UINT32 ProcessorReserved3: 1;
+ UINT32 ProcessorTm: 1;
+ UINT32 ProcessorReserved4: 2;
+} EFI_PROCESSOR_FEATURE_FLAGS;
+
+typedef struct {
+ EFI_PROCESSOR_SIGNATURE Signature;
+ EFI_PROCESSOR_MISC_INFO MiscInfo;
+ UINT32 Reserved;
+ EFI_PROCESSOR_FEATURE_FLAGS FeatureFlags;
+} EFI_PROCESSOR_ID_DATA;
+
+typedef enum {
+ EfiProcessorOther = 1,
+ EfiProcessorUnknown = 2,
+ EfiCentralProcessor = 3,
+ EfiMathProcessor = 4,
+ EfiDspProcessor = 5,
+ EfiVideoProcessor = 6
+} EFI_PROCESSOR_TYPE_DATA;
+
+typedef enum {
+ EfiProcessorFamilyOther = 1,
+ EfiProcessorFamilyUnknown = 2,
+ EfiProcessorFamily8086 = 3,
+ EfiProcessorFamily80286 = 4,
+ EfiProcessorFamilyIntel386 = 5,
+ EfiProcessorFamilyIntel486 = 6,
+ EfiProcessorFamily8087 = 7,
+ EfiProcessorFamily80287 = 8,
+ EfiProcessorFamily80387 = 9,
+ EfiProcessorFamily80487 = 0x0A,
+ EfiProcessorFamilyPentium = 0x0B,
+ EfiProcessorFamilyPentiumPro = 0x0C,
+ EfiProcessorFamilyPentiumII = 0x0D,
+ EfiProcessorFamilyPentiumMMX = 0x0E,
+ EfiProcessorFamilyCeleron = 0x0F,
+ EfiProcessorFamilyPentiumIIXeon = 0x10,
+ EfiProcessorFamilyPentiumIII = 0x11,
+ EfiProcessorFamilyM1 = 0x12,
+ EfiProcessorFamilyM1Reserved1 = 0x13,
+ EfiProcessorFamilyM1Reserved2 = 0x14,
+ EfiProcessorFamilyM1Reserved3 = 0x15,
+ EfiProcessorFamilyM1Reserved4 = 0x16,
+ EfiProcessorFamilyM1Reserved5 = 0x17,
+ EfiProcessorFamilyM1Reserved6 = 0x18,
+ EfiProcessorFamilyK5 = 0x19,
+ EfiProcessorFamilyK5Reserved1 = 0x1A,
+ EfiProcessorFamilyK5Reserved2 = 0x1B,
+ EfiProcessorFamilyK5Reserved3 = 0x1C,
+ EfiProcessorFamilyK5Reserved4 = 0x1D,
+ EfiProcessorFamilyK5Reserved5 = 0x1E,
+ EfiProcessorFamilyK5Reserved6 = 0x1F,
+ EfiProcessorFamilyPowerPC = 0x20,
+ EfiProcessorFamilyPowerPC601 = 0x21,
+ EfiProcessorFamilyPowerPC603 = 0x22,
+ EfiProcessorFamilyPowerPC603Plus = 0x23,
+ EfiProcessorFamilyPowerPC604 = 0x24,
+ EfiProcessorFamilyAlpha2 = 0x30,
+ EfiProcessorFamilyMips = 0x40,
+ EfiProcessorFamilySparc = 0x50,
+ EfiProcessorFamily68040 = 0x60,
+ EfiProcessorFamily68xxx = 0x61,
+ EfiProcessorFamily68000 = 0x62,
+ EfiProcessorFamily68010 = 0x63,
+ EfiProcessorFamily68020 = 0x64,
+ EfiProcessorFamily68030 = 0x65,
+ EfiProcessorFamilyHobbit = 0x70,
+ EfiProcessorFamilyWeitek = 0x80,
+ EfiProcessorFamilyPARISC = 0x90,
+ EfiProcessorFamilyV30 = 0xA0,
+ EfiProcessorFamilyPentiumIIIXeon = 0xB0,
+ EfiProcessorFamilyPentiumIIISpeedStep = 0xB1,
+ EfiProcessorFamilyPentium4 = 0xB2,
+ EfiProcessorFamilyIntelXeon = 0xB3,
+ EfiProcessorFamilyAS400 = 0xB4,
+ EfiProcessorFamilyIntelXeonMP = 0xB5,
+ EfiProcessorFamilyAMDAthlonXP = 0xB6,
+ EfiProcessorFamilyAMDAthlonMP = 0xB7,
+ EfiProcessorFamilyIntelPentiumM = 0xB9,
+ EfiProcessorFamilyIntelCeleronD = 0xBA,
+ EfiProcessorFamilyIntelPentiumD = 0xBB,
+ EfiProcessorFamilyIntelPentiumEx = 0xBC,
+ EfiProcessorFamilyIBM390 = 0xC8,
+ EfiProcessorFamilyG4 = 0xC9,
+ EfiProcessorFamilyG5 = 0xCA,
+ EfiProcessorFamilyi860 = 0xFA,
+ EfiProcessorFamilyi960 = 0xFB
+} EFI_PROCESSOR_FAMILY_DATA;
+
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_VOLTAGE_DATA;
+
+typedef EFI_PHYSICAL_ADDRESS EFI_PROCESSOR_APIC_BASE_ADDRESS_DATA;
+
+typedef UINT32 EFI_PROCESSOR_APIC_ID_DATA;
+
+typedef UINT32 EFI_PROCESSOR_APIC_VERSION_NUMBER_DATA;
+
+typedef enum {
+ EfiProcessorIa32Microcode = 1,
+ EfiProcessorIpfPalAMicrocode = 2,
+ EfiProcessorIpfPalBMicrocode = 3
+} EFI_PROCESSOR_MICROCODE_TYPE;
+
+typedef struct {
+ EFI_PROCESSOR_MICROCODE_TYPE ProcessorMicrocodeType;
+ UINT32 ProcessorMicrocodeRevisionNumber;
+} EFI_PROCESSOR_MICROCODE_REVISION_DATA;
+
+typedef struct {
+ UINT32 CpuStatus :3;
+ UINT32 Reserved1 :3;
+ UINT32 SocketPopulated :1;
+ UINT32 Reserved2 :1;
+ UINT32 ApicEnable :1;
+ UINT32 BootApplicationProcessor :1;
+ UINT32 Reserved3 :22;
+} EFI_PROCESSOR_STATUS_DATA;
+
+typedef enum {
+ EfiCpuStatusUnknown = 0,
+ EfiCpuStatusEnabled = 1,
+ EfiCpuStatusDisabledByUser = 2,
+ EfiCpuStatusDisabledbyBios = 3,
+ EfiCpuStatusIdle = 4,
+ EfiCpuStatusOther = 7
+} EFI_CPU_STATUS;
+
+typedef enum {
+ EfiProcessorSocketOther = 1,
+ EfiProcessorSocketUnknown = 2,
+ EfiProcessorSocketDaughterBoard = 3,
+ EfiProcessorSocketZIF = 4,
+ EfiProcessorSocketReplacePiggyBack = 5,
+ EfiProcessorSocketNone = 6,
+ EfiProcessorSocketLIF = 7,
+ EfiProcessorSocketSlot1 = 8,
+ EfiProcessorSocketSlot2 = 9,
+ EfiProcessorSocket370Pin = 0xA,
+ EfiProcessorSocketSlotA = 0xB,
+ EfiProcessorSocketSlotM = 0xC,
+ EfiProcessorSocket423 = 0xD,
+ EfiProcessorSocketA462 = 0xE,
+ EfiProcessorSocket478 = 0xF,
+ EfiProcessorSocket754 = 0x10,
+ EfiProcessorSocket940 = 0x11,
+ EfiProcessorSocket939 = 0x12,
+ EfiProcessorSocketmPGA604 = 0x13,
+ EfiProcessorSocketLGA771 = 0x14,
+ EfiProcessorSocketLGA775 = 0x15
+
+} EFI_PROCESSOR_SOCKET_TYPE_DATA;
+
+typedef STRING_REF EFI_PROCESSOR_SOCKET_NAME_DATA;
+
+typedef EFI_INTER_LINK_DATA EFI_CACHE_ASSOCIATION_DATA;
+
+typedef enum {
+ EfiProcessorHealthy = 1,
+ EfiProcessorPerfRestricted = 2,
+ EfiProcessorFuncRestricted = 3
+} EFI_PROCESSOR_HEALTH_STATUS;
+
+typedef UINTN EFI_PROCESSOR_PACKAGE_NUMBER_DATA;
+
+
+typedef enum {
+ ProcessorCoreFrequencyRecordType = 1,
+ ProcessorFsbFrequencyRecordType = 2,
+ ProcessorVersionRecordType = 3,
+ ProcessorManufacturerRecordType = 4,
+ ProcessorSerialNumberRecordType = 5,
+ ProcessorIdRecordType = 6,
+ ProcessorTypeRecordType = 7,
+ ProcessorFamilyRecordType = 8,
+ ProcessorVoltageRecordType = 9,
+ ProcessorApicBaseAddressRecordType = 10,
+ ProcessorApicIdRecordType = 11,
+ ProcessorApicVersionNumberRecordType = 12,
+ CpuUcodeRevisionDataRecordType = 13,
+ ProcessorStatusRecordType = 14,
+ ProcessorSocketTypeRecordType = 15,
+ ProcessorSocketNameRecordType = 16,
+ CacheAssociationRecordType = 17,
+ ProcessorMaxCoreFrequencyRecordType = 18,
+ ProcessorAssetTagRecordType = 19,
+ ProcessorMaxFsbFrequencyRecordType = 20,
+ ProcessorPackageNumberRecordType = 21,
+ ProcessorCoreFrequencyListRecordType = 22,
+ ProcessorFsbFrequencyListRecordType = 23,
+ ProcessorHealthStatusRecordType = 24
+} EFI_CPU_VARIABLE_RECORD_TYPE;
+
+typedef union {
+ EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA ProcessorCoreFrequencyList;
+ EFI_PROCESSOR_FSB_FREQUENCY_LIST_DATA ProcessorFsbFrequencyList;
+ EFI_PROCESSOR_SERIAL_NUMBER_DATA ProcessorSerialNumber;
+ EFI_PROCESSOR_CORE_FREQUENCY_DATA ProcessorCoreFrequency;
+ EFI_PROCESSOR_FSB_FREQUENCY_DATA ProcessorFsbFrequency;
+ EFI_PROCESSOR_MAX_CORE_FREQUENCY_DATA ProcessorMaxCoreFrequency;
+ EFI_PROCESSOR_MAX_FSB_FREQUENCY_DATA ProcessorMaxFsbFrequency;
+ EFI_PROCESSOR_VERSION_DATA ProcessorVersion;
+ EFI_PROCESSOR_MANUFACTURER_DATA ProcessorManufacturer;
+ EFI_PROCESSOR_ID_DATA ProcessorId;
+ EFI_PROCESSOR_TYPE_DATA ProcessorType;
+ EFI_PROCESSOR_FAMILY_DATA ProcessorFamily;
+ EFI_PROCESSOR_VOLTAGE_DATA ProcessorVoltage;
+ EFI_PROCESSOR_APIC_BASE_ADDRESS_DATA ProcessorApicBase;
+ EFI_PROCESSOR_APIC_ID_DATA ProcessorApicId;
+ EFI_PROCESSOR_APIC_VERSION_NUMBER_DATA ProcessorApicVersionNumber;
+ EFI_PROCESSOR_MICROCODE_REVISION_DATA CpuUcodeRevisionData;
+ EFI_PROCESSOR_STATUS_DATA ProcessorStatus;
+ EFI_PROCESSOR_SOCKET_TYPE_DATA ProcessorSocketType;
+ EFI_PROCESSOR_SOCKET_NAME_DATA ProcessorSocketName;
+ EFI_PROCESSOR_ASSET_TAG_DATA ProcessorAssetTag;
+ EFI_PROCESSOR_HEALTH_STATUS ProcessorHealthStatus;
+ EFI_PROCESSOR_PACKAGE_NUMBER_DATA ProcessorPackageNumber;
+} EFI_CPU_VARIABLE_RECORD;
+
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER DataRecordHeader;
+ EFI_CPU_VARIABLE_RECORD VariableRecord;
+} EFI_CPU_DATA_RECORD;
+
+#define EFI_CACHE_SUBCLASS_VERSION 0x00010000
+
+
+typedef EFI_EXP_BASE2_DATA EFI_CACHE_SIZE_DATA;
+
+typedef EFI_EXP_BASE2_DATA EFI_MAXIMUM_CACHE_SIZE_DATA;
+
+typedef EFI_EXP_BASE10_DATA EFI_CACHE_SPEED_DATA;
+
+typedef STRING_REF EFI_CACHE_SOCKET_DATA;
+
+typedef struct {
+ UINT32 Other :1;
+ UINT32 Unknown :1;
+ UINT32 NonBurst :1;
+ UINT32 Burst :1;
+ UINT32 PipelineBurst :1;
+ UINT32 Asynchronous :1;
+ UINT32 Synchronous :1;
+ UINT32 Reserved :25;
+} EFI_CACHE_SRAM_TYPE_DATA;
+
+typedef enum {
+ EfiCacheErrorOther = 1,
+ EfiCacheErrorUnknown = 2,
+ EfiCacheErrorNone = 3,
+ EfiCacheErrorParity = 4,
+ EfiCacheErrorSingleBit = 5,
+ EfiCacheErrorMultiBit = 6
+} EFI_CACHE_ERROR_TYPE_DATA;
+
+typedef enum {
+ EfiCacheTypeOther = 1,
+ EfiCacheTypeUnknown = 2,
+ EfiCacheTypeInstruction = 3,
+ EfiCacheTypeData = 4,
+ EfiCacheTypeUnified = 5
+} EFI_CACHE_TYPE_DATA;
+
+typedef enum {
+ EfiCacheAssociativityOther = 1,
+ EfiCacheAssociativityUnknown = 2,
+ EfiCacheAssociativityDirectMapped = 3,
+ EfiCacheAssociativity2Way = 4,
+ EfiCacheAssociativity4Way = 5,
+ EfiCacheAssociativityFully = 6,
+ EfiCacheAssociativity8Way = 7,
+ EfiCacheAssociativity16Way = 8
+} EFI_CACHE_ASSOCIATIVITY_DATA;
+
+typedef struct {
+ UINT32 Level :3;
+ UINT32 Socketed :1;
+ UINT32 Reserved2 :1;
+ UINT32 Location :2;
+ UINT32 Enable :1;
+ UINT32 OperationalMode :2;
+ UINT32 Reserved1 :22;
+} EFI_CACHE_CONFIGURATION_DATA;
+
+#define EFI_CACHE_L1 1
+#define EFI_CACHE_L2 2
+#define EFI_CACHE_L3 3
+#define EFI_CACHE_L4 4
+#define EFI_CACHE_LMAX EFI_CACHE_L4
+
+#define EFI_CACHE_SOCKETED 1
+#define EFI_CACHE_NOT_SOCKETED 0
+
+typedef enum {
+ EfiCacheInternal = 0,
+ EfiCacheExternal = 1,
+ EfiCacheReserved = 2,
+ EfiCacheUnknown = 3
+} EFI_CACHE_LOCATION;
+
+#define EFI_CACHE_ENABLED 1
+#define EFI_CACHE_DISABLED 0
+
+typedef enum {
+ EfiCacheWriteThrough = 0,
+ EfiCacheWriteBack = 1,
+ EfiCacheDynamicMode = 2,
+ EfiCacheUnknownMode = 3
+} EFI_CACHE_OPERATIONAL_MODE;
+
+
+
+typedef enum {
+ CacheSizeRecordType = 1,
+ MaximumSizeCacheRecordType = 2,
+ CacheSpeedRecordType = 3,
+ CacheSocketRecordType = 4,
+ CacheSramTypeRecordType = 5,
+ CacheInstalledSramTypeRecordType = 6,
+ CacheErrorTypeRecordType = 7,
+ CacheTypeRecordType = 8,
+ CacheAssociativityRecordType = 9,
+ CacheConfigRecordType = 10
+} EFI_CACHE_VARIABLE_RECORD_TYPE;
+
+
+typedef union {
+ EFI_CACHE_SIZE_DATA CacheSize;
+ EFI_MAXIMUM_CACHE_SIZE_DATA MaximumCacheSize;
+ EFI_CACHE_SPEED_DATA CacheSpeed;
+ EFI_CACHE_SOCKET_DATA CacheSocket;
+ EFI_CACHE_SRAM_TYPE_DATA CacheSramType;
+ EFI_CACHE_SRAM_TYPE_DATA CacheInstalledSramType;
+ EFI_CACHE_ERROR_TYPE_DATA CacheErrorType;
+ EFI_CACHE_TYPE_DATA CacheType;
+ EFI_CACHE_ASSOCIATIVITY_DATA CacheAssociativity;
+ EFI_CACHE_CONFIGURATION_DATA CacheConfig;
+ EFI_CACHE_ASSOCIATION_DATA CacheAssociation;
+} EFI_CACHE_VARIABLE_RECORD;
+
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER DataRecordHeader;
+ EFI_CACHE_VARIABLE_RECORD VariableRecord;
+} EFI_CACHE_DATA_RECORD;
+
+#define EFI_MEMORY_SUBCLASS_VERSION 0x0100
+
+
+#define EFI_MEMORY_SIZE_RECORD_NUMBER 0x00000001
+
+typedef enum _EFI_MEMORY_REGION_TYPE {
+ EfiMemoryRegionMemory = 0x01,
+ EfiMemoryRegionReserved = 0x02,
+ EfiMemoryRegionAcpi = 0x03,
+ EfiMemoryRegionNvs = 0x04
+} EFI_MEMORY_REGION_TYPE;
+
+typedef struct {
+ UINT32 ProcessorNumber;
+ UINT16 StartBusNumber;
+ UINT16 EndBusNumber;
+ EFI_MEMORY_REGION_TYPE MemoryRegionType;
+ EFI_EXP_BASE2_DATA MemorySize;
+ EFI_PHYSICAL_ADDRESS MemoryStartAddress;
+} EFI_MEMORY_SIZE_DATA;
+
+
+#define EFI_MEMORY_ARRAY_LOCATION_RECORD_NUMBER 0x00000002
+
+typedef enum _EFI_MEMORY_ARRAY_LOCATION {
+ EfiMemoryArrayLocationOther = 0x01,
+ EfiMemoryArrayLocationUnknown = 0x02,
+ EfiMemoryArrayLocationSystemBoard = 0x03,
+ EfiMemoryArrayLocationIsaAddonCard = 0x04,
+ EfiMemoryArrayLocationEisaAddonCard = 0x05,
+ EfiMemoryArrayLocationPciAddonCard = 0x06,
+ EfiMemoryArrayLocationMcaAddonCard = 0x07,
+ EfiMemoryArrayLocationPcmciaAddonCard = 0x08,
+ EfiMemoryArrayLocationProprietaryAddonCard = 0x09,
+ EfiMemoryArrayLocationNuBus = 0x0A,
+ EfiMemoryArrayLocationPc98C20AddonCard = 0xA0,
+ EfiMemoryArrayLocationPc98C24AddonCard = 0xA1,
+ EfiMemoryArrayLocationPc98EAddonCard = 0xA2,
+ EfiMemoryArrayLocationPc98LocalBusAddonCard = 0xA3
+} EFI_MEMORY_ARRAY_LOCATION;
+
+typedef enum _EFI_MEMORY_ARRAY_USE {
+ EfiMemoryArrayUseOther = 0x01,
+ EfiMemoryArrayUseUnknown = 0x02,
+ EfiMemoryArrayUseSystemMemory = 0x03,
+ EfiMemoryArrayUseVideoMemory = 0x04,
+ EfiMemoryArrayUseFlashMemory = 0x05,
+ EfiMemoryArrayUseNonVolatileRam = 0x06,
+ EfiMemoryArrayUseCacheMemory = 0x07,
+} EFI_MEMORY_ARRAY_USE;
+
+typedef enum _EFI_MEMORY_ERROR_CORRECTION {
+ EfiMemoryErrorCorrectionOther = 0x01,
+ EfiMemoryErrorCorrectionUnknown = 0x02,
+ EfiMemoryErrorCorrectionNone = 0x03,
+ EfiMemoryErrorCorrectionParity = 0x04,
+ EfiMemoryErrorCorrectionSingleBitEcc = 0x05,
+ EfiMemoryErrorCorrectionMultiBitEcc = 0x06,
+ EfiMemoryErrorCorrectionCrc = 0x07,
+} EFI_MEMORY_ERROR_CORRECTION;
+
+typedef struct {
+ EFI_MEMORY_ARRAY_LOCATION MemoryArrayLocation;
+ EFI_MEMORY_ARRAY_USE MemoryArrayUse;
+ EFI_MEMORY_ERROR_CORRECTION MemoryErrorCorrection;
+ EFI_EXP_BASE2_DATA MaximumMemoryCapacity;
+ UINT16 NumberMemoryDevices;
+} EFI_MEMORY_ARRAY_LOCATION_DATA;
+
+
+#define EFI_MEMORY_ARRAY_LINK_RECORD_NUMBER 0x00000003
+
+typedef enum _EFI_MEMORY_FORM_FACTOR {
+ EfiMemoryFormFactorOther = 0x01,
+ EfiMemoryFormFactorUnknown = 0x02,
+ EfiMemoryFormFactorSimm = 0x03,
+ EfiMemoryFormFactorSip = 0x04,
+ EfiMemoryFormFactorChip = 0x05,
+ EfiMemoryFormFactorDip = 0x06,
+ EfiMemoryFormFactorZip = 0x07,
+ EfiMemoryFormFactorProprietaryCard = 0x08,
+ EfiMemoryFormFactorDimm = 0x09,
+ EfiMemoryFormFactorTsop = 0x0A,
+ EfiMemoryFormFactorRowOfChips = 0x0B,
+ EfiMemoryFormFactorRimm = 0x0C,
+ EfiMemoryFormFactorSodimm = 0x0D,
+ EfiMemoryFormFactorSrimm = 0x0E,
+ EfiMemoryFormFactorFbDimm = 0x0F
+} EFI_MEMORY_FORM_FACTOR;
+
+typedef enum _EFI_MEMORY_ARRAY_TYPE {
+ EfiMemoryTypeOther = 0x01,
+ EfiMemoryTypeUnknown = 0x02,
+ EfiMemoryTypeDram = 0x03,
+ EfiMemoryTypeEdram = 0x04,
+ EfiMemoryTypeVram = 0x05,
+ EfiMemoryTypeSram = 0x06,
+ EfiMemoryTypeRam = 0x07,
+ EfiMemoryTypeRom = 0x08,
+ EfiMemoryTypeFlash = 0x09,
+ EfiMemoryTypeEeprom = 0x0A,
+ EfiMemoryTypeFeprom = 0x0B,
+ EfiMemoryTypeEprom = 0x0C,
+ EfiMemoryTypeCdram = 0x0D,
+ EfiMemoryType3Dram = 0x0E,
+ EfiMemoryTypeSdram = 0x0F,
+ EfiMemoryTypeSgram = 0x10,
+ EfiMemoryTypeRdram = 0x11,
+ EfiMemoryTypeDdr = 0x12,
+ EfiMemoryTypeDdr2 = 0x13,
+ EfiMemoryTypeDdr2FbDimm = 0x14
+} EFI_MEMORY_ARRAY_TYPE;
+
+typedef struct {
+ UINT32 Reserved :1;
+ UINT32 Other :1;
+ UINT32 Unknown :1;
+ UINT32 FastPaged :1;
+ UINT32 StaticColumn :1;
+ UINT32 PseudoStatic :1;
+ UINT32 Rambus :1;
+ UINT32 Synchronous :1;
+ UINT32 Cmos :1;
+ UINT32 Edo :1;
+ UINT32 WindowDram :1;
+ UINT32 CacheDram :1;
+ UINT32 Nonvolatile :1;
+ UINT32 Reserved1 :19;
+} EFI_MEMORY_TYPE_DETAIL;
+
+typedef enum {
+ EfiMemoryStateEnabled = 0,
+ EfiMemoryStateUnknown = 1,
+ EfiMemoryStateUnsupported = 2,
+ EfiMemoryStateError = 3,
+ EfiMemoryStateAbsent = 4,
+ EfiMemoryStateDisabled = 5,
+ EfiMemoryStatePartial = 6
+} EFI_MEMORY_STATE;
+
+typedef struct {
+ STRING_REF MemoryDeviceLocator;
+ STRING_REF MemoryBankLocator;
+ STRING_REF MemoryManufacturer;
+ STRING_REF MemorySerialNumber;
+ STRING_REF MemoryAssetTag;
+ STRING_REF MemoryPartNumber;
+ EFI_INTER_LINK_DATA MemoryArrayLink;
+ EFI_INTER_LINK_DATA MemorySubArrayLink;
+ UINT16 MemoryTotalWidth;
+ UINT16 MemoryDataWidth;
+ EFI_EXP_BASE2_DATA MemoryDeviceSize;
+ EFI_MEMORY_FORM_FACTOR MemoryFormFactor;
+ UINT8 MemoryDeviceSet;
+ EFI_MEMORY_ARRAY_TYPE MemoryType;
+ EFI_MEMORY_TYPE_DETAIL MemoryTypeDetail;
+ EFI_EXP_BASE10_DATA MemorySpeed;
+ EFI_MEMORY_STATE MemoryState;
+} EFI_MEMORY_ARRAY_LINK_DATA;
+
+
+#define EFI_MEMORY_ARRAY_START_ADDRESS_RECORD_NUMBER 0x00000004
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS MemoryArrayStartAddress;
+ EFI_PHYSICAL_ADDRESS MemoryArrayEndAddress;
+ EFI_INTER_LINK_DATA PhysicalMemoryArrayLink;
+ UINT16 MemoryArrayPartitionWidth;
+} EFI_MEMORY_ARRAY_START_ADDRESS_DATA;
+
+
+#define EFI_MEMORY_DEVICE_START_ADDRESS_RECORD_NUMBER 0x00000005
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS MemoryDeviceStartAddress;
+ EFI_PHYSICAL_ADDRESS MemoryDeviceEndAddress;
+ EFI_INTER_LINK_DATA PhysicalMemoryDeviceLink;
+ EFI_INTER_LINK_DATA PhysicalMemoryArrayLink;
+ UINT8 MemoryDevicePartitionRowPosition;
+ UINT8 MemoryDeviceInterleavePosition;
+ UINT8 MemoryDeviceInterleaveDataDepth;
+} EFI_MEMORY_DEVICE_START_ADDRESS_DATA;
+
+
+//
+// Memory. Channel Device Type - SMBIOS Type 37
+//
+
+#define EFI_MEMORY_CHANNEL_TYPE_RECORD_NUMBER 0x00000006
+
+typedef enum _EFI_MEMORY_CHANNEL_TYPE {
+ EfiMemoryChannelTypeOther = 1,
+ EfiMemoryChannelTypeUnknown = 2,
+ EfiMemoryChannelTypeRambus = 3,
+ EfiMemoryChannelTypeSyncLink = 4
+} EFI_MEMORY_CHANNEL_TYPE;
+
+typedef struct {
+ EFI_MEMORY_CHANNEL_TYPE MemoryChannelType;
+ UINT8 MemoryChannelMaximumLoad;
+ UINT8 MemoryChannelDeviceCount;
+} EFI_MEMORY_CHANNEL_TYPE_DATA;
+
+#define EFI_MEMORY_CHANNEL_DEVICE_RECORD_NUMBER 0x00000007
+
+typedef struct {
+ UINT8 DeviceId;
+ EFI_INTER_LINK_DATA DeviceLink;
+ UINT8 MemoryChannelDeviceLoad;
+} EFI_MEMORY_CHANNEL_DEVICE_DATA;
+
+
+
+typedef union _EFI_MEMORY_SUBCLASS_RECORDS {
+ EFI_MEMORY_SIZE_DATA SizeData;
+ EFI_MEMORY_ARRAY_LOCATION_DATA ArrayLocationData;
+ EFI_MEMORY_ARRAY_LINK_DATA ArrayLink;
+ EFI_MEMORY_ARRAY_START_ADDRESS_DATA ArrayStartAddress;
+ EFI_MEMORY_DEVICE_START_ADDRESS_DATA DeviceStartAddress;
+ EFI_MEMORY_CHANNEL_TYPE_DATA ChannelTypeData;
+ EFI_MEMORY_CHANNEL_DEVICE_DATA ChannelDeviceData;
+} EFI_MEMORY_SUBCLASS_RECORDS;
+
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER Header;
+ EFI_MEMORY_SUBCLASS_RECORDS Record;
+} EFI_MEMORY_SUBCLASS_DRIVER_DATA;
+
+#define EFI_MISC_SUBCLASS_VERSION 0x0100
+
+#pragma pack(1)
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Last PCI Bus Number
+//
+#define EFI_MISC_LAST_PCI_BUS_RECORD_NUMBER 0x00000001
+
+typedef struct {
+ UINT8 LastPciBus;
+} EFI_MISC_LAST_PCI_BUS_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. BIOS Vendor - SMBIOS Type 0
+//
+#define EFI_MISC_BIOS_VENDOR_RECORD_NUMBER 0x00000002
+
+typedef struct {
+ UINT64 Reserved1 :2;
+ UINT64 Unknown :1;
+ UINT64 BiosCharacteristicsNotSupported :1;
+ UINT64 IsaIsSupported :1;
+ UINT64 McaIsSupported :1;
+ UINT64 EisaIsSupported :1;
+ UINT64 PciIsSupported :1;
+ UINT64 PcmciaIsSupported :1;
+ UINT64 PlugAndPlayIsSupported :1;
+ UINT64 ApmIsSupported :1;
+ UINT64 BiosIsUpgradable :1;
+ UINT64 BiosShadowingAllowed :1;
+ UINT64 VlVesaIsSupported :1;
+ UINT64 EscdSupportIsAvailable :1;
+ UINT64 BootFromCdIsSupported :1;
+ UINT64 SelectableBootIsSupported :1;
+ UINT64 RomBiosIsSocketed :1;
+ UINT64 BootFromPcmciaIsSupported :1;
+ UINT64 EDDSpecificationIsSupported :1;
+ UINT64 JapaneseNecFloppyIsSupported :1;
+ UINT64 JapaneseToshibaFloppyIsSupported :1;
+ UINT64 Floppy525_360IsSupported :1;
+ UINT64 Floppy525_12IsSupported :1;
+ UINT64 Floppy35_720IsSupported :1;
+ UINT64 Floppy35_288IsSupported :1;
+ UINT64 PrintScreenIsSupported :1;
+ UINT64 Keyboard8042IsSupported :1;
+ UINT64 SerialIsSupported :1;
+ UINT64 PrinterIsSupported :1;
+ UINT64 CgaMonoIsSupported :1;
+ UINT64 NecPc98 :1;
+ UINT64 AcpiIsSupported :1;
+ UINT64 UsbLegacyIsSupported :1;
+ UINT64 AgpIsSupported :1;
+ UINT64 I20BootIsSupported :1;
+ UINT64 Ls120BootIsSupported :1;
+ UINT64 AtapiZipDriveBootIsSupported :1;
+ UINT64 Boot1394IsSupported :1;
+ UINT64 SmartBatteryIsSupported :1;
+ UINT64 BiosBootSpecIsSupported :1;
+ UINT64 FunctionKeyNetworkBootIsSupported :1;
+ UINT64 Reserved :22;
+} EFI_MISC_BIOS_CHARACTERISTICS;
+
+typedef struct {
+ UINT64 BiosReserved :16;
+ UINT64 SystemReserved :16;
+ UINT64 Reserved :32;
+} EFI_MISC_BIOS_CHARACTERISTICS_EXTENSION;
+
+typedef struct {
+ STRING_REF BiosVendor;
+ STRING_REF BiosVersion;
+ STRING_REF BiosReleaseDate;
+ EFI_PHYSICAL_ADDRESS BiosStartingAddress;
+ EFI_EXP_BASE2_DATA BiosPhysicalDeviceSize;
+ EFI_MISC_BIOS_CHARACTERISTICS BiosCharacteristics1;
+ EFI_MISC_BIOS_CHARACTERISTICS_EXTENSION BiosCharacteristics2;
+ UINT8 BiosMajorRelease;
+ UINT8 BiosMinorRelease;
+ UINT8 BiosEmbeddedFirmwareMajorRelease;
+ UINT8 BiosEmbeddedFirmwareMinorRelease;
+} EFI_MISC_BIOS_VENDOR_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. System Manufacturer - SMBIOS Type 1
+//
+#define EFI_MISC_SYSTEM_MANUFACTURER_RECORD_NUMBER 0x00000003
+
+typedef enum {
+ EfiSystemWakeupTypeReserved = 0,
+ EfiSystemWakeupTypeOther = 1,
+ EfiSystemWakeupTypeUnknown = 2,
+ EfiSystemWakeupTypeApmTimer = 3,
+ EfiSystemWakeupTypeModemRing = 4,
+ EfiSystemWakeupTypeLanRemote = 5,
+ EfiSystemWakeupTypePowerSwitch = 6,
+ EfiSystemWakeupTypePciPme = 7,
+ EfiSystemWakeupTypeAcPowerRestored = 8,
+} EFI_MISC_SYSTEM_WAKEUP_TYPE;
+
+typedef struct {
+ STRING_REF SystemManufacturer;
+ STRING_REF SystemProductName;
+ STRING_REF SystemVersion;
+ STRING_REF SystemSerialNumber;
+ EFI_GUID SystemUuid;
+ EFI_MISC_SYSTEM_WAKEUP_TYPE SystemWakeupType;
+ STRING_REF SystemSKUNumber;
+ STRING_REF SystemFamily;
+} EFI_MISC_SYSTEM_MANUFACTURER_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Base Board Manufacturer - SMBIOS Type 2
+//
+#define EFI_MISC_BASE_BOARD_MANUFACTURER_RECORD_NUMBER 0x00000004
+
+typedef struct {
+ UINT32 Motherboard :1;
+ UINT32 RequiresDaughterCard :1;
+ UINT32 Removable :1;
+ UINT32 Replaceable :1;
+ UINT32 HotSwappable :1;
+ UINT32 Reserved :27;
+} EFI_BASE_BOARD_FEATURE_FLAGS;
+
+typedef enum {
+ EfiBaseBoardTypeUnknown = 1,
+ EfiBaseBoardTypeOther = 2,
+ EfiBaseBoardTypeServerBlade = 3,
+ EfiBaseBoardTypeConnectivitySwitch = 4,
+ EfiBaseBoardTypeSystemManagementModule = 5,
+ EfiBaseBoardTypeProcessorModule = 6,
+ EfiBaseBoardTypeIOModule = 7,
+ EfiBaseBoardTypeMemoryModule = 8,
+ EfiBaseBoardTypeDaughterBoard = 9,
+ EfiBaseBoardTypeMotherBoard = 0xA,
+ EfiBaseBoardTypeProcessorMemoryModule = 0xB,
+ EfiBaseBoardTypeProcessorIOModule = 0xC,
+ EfiBaseBoardTypeInterconnectBoard = 0xD,
+} EFI_BASE_BOARD_TYPE;
+
+typedef struct {
+ STRING_REF BaseBoardManufacturer;
+ STRING_REF BaseBoardProductName;
+ STRING_REF BaseBoardVersion;
+ STRING_REF BaseBoardSerialNumber;
+ STRING_REF BaseBoardAssetTag;
+ STRING_REF BaseBoardChassisLocation;
+ EFI_BASE_BOARD_FEATURE_FLAGS BaseBoardFeatureFlags;
+ EFI_BASE_BOARD_TYPE BaseBoardType;
+ EFI_INTER_LINK_DATA BaseBoardChassisLink;
+ UINT32 BaseBoardNumberLinks;
+ EFI_INTER_LINK_DATA LinkN;
+} EFI_MISC_BASE_BOARD_MANUFACTURER_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. System/Chassis Enclosure - SMBIOS Type 3
+//
+#define EFI_MISC_CHASSIS_MANUFACTURER_RECORD_NUMBER 0x00000005
+
+typedef enum {
+ EfiMiscChassisTypeOther = 0x1,
+ EfiMiscChassisTypeUnknown = 0x2,
+ EfiMiscChassisTypeDeskTop = 0x3,
+ EfiMiscChassisTypeLowProfileDesktop = 0x4,
+ EfiMiscChassisTypePizzaBox = 0x5,
+ EfiMiscChassisTypeMiniTower = 0x6,
+ EfiMiscChassisTypeTower = 0x7,
+ EfiMiscChassisTypePortable = 0x8,
+ EfiMiscChassisTypeLapTop = 0x9,
+ EfiMiscChassisTypeNotebook = 0xA,
+ EfiMiscChassisTypeHandHeld = 0xB,
+ EfiMiscChassisTypeDockingStation = 0xC,
+ EfiMiscChassisTypeAllInOne = 0xD,
+ EfiMiscChassisTypeSubNotebook = 0xE,
+ EfiMiscChassisTypeSpaceSaving = 0xF,
+ EfiMiscChassisTypeLunchBox = 0x10,
+ EfiMiscChassisTypeMainServerChassis = 0x11,
+ EfiMiscChassisTypeExpansionChassis = 0x12,
+ EfiMiscChassisTypeSubChassis = 0x13,
+ EfiMiscChassisTypeBusExpansionChassis = 0x14,
+ EfiMiscChassisTypePeripheralChassis = 0x15,
+ EfiMiscChassisTypeRaidChassis = 0x16,
+ EfiMiscChassisTypeRackMountChassis = 0x17,
+ EfiMiscChassisTypeSealedCasePc = 0x18,
+ EfiMiscChassisMultiSystemChassis = 0x19,
+} EFI_MISC_CHASSIS_TYPE;
+
+typedef struct {
+ UINT32 ChassisType :16;
+ UINT32 ChassisLockPresent:1;
+ UINT32 Reserved :15;
+} EFI_MISC_CHASSIS_STATUS;
+
+typedef enum {
+ EfiChassisStateOther = 0x01,
+ EfiChassisStateUnknown = 0x02,
+ EfiChassisStateSafe = 0x03,
+ EfiChassisStateWarning = 0x04,
+ EfiChassisStateCritical = 0x05,
+ EfiChassisStateNonRecoverable = 0x06,
+} EFI_MISC_CHASSIS_STATE;
+
+typedef enum {
+ EfiChassisSecurityStatusOther = 0x01,
+ EfiChassisSecurityStatusUnknown = 0x02,
+ EfiChassisSecurityStatusNone = 0x03,
+ EfiChassisSecurityStatusExternalInterfaceLockedOut = 0x04,
+ EfiChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05,
+} EFI_MISC_CHASSIS_SECURITY_STATE;
+
+typedef struct {
+ UINT32 RecordType :1;
+ UINT32 Reserved :24;
+} EFI_MISC_ELEMENT_TYPE;
+
+typedef struct {
+ EFI_MISC_ELEMENT_TYPE ChassisElementType;
+ EFI_INTER_LINK_DATA ChassisElementStructure;
+ EFI_BASE_BOARD_TYPE ChassisBaseBoard;
+ UINT32 ChassisElementMinimum;
+ UINT32 ChassisElementMaximum;
+} EFI_MISC_ELEMENTS;
+
+typedef struct {
+ STRING_REF ChassisManufacturer;
+ STRING_REF ChassisVersion;
+ STRING_REF ChassisSerialNumber;
+ STRING_REF ChassisAssetTag;
+ EFI_MISC_CHASSIS_STATUS ChassisType;
+ EFI_MISC_CHASSIS_STATE ChassisBootupState;
+ EFI_MISC_CHASSIS_STATE ChassisPowerSupplyState;
+ EFI_MISC_CHASSIS_STATE ChassisThermalState;
+ EFI_MISC_CHASSIS_SECURITY_STATE ChassisSecurityState;
+ UINT32 ChassisOemDefined;
+ UINT32 ChassisHeight;
+ UINT32 ChassisNumberPowerCords;
+ UINT32 ChassisElementCount;
+ UINT32 ChassisElementRecordLength;//
+ EFI_MISC_ELEMENTS ChassisElements;
+} EFI_MISC_CHASSIS_MANUFACTURER_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Port Connector Information - SMBIOS Type 8
+//
+#define EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_RECORD_NUMBER 0x00000006
+
+typedef enum {
+ EfiPortConnectorTypeNone = 0x00,
+ EfiPortConnectorTypeCentronics = 0x01,
+ EfiPortConnectorTypeMiniCentronics = 0x02,
+ EfiPortConnectorTypeProprietary = 0x03,
+ EfiPortConnectorTypeDB25Male = 0x04,
+ EfiPortConnectorTypeDB25Female = 0x05,
+ EfiPortConnectorTypeDB15Male = 0x06,
+ EfiPortConnectorTypeDB15Female = 0x07,
+ EfiPortConnectorTypeDB9Male = 0x08,
+ EfiPortConnectorTypeDB9Female = 0x09,
+ EfiPortConnectorTypeRJ11 = 0x0A,
+ EfiPortConnectorTypeRJ45 = 0x0B,
+ EfiPortConnectorType50PinMiniScsi = 0x0C,
+ EfiPortConnectorTypeMiniDin = 0x0D,
+ EfiPortConnectorTypeMicriDin = 0x0E,
+ EfiPortConnectorTypePS2 = 0x0F,
+ EfiPortConnectorTypeInfrared = 0x10,
+ EfiPortConnectorTypeHpHil = 0x11,
+ EfiPortConnectorTypeUsb = 0x12,
+ EfiPortConnectorTypeSsaScsi = 0x13,
+ EfiPortConnectorTypeCircularDin8Male = 0x14,
+ EfiPortConnectorTypeCircularDin8Female = 0x15,
+ EfiPortConnectorTypeOnboardIde = 0x16,
+ EfiPortConnectorTypeOnboardFloppy = 0x17,
+ EfiPortConnectorType9PinDualInline = 0x18,
+ EfiPortConnectorType25PinDualInline = 0x19,
+ EfiPortConnectorType50PinDualInline = 0x1A,
+ EfiPortConnectorType68PinDualInline = 0x1B,
+ EfiPortConnectorTypeOnboardSoundInput = 0x1C,
+ EfiPortConnectorTypeMiniCentronicsType14 = 0x1D,
+ EfiPortConnectorTypeMiniCentronicsType26 = 0x1E,
+ EfiPortConnectorTypeHeadPhoneMiniJack = 0x1F,
+ EfiPortConnectorTypeBNC = 0x20,
+ EfiPortConnectorType1394 = 0x21,
+ EfiPortConnectorTypePC98 = 0xA0,
+ EfiPortConnectorTypePC98Hireso = 0xA1,
+ EfiPortConnectorTypePCH98 = 0xA2,
+ EfiPortConnectorTypePC98Note = 0xA3,
+ EfiPortConnectorTypePC98Full = 0xA4,
+ EfiPortConnectorTypeOther = 0xFF,
+} EFI_MISC_PORT_CONNECTOR_TYPE;
+
+typedef enum {
+ EfiPortTypeNone = 0x00,
+ EfiPortTypeParallelXtAtCompatible = 0x01,
+ EfiPortTypeParallelPortPs2 = 0x02,
+ EfiPortTypeParallelPortEcp = 0x03,
+ EfiPortTypeParallelPortEpp = 0x04,
+ EfiPortTypeParallelPortEcpEpp = 0x05,
+ EfiPortTypeSerialXtAtCompatible = 0x06,
+ EfiPortTypeSerial16450Compatible = 0x07,
+ EfiPortTypeSerial16550Compatible = 0x08,
+ EfiPortTypeSerial16550ACompatible = 0x09,
+ EfiPortTypeScsi = 0x0A,
+ EfiPortTypeMidi = 0x0B,
+ EfiPortTypeJoyStick = 0x0C,
+ EfiPortTypeKeyboard = 0x0D,
+ EfiPortTypeMouse = 0x0E,
+ EfiPortTypeSsaScsi = 0x0F,
+ EfiPortTypeUsb = 0x10,
+ EfiPortTypeFireWire = 0x11,
+ EfiPortTypePcmciaTypeI = 0x12,
+ EfiPortTypePcmciaTypeII = 0x13,
+ EfiPortTypePcmciaTypeIII = 0x14,
+ EfiPortTypeCardBus = 0x15,
+ EfiPortTypeAccessBusPort = 0x16,
+ EfiPortTypeScsiII = 0x17,
+ EfiPortTypeScsiWide = 0x18,
+ EfiPortTypePC98 = 0x19,
+ EfiPortTypePC98Hireso = 0x1A,
+ EfiPortTypePCH98 = 0x1B,
+ EfiPortTypeVideoPort = 0x1C,
+ EfiPortTypeAudioPort = 0x1D,
+ EfiPortTypeModemPort = 0x1E,
+ EfiPortTypeNetworkPort = 0x1F,
+ EfiPortType8251Compatible = 0xA0,
+ EfiPortType8251FifoCompatible = 0xA1,
+ EfiPortTypeOther = 0xFF,
+} EFI_MISC_PORT_TYPE;
+
+typedef struct {
+ STRING_REF PortInternalConnectorDesignator;
+ STRING_REF PortExternalConnectorDesignator;
+ EFI_MISC_PORT_CONNECTOR_TYPE PortInternalConnectorType;
+ EFI_MISC_PORT_CONNECTOR_TYPE PortExternalConnectorType;
+ EFI_MISC_PORT_TYPE PortType;
+ EFI_MISC_PORT_DEVICE_PATH PortPath;
+} EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. System Slots - SMBIOS Type 9
+//
+#define EFI_MISC_SYSTEM_SLOT_DESIGNATION_RECORD_NUMBER 0x00000007
+
+typedef enum {
+ EfiSlotTypeOther = 0x01,
+ EfiSlotTypeUnknown = 0x02,
+ EfiSlotTypeIsa = 0x03,
+ EfiSlotTypeMca = 0x04,
+ EfiSlotTypeEisa = 0x05,
+ EfiSlotTypePci = 0x06,
+ EfiSlotTypePcmcia = 0x07,
+ EfiSlotTypeVlVesa = 0x08,
+ EfiSlotTypeProprietary = 0x09,
+ EfiSlotTypeProcessorCardSlot = 0x0A,
+ EfiSlotTypeProprietaryMemoryCardSlot = 0x0B,
+ EfiSlotTypeIORiserCardSlot = 0x0C,
+ EfiSlotTypeNuBus = 0x0D,
+ EfiSlotTypePci66MhzCapable = 0x0E,
+ EfiSlotTypeAgp = 0x0F,
+ EfiSlotTypeApg2X = 0x10,
+ EfiSlotTypeAgp4X = 0x11,
+ EfiSlotTypePciX = 0x12,
+ EfiSlotTypeAgp4x = 0x13,
+ EfiSlotTypePC98C20 = 0xA0,
+ EfiSlotTypePC98C24 = 0xA1,
+ EfiSlotTypePC98E = 0xA2,
+ EfiSlotTypePC98LocalBus = 0xA3,
+ EfiSlotTypePC98Card = 0xA4,
+ EfiSlotTypePciExpress = 0xA5
+} EFI_MISC_SLOT_TYPE;
+
+typedef enum {
+ EfiSlotDataBusWidthOther = 0x01,
+ EfiSlotDataBusWidthUnknown = 0x02,
+ EfiSlotDataBusWidth8Bit = 0x03,
+ EfiSlotDataBusWidth16Bit = 0x04,
+ EfiSlotDataBusWidth32Bit = 0x05,
+ EfiSlotDataBusWidth64Bit = 0x06,
+ EfiSlotDataBusWidth128Bit = 0x07,
+} EFI_MISC_SLOT_DATA_BUS_WIDTH;
+
+typedef enum {
+ EfiSlotUsageOther = 1,
+ EfiSlotUsageUnknown = 2,
+ EfiSlotUsageAvailable = 3,
+ EfiSlotUsageInUse = 4,
+} EFI_MISC_SLOT_USAGE;
+
+typedef enum {
+ EfiSlotLengthOther = 1,
+ EfiSlotLengthUnknown = 2,
+ EfiSlotLengthShort = 3,
+ EfiSlotLengthLong = 4
+} EFI_MISC_SLOT_LENGTH;
+
+typedef struct {
+ UINT32 CharacteristicsUnknown :1;
+ UINT32 Provides50Volts :1;
+ UINT32 Provides33Volts :1;
+ UINT32 SharedSlot :1;
+ UINT32 PcCard16Supported :1;
+ UINT32 CardBusSupported :1;
+ UINT32 ZoomVideoSupported :1;
+ UINT32 ModemRingResumeSupported:1;
+ UINT32 PmeSignalSupported :1;
+ UINT32 HotPlugDevicesSupported :1;
+ UINT32 SmbusSignalSupported :1;
+ UINT32 Reserved :21;
+} EFI_MISC_SLOT_CHARACTERISTICS;
+
+typedef struct {
+ STRING_REF SlotDesignation;
+ EFI_MISC_SLOT_TYPE SlotType;
+ EFI_MISC_SLOT_DATA_BUS_WIDTH SlotDataBusWidth;
+ EFI_MISC_SLOT_USAGE SlotUsage;
+ EFI_MISC_SLOT_LENGTH SlotLength;
+ UINT16 SlotId;
+ EFI_MISC_SLOT_CHARACTERISTICS SlotCharacteristics;
+ EFI_DEVICE_PATH_PROTOCOL SlotDevicePath;
+} EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Onboard Device - SMBIOS Type 10
+//
+#define EFI_MISC_ONBOARD_DEVICE_RECORD_NUMBER 0x00000008
+
+typedef enum {
+ EfiOnBoardDeviceTypeOther = 1,
+ EfiOnBoardDeviceTypeUnknown = 2,
+ EfiOnBoardDeviceTypeVideo = 3,
+ EfiOnBoardDeviceTypeScsiController = 4,
+ EfiOnBoardDeviceTypeEthernet = 5,
+ EfiOnBoardDeviceTypeTokenRing = 6,
+ EfiOnBoardDeviceTypeSound = 7,
+} EFI_MISC_ONBOARD_DEVICE_TYPE;
+
+typedef struct {
+ UINT32 DeviceType :16;
+ UINT32 DeviceEnabled :1;
+ UINT32 Reserved :15;
+} EFI_MISC_ONBOARD_DEVICE_STATUS;
+
+typedef struct {
+ STRING_REF OnBoardDeviceDescription;
+ EFI_MISC_ONBOARD_DEVICE_STATUS OnBoardDeviceStatus;
+ EFI_DEVICE_PATH_PROTOCOL OnBoardDevicePath;
+} EFI_MISC_ONBOARD_DEVICE_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. BIOS Language Information - SMBIOS Type 11
+//
+#define EFI_MISC_OEM_STRING_RECORD_NUMBER 0x00000009
+
+typedef struct {
+ STRING_REF OemStringRef[1];
+} EFI_MISC_OEM_STRING_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. System Options - SMBIOS Type 12
+//
+typedef struct {
+ STRING_REF SystemOptionStringRef[1];
+} EFI_MISC_SYSTEM_OPTION_STRING_DATA;
+
+#define EFI_MISC_SYSTEM_OPTION_STRING_RECORD_NUMBER 0x0000000A
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Number of Installable Languages - SMBIOS Type 13
+//
+#define EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_RECORD_NUMBER 0x0000000B
+
+typedef struct {
+ UINT32 AbbreviatedLanguageFormat :1;
+ UINT32 Reserved :31;
+} EFI_MISC_LANGUAGE_FLAGS;
+
+typedef struct {
+ UINT16 NumberOfInstallableLanguages;
+ EFI_MISC_LANGUAGE_FLAGS LanguageFlags;
+ UINT16 CurrentLanguageNumber;
+} EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. System Language String
+//
+#define EFI_MISC_SYSTEM_LANGUAGE_STRING_RECORD_NUMBER 0x0000000C
+
+typedef struct {
+ UINT16 LanguageId;
+ STRING_REF SystemLanguageString;
+} EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Group Associations - SMBIOS Type 14
+//
+#define EFI_MISC_GROUP_NAME_RECORD_NUMBER 0x0000000D
+
+typedef struct {
+ STRING_REF GroupName;
+ UINT16 NumberGroupItems;
+ UINT16 GroupId;
+} EFI_MISC_GROUP_NAME_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Group Item Set Element
+//
+#define EFI_MISC_GROUP_ITEM_SET_RECORD_NUMBER 0x0000000E
+
+typedef struct {
+ EFI_GUID SubClass;
+ EFI_INTER_LINK_DATA GroupLink;
+ UINT16 GroupId;
+ UINT16 GroupElementId;
+} EFI_MISC_GROUP_ITEM_SET_DATA;
+
+// Misc. System Event Log - SMBIOS Type 15
+//
+#define EFI_MISC_SYSTEM_EVENT_LOG_RECORD_NUMBER 0x0000000D
+typedef struct {
+ UINT16 LogAreaLength;
+ UINT16 LogHeaderStartOffset;
+ UINT16 LogDataStartOffset;
+ UINT8 AccessMethod;
+ UINT8 LogStatus;
+ UINT32 LogChangeToken;
+ UINT32 AccessMethodAddress;
+ UINT8 LogHeaderFormat;
+ UINT8 NumberOfSupportedLogType;
+ UINT8 LengthOfLogDescriptor;
+} EFI_MISC_SYSTEM_EVENT_LOG_DATA;
+
+//
+// Access Method.
+// 0x00~0x04: as following definition
+// 0x05~0x7f: Available for future assignment.
+// 0x80~0xff: BIOS Vendor/OEM-specific.
+//
+#define ACCESS_INDEXIO_1INDEX8BIT_DATA8BIT 0x00
+#define ACCESS_INDEXIO_2INDEX8BIT_DATA8BIT 0X01
+#define ACCESS_INDEXIO_1INDEX16BIT_DATA8BIT 0X02
+#define ACCESS_MEMORY_MAPPED 0x03
+#define ACCESS_GPNV 0x04
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Pointing Device Type - SMBIOS Type 21
+//
+#define EFI_MISC_POINTING_DEVICE_TYPE_RECORD_NUMBER 0x0000000F
+
+typedef enum {
+ EfiPointingDeviceTypeOther = 0x01,
+ EfiPointingDeviceTypeUnknown = 0x02,
+ EfiPointingDeviceTypeMouse = 0x03,
+ EfiPointingDeviceTypeTrackBall = 0x04,
+ EfiPointingDeviceTypeTrackPoint = 0x05,
+ EfiPointingDeviceTypeGlidePoint = 0x06,
+ EfiPointingDeviceTouchPad = 0x07,
+ EfiPointingDeviceTouchScreen = 0x08,
+ EfiPointingDeviceOpticalSensor = 0x09,
+} EFI_MISC_POINTING_DEVICE_TYPE;
+
+typedef enum {
+ EfiPointingDeviceInterfaceOther = 0x01,
+ EfiPointingDeviceInterfaceUnknown = 0x02,
+ EfiPointingDeviceInterfaceSerial = 0x03,
+ EfiPointingDeviceInterfacePs2 = 0x04,
+ EfiPointingDeviceInterfaceInfrared = 0x05,
+ EfiPointingDeviceInterfaceHpHil = 0x06,
+ EfiPointingDeviceInterfaceBusMouse = 0x07,
+ EfiPointingDeviceInterfaceADB = 0x08,
+ EfiPointingDeviceInterfaceBusMouseDB9 = 0xA0,
+ EfiPointingDeviceInterfaceBusMouseMicroDin = 0xA1,
+ EfiPointingDeviceInterfaceUsb = 0xA2,
+} EFI_MISC_POINTING_DEVICE_INTERFACE;
+
+typedef struct {
+ EFI_MISC_POINTING_DEVICE_TYPE PointingDeviceType;
+ EFI_MISC_POINTING_DEVICE_INTERFACE PointingDeviceInterface;
+ UINT16 NumberPointingDeviceButtons;
+ EFI_DEVICE_PATH_PROTOCOL PointingDevicePath;
+} EFI_MISC_PORTING_DEVICE_TYPE_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Portable Battery - SMBIOS Type 22
+//
+#define EFI_MISC_BATTERY_LOCATION_RECORD_NUMBER 0x00000010
+
+typedef enum {
+ EfiBatteryDeviceChemistryTypeOther = 0x01,
+ EfiBatteryDeviceChemistryTypeUnknown = 0x02,
+ EfiBatteryDeviceChemistryTypeLeadAcid = 0x03,
+ EfiBatteryDeviceChemistryTypeNickelCadmium = 0x04,
+ EfiBatteryDeviceChemistryTypeNickelMetalHydride = 0x05,
+ EfiBatteryDeviceChemistryTypeLithiumIon = 0x06,
+ EfiBatteryDeviceChemistryTypeZincAir = 0x07,
+ EfiBatteryDeviceChemistryTypeLithiumPolymer = 0x08,
+} EFI_MISC_BATTERY_DEVICE_CHEMISTRY;
+
+typedef struct {
+ UINT32 Date :5;
+ UINT32 Month :4;
+ UINT32 Year :7;
+ UINT32 Reserved :16;
+} EFI_MISC_BATTERY_SBDS_MANUFACTURE_DATE;
+
+typedef struct {
+ STRING_REF BatteryLocation;
+ STRING_REF BatteryManufacturer;
+ STRING_REF BatteryManufactureDate;
+ STRING_REF BatterySerialNumber;
+ STRING_REF BatteryDeviceName;
+ STRING_REF BatterySbdsVersionNumber;
+ STRING_REF BatterySbdsDeviceChemistry;
+ EFI_MISC_BATTERY_DEVICE_CHEMISTRY BatteryDeviceChemistry;
+ EFI_EXP_BASE10_DATA BatteryDesignCapacity;
+ EFI_EXP_BASE10_DATA BatteryDesignVoltage;
+ UINT16 BatteryMaximumError;
+ UINT16 BatterySbdsSerialNumber;
+ EFI_MISC_BATTERY_SBDS_MANUFACTURE_DATE
+ BatterySbdsManufacturingDate;
+ UINT32 BatteryOemSpecific;
+} EFI_MISC_BATTERY_LOCATION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Reset Capabilities - SMBIOS Type 23
+//
+#define EFI_MISC_RESET_CAPABILITIES_RECORD_NUMBER 0x00000011
+
+typedef struct {
+ UINT32 Status :1;
+ UINT32 BootOption :2;
+ UINT32 BootOptionOnLimit :2;
+ UINT32 WatchdogTimerPresent:1;
+ UINT32 Reserved :26;
+} EFI_MISC_RESET_CAPABILITIES_TYPE;
+
+typedef struct {
+ EFI_MISC_RESET_CAPABILITIES_TYPE ResetCapabilities;
+ UINT16 ResetCount;
+ UINT16 ResetLimit;
+ UINT16 ResetTimerInterval;
+ UINT16 ResetTimeout;
+} EFI_MISC_RESET_CAPABILITIES;
+
+typedef struct {
+ EFI_MISC_RESET_CAPABILITIES ResetCapabilities;
+ UINT16 ResetCount;
+ UINT16 ResetLimit;
+ UINT16 ResetTimerInterval;
+ UINT16 ResetTimeout;
+} EFI_MISC_RESET_CAPABILITIES_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Hardware Security - SMBIOS Type 24
+//
+#define EFI_MISC_HARDWARE_SECURITY_RECORD_NUMBER 0x00000012
+
+typedef enum {
+ EfiHardwareSecurityStatusDisabled = 0,
+ EfiHardwareSecurityStatusEnabled = 1,
+ EfiHardwareSecurityStatusNotImplemented = 2,
+ EfiHardwareSecurityStatusUnknown = 3
+} EFI_MISC_HARDWARE_SECURITY_STATUS;
+
+typedef struct {
+ EFI_MISC_HARDWARE_SECURITY_STATUS FrontPanelResetStatus :2;
+ EFI_MISC_HARDWARE_SECURITY_STATUS AdministratorPasswordStatus :2;
+ EFI_MISC_HARDWARE_SECURITY_STATUS KeyboardPasswordStatus :2;
+ EFI_MISC_HARDWARE_SECURITY_STATUS PowerOnPasswordStatus :2;
+ EFI_MISC_HARDWARE_SECURITY_STATUS Reserved :24;
+} EFI_MISC_HARDWARE_SECURITY_SETTINGS;
+
+typedef struct {
+ EFI_MISC_HARDWARE_SECURITY_SETTINGS HardwareSecuritySettings;
+} EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// System Power Controls - SMBIOS Type 25
+//
+#define EFI_MISC_SCHEDULED_POWER_ON_MONTH_RECORD_NUMBER 0x00000013
+
+typedef struct {
+ UINT16 ScheduledPoweronMonth;
+ UINT16 ScheduledPoweronDayOfMonth;
+ UINT16 ScheduledPoweronHour;
+ UINT16 ScheduledPoweronMinute;
+ UINT16 ScheduledPoweronSecond;
+} EFI_MISC_SCHEDULED_POWER_ON_MONTH_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Voltage Probe - SMBIOS Type 26
+//
+#define EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000014
+
+typedef struct {
+ UINT32 VoltageProbeSite :5;
+ UINT32 VoltageProbeStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_VOLTAGE_PROBE_LOCATION;
+
+typedef struct {
+ STRING_REF VoltageProbeDescription;
+ EFI_MISC_VOLTAGE_PROBE_LOCATION VoltageProbeLocation;
+ EFI_EXP_BASE10_DATA VoltageProbeMaximumValue;
+ EFI_EXP_BASE10_DATA VoltageProbeMinimumValue;
+ EFI_EXP_BASE10_DATA VoltageProbeResolution;
+ EFI_EXP_BASE10_DATA VoltageProbeTolerance;
+ EFI_EXP_BASE10_DATA VoltageProbeAccuracy;
+ EFI_EXP_BASE10_DATA VoltageProbeNominalValue;
+ EFI_EXP_BASE10_DATA MDLowerNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerNonrecoverableThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNonrecoverableThreshold;
+ UINT32 VoltageProbeOemDefined;
+} EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Cooling Device - SMBIOS Type 27
+//
+#define EFI_MISC_COOLING_DEVICE_TEMP_LINK_RECORD_NUMBER 0x00000015
+
+typedef struct {
+ UINT32 CoolingDevice :5;
+ UINT32 CoolingDeviceStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_COOLING_DEVICE_TYPE;
+
+typedef struct {
+ EFI_MISC_COOLING_DEVICE_TYPE CoolingDeviceType;
+ EFI_INTER_LINK_DATA CoolingDeviceTemperatureLink;
+ UINT16 CoolingDeviceUnitGroup;
+ EFI_EXP_BASE10_DATA CoolingDeviceNominalSpeed;
+ UINT32 CoolingDeviceOemDefined;
+} EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Temperature Probe - SMBIOS Type 28
+//
+#define EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000016
+
+typedef struct {
+ UINT32 TemperatureProbeSite :5;
+ UINT32 TemperatureProbeStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_TEMPERATURE_PROBE_LOCATION;
+
+typedef struct {
+ STRING_REF TemperatureProbeDescription;
+ EFI_MISC_TEMPERATURE_PROBE_LOCATION
+ TemperatureProbeLocation;
+ EFI_EXP_BASE10_DATA TemperatureProbeMaximumValue;
+ EFI_EXP_BASE10_DATA TemperatureProbeMinimumValue;
+ EFI_EXP_BASE10_DATA TemperatureProbeResolution;
+ EFI_EXP_BASE10_DATA TemperatureProbeTolerance;
+ EFI_EXP_BASE10_DATA TemperatureProbeAccuracy;
+ EFI_EXP_BASE10_DATA TemperatureProbeNominalValue;
+ EFI_EXP_BASE10_DATA MDLowerNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerNonrecoverableThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNonrecoverableThreshold;
+ UINT32 TemperatureProbeOemDefined;
+} EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Electrical Current Probe - SMBIOS Type 29
+//
+
+#define EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000017
+
+typedef struct {
+ UINT32 ElectricalCurrentProbeSite :5;
+ UINT32 ElectricalCurrentProbeStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;
+
+typedef struct {
+ STRING_REF ElectricalCurrentProbeDescription;
+ EFI_MISC_ELECTRICAL_CURRENT_PROBE_LOCATION
+ ElectricalCurrentProbeLocation;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeMaximumValue;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeMinimumValue;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeResolution;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeTolerance;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeAccuracy;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeNominalValue;
+ EFI_EXP_BASE10_DATA MDLowerNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerNonrecoverableThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNonrecoverableThreshold;
+ UINT32 ElectricalCurrentProbeOemDefined;
+} EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Out-of-Band Remote Access - SMBIOS Type 30
+//
+
+#define EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_RECORD_NUMBER 0x00000018
+
+typedef struct {
+ UINT32 InboundConnectionEnabled :1;
+ UINT32 OutboundConnectionEnabled :1;
+ UINT32 Reserved :30;
+} EFI_MISC_REMOTE_ACCESS_CONNECTIONS;
+
+typedef struct {
+ STRING_REF RemoteAccessManufacturerNameDescription;
+ EFI_MISC_REMOTE_ACCESS_CONNECTIONS RemoteAccessConnections;
+} EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. BIS Entry Point - SMBIOS Type 31
+//
+#define EFI_MISC_BIS_ENTRY_POINT_RECORD_NUMBER 0x00000019
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS BisEntryPoint;
+} EFI_MISC_BIS_ENTRY_POINT_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Boot Information - SMBIOS Type 32
+//
+#define EFI_MISC_BOOT_INFORMATION_STATUS_RECORD_NUMBER 0x0000001A
+
+typedef enum {
+ EfiBootInformationStatusNoError = 0x00,
+ EfiBootInformationStatusNoBootableMedia = 0x01,
+ EfiBootInformationStatusNormalOSFailedLoading = 0x02,
+ EfiBootInformationStatusFirmwareDetectedFailure = 0x03,
+ EfiBootInformationStatusOSDetectedFailure = 0x04,
+ EfiBootInformationStatusUserRequestedBoot = 0x05,
+ EfiBootInformationStatusSystemSecurityViolation = 0x06,
+ EfiBootInformationStatusPreviousRequestedImage = 0x07,
+ EfiBootInformationStatusWatchdogTimerExpired = 0x08,
+ EfiBootInformationStatusStartReserved = 0x09,
+ EfiBootInformationStatusStartOemSpecific = 0x80,
+ EfiBootInformationStatusStartProductSpecific = 0xC0,
+} EFI_MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;
+
+typedef struct {
+ EFI_MISC_BOOT_INFORMATION_STATUS_DATA_TYPE BootInformationStatus;
+ UINT8 BootInformationData[9];
+} EFI_MISC_BOOT_INFORMATION_STATUS_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Management Device - SMBIOS Type 34
+//
+#define EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_RECORD_NUMBER 0x0000001B
+
+typedef enum {
+ EfiManagementDeviceTypeOther = 0x01,
+ EfiManagementDeviceTypeUnknown = 0x02,
+ EfiManagementDeviceTypeLm75 = 0x03,
+ EfiManagementDeviceTypeLm78 = 0x04,
+ EfiManagementDeviceTypeLm79 = 0x05,
+ EfiManagementDeviceTypeLm80 = 0x06,
+ EfiManagementDeviceTypeLm81 = 0x07,
+ EfiManagementDeviceTypeAdm9240 = 0x08,
+ EfiManagementDeviceTypeDs1780 = 0x09,
+ EfiManagementDeviceTypeMaxim1617 = 0x0A,
+ EfiManagementDeviceTypeGl518Sm = 0x0B,
+ EfiManagementDeviceTypeW83781D = 0x0C,
+ EfiManagementDeviceTypeHt82H791 = 0x0D,
+} EFI_MISC_MANAGEMENT_DEVICE_TYPE;
+
+typedef enum {
+ EfiManagementDeviceAddressTypeOther = 1,
+ EfiManagementDeviceAddressTypeUnknown = 2,
+ EfiManagementDeviceAddressTypeIOPort = 3,
+ EfiManagementDeviceAddressTypeMemory = 4,
+ EfiManagementDeviceAddressTypeSmbus = 5
+} EFI_MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;
+
+typedef struct {
+ STRING_REF ManagementDeviceDescription;
+ EFI_MISC_MANAGEMENT_DEVICE_TYPE ManagementDeviceType;
+ UINTN ManagementDeviceAddress;
+ EFI_MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE
+ ManagementDeviceAddressType;
+} EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Management Device Component - SMBIOS Type 35
+//
+
+#define EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_RECORD_NUMBER 0x0000001C
+
+typedef struct {
+ STRING_REF ManagementDeviceComponentDescription;
+ EFI_INTER_LINK_DATA ManagementDeviceLink;
+ EFI_INTER_LINK_DATA ManagementDeviceComponentLink;
+} EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// IPMI Data Record - SMBIOS Type 38
+//
+typedef enum {
+ EfiIpmiOther = 0,
+ EfiIpmiKcs = 1,
+ EfiIpmiSmic = 2,
+ EfiIpmiBt = 3,
+} EFI_MISC_IPMI_INTERFACE_TYPE;
+
+typedef struct {
+ UINT16 IpmiSpecLeastSignificantDigit:4;
+ UINT16 IpmiSpecMostSignificantDigit: 4;
+ UINT16 Reserved: 8;
+} EFI_MISC_IPMI_SPECIFICATION_REVISION;
+
+typedef struct {
+ EFI_MISC_IPMI_INTERFACE_TYPE IpmiInterfaceType;
+ EFI_MISC_IPMI_SPECIFICATION_REVISION IpmiSpecificationRevision;
+ UINT16 IpmiI2CSlaveAddress;
+ UINT16 IpmiNvDeviceAddress;
+ UINT64 IpmiBaseAddress;
+ EFI_DEVICE_PATH_PROTOCOL IpmiDevicePath;
+} EFI_MISC_IPMI_INTERFACE_TYPE_DATA;
+
+#define EFI_MISC_IPMI_INTERFACE_TYPE_RECORD_NUMBER 0x0000001D
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+//System Power supply Record - SMBIOS Type 39
+//
+typedef struct {
+ UINT16 PowerSupplyHotReplaceable :1;
+ UINT16 PowerSupplyPresent :1;
+ UINT16 PowerSupplyUnplugged :1;
+ UINT16 InputVoltageRangeSwitch :4;
+ UINT16 PowerSupplyStatus :3;
+ UINT16 PowerSupplyType :4;
+ UINT16 Reserved :2;
+} POWER_SUPPLY_CHARACTERISTICS;
+
+typedef struct {
+ UINT16 PowerUnitGroup;
+ STRING_REF PowerSupplyLocation;
+ STRING_REF PowerSupplyDeviceName;
+ STRING_REF PowerSupplyManufacturer;
+ STRING_REF PowerSupplySerialNumber;
+ STRING_REF PowerSupplyAssetTagNumber;
+ STRING_REF PowerSupplyModelPartNumber;
+ STRING_REF PowerSupplyRevisionLevel;
+ UINT16 PowerSupplyMaxPowerCapacity;
+ POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;
+ EFI_INTER_LINK_DATA PowerSupplyInputVoltageProbeLink;
+ EFI_INTER_LINK_DATA PowerSupplyCoolingDeviceLink;
+ EFI_INTER_LINK_DATA PowerSupplyInputCurrentProbeLink;
+} EFI_MISC_SYSTEM_POWER_SUPPLY_DATA;
+
+#define EFI_MISC_SYSTEM_POWER_SUPPLY_RECORD_NUMBER 0x0000001E
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// OEM Data Record - SMBIOS Type 0x80-0xFF
+//
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Handle;
+} SMBIOS_STRUCTURE_HDR;
+
+typedef struct {
+ SMBIOS_STRUCTURE_HDR Header;
+ UINT8 RawData[1];
+} EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA;
+
+#define EFI_MISC_SMBIOS_STRUCT_ENCAP_RECORD_NUMBER 0x0000001F
+
+//
+// Declare the following strutures alias to use them more conviniently.
+//
+typedef EFI_MISC_LAST_PCI_BUS_DATA EFI_MISC_LAST_PCI_BUS;
+typedef EFI_MISC_BIOS_VENDOR_DATA EFI_MISC_BIOS_VENDOR;
+typedef EFI_MISC_SYSTEM_MANUFACTURER_DATA EFI_MISC_SYSTEM_MANUFACTURER;
+typedef EFI_MISC_BASE_BOARD_MANUFACTURER_DATA EFI_MISC_BASE_BOARD_MANUFACTURER;
+typedef EFI_MISC_CHASSIS_MANUFACTURER_DATA EFI_MISC_CHASSIS_MANUFACTURER;
+typedef EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR;
+typedef EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA EFI_MISC_SYSTEM_SLOT_DESIGNATION;
+typedef EFI_MISC_ONBOARD_DEVICE_DATA EFI_MISC_ONBOARD_DEVICE;
+typedef EFI_MISC_PORTING_DEVICE_TYPE_DATA EFI_MISC_ONBOARD_DEVICE_TYPE_DATA;
+typedef EFI_MISC_OEM_STRING_DATA EFI_MISC_OEM_STRING;
+typedef EFI_MISC_SYSTEM_OPTION_STRING_DATA EFI_MISC_SYSTEM_OPTION_STRING;
+typedef EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES;
+typedef EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA EFI_MISC_SYSTEM_LANGUAGE_STRING;
+typedef EFI_MISC_SYSTEM_EVENT_LOG_DATA EFI_MISC_SYSTEM_EVENT_LOG;
+typedef EFI_MISC_BIS_ENTRY_POINT_DATA EFI_MISC_BIS_ENTRY_POINT;
+typedef EFI_MISC_BOOT_INFORMATION_STATUS_DATA EFI_MISC_BOOT_INFORMATION_STATUS;
+typedef EFI_MISC_SYSTEM_POWER_SUPPLY_DATA EFI_MISC_SYSTEM_POWER_SUPPLY;
+typedef EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION;
+
+typedef union {
+ EFI_MISC_LAST_PCI_BUS_DATA LastPciBus;
+ EFI_MISC_BIOS_VENDOR_DATA MiscBiosVendor;
+ EFI_MISC_SYSTEM_MANUFACTURER_DATA MiscSystemManufacturer;
+ EFI_MISC_BASE_BOARD_MANUFACTURER_DATA MiscBaseBoardManufacturer;
+ EFI_MISC_CHASSIS_MANUFACTURER_DATA MiscChassisManufacturer;
+ EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA MiscPortInternalConnectorDesignator;
+ EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA MiscSystemSlotDesignation;
+ EFI_MISC_ONBOARD_DEVICE_DATA MiscOnboardDevice;
+ EFI_MISC_OEM_STRING_DATA MiscOemString;
+ EFI_MISC_SYSTEM_OPTION_STRING_DATA MiscOptionString;
+ EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA NumberOfInstallableLanguages;
+ EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA MiscSystemLanguageString;
+ EFI_MISC_SYSTEM_EVENT_LOG_DATA MiscSystemEventLog;
+ EFI_MISC_GROUP_NAME_DATA MiscGroupNameData;
+ EFI_MISC_GROUP_ITEM_SET_DATA MiscGroupItemSetData;
+ EFI_MISC_PORTING_DEVICE_TYPE_DATA MiscPortingDeviceTypeData;
+ EFI_MISC_RESET_CAPABILITIES_DATA MiscResetCapablilitiesData;
+ EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA MiscHardwareSecuritySettingsData;
+ EFI_MISC_SCHEDULED_POWER_ON_MONTH_DATA MiscScheduledPowerOnMonthData;
+ EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_DATA MiscVoltagePorbeDescriptionData;
+ EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA MiscCoolingDeviceTempLinkData;
+ EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA MiscTemperatureProbeDescriptionData;
+ EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_DATA MiscElectricalCurrentProbeDescriptionData;
+ EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_DATA
+ MiscRemoteAccessManufacturerDescriptionData;
+ EFI_MISC_BIS_ENTRY_POINT_DATA MiscBisEntryPoint;
+ EFI_MISC_BOOT_INFORMATION_STATUS_DATA MiscBootInformationStatus;
+ EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_DATA MiscMangementDeviceDescriptionData;
+ EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA
+ MiscmangementDeviceComponentDescriptionData;
+ EFI_MISC_IPMI_INTERFACE_TYPE_DATA MiscIpmiInterfaceTypeData;
+ EFI_MISC_SYSTEM_POWER_SUPPLY_DATA MiscPowerSupplyInfo;
+ EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA MiscSmbiosStructEncapsulation;
+} EFI_MISC_SUBCLASS_RECORDS;
+
+//
+//
+//
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER Header;
+ EFI_MISC_SUBCLASS_RECORDS Record;
+} EFI_MISC_SUBCLASS_DRIVER_DATA;
+
+#pragma pack()
+
+//
+// Sub Class Header type1
+//
+
+#define EFI_SUBCLASS_INSTANCE_RESERVED 0
+#define EFI_SUBCLASS_INSTANCE_NON_APPLICABLE 0xFFFF //16 bit
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Framework/FrameworkDxeCis.h b/IntelFrameworkPkg/Include/Framework/FrameworkDxeCis.h new file mode 100644 index 0000000000..0b7ffdf0a8 --- /dev/null +++ b/IntelFrameworkPkg/Include/Framework/FrameworkDxeCis.h @@ -0,0 +1,104 @@ +/** @file
+ Include file that supportes Framework extension to the EFI 1.10 spec.
+
+ This include file must only contain things defined in the Framework
+ specifications. If a code construct is defined in the Framework specification
+ it must be included by this include file.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkDxeCis.h
+
+**/
+
+#ifndef _FRAMEWORK_DXE_CIS_H_
+#define _FRAMEWORK_DXE_CIS_H_
+
+#include <PiDxe.h>
+#include <Common/FrameworkStatusCode.h>
+#include <Protocol/StatusCode.h>
+
+//
+// Function prototype for invoking a function on an Application Processor
+// Used by both the SMM infrastructure and the MP Services Protocol
+//
+typedef
+VOID
+(EFIAPI *EFI_AP_PROCEDURE) (
+ IN VOID *Buffer
+ );
+
+typedef struct {
+ EFI_TABLE_HEADER Hdr;
+
+ //
+ // Time services
+ //
+ EFI_GET_TIME GetTime;
+ EFI_SET_TIME SetTime;
+ EFI_GET_WAKEUP_TIME GetWakeupTime;
+ EFI_SET_WAKEUP_TIME SetWakeupTime;
+
+ //
+ // Virtual memory services
+ //
+ EFI_SET_VIRTUAL_ADDRESS_MAP SetVirtualAddressMap;
+ EFI_CONVERT_POINTER ConvertPointer;
+
+ //
+ // Variable services
+ //
+ EFI_GET_VARIABLE GetVariable;
+ EFI_GET_NEXT_VARIABLE_NAME GetNextVariableName;
+ EFI_SET_VARIABLE SetVariable;
+
+ //
+ // Misc
+ //
+ EFI_GET_NEXT_HIGH_MONO_COUNT GetNextHighMonotonicCount;
+ EFI_RESET_SYSTEM ResetSystem;
+
+ //
+ // Framework extension to EFI 1.10 runtime table
+ // It was moved to a protocol to not conflict with UEFI 2.0
+ //
+ EFI_REPORT_STATUS_CODE ReportStatusCode;
+} FRAMEWORK_EFI_RUNTIME_SERVICES;
+
+#define EFI_EVENT_RUNTIME_CONTEXT 0x20000000
+#define EFI_EVENT_NOTIFY_SIGNAL_ALL 0x00000400
+#define EFI_EVENT_SIGNAL_READY_TO_BOOT 0x00000203
+#define EFI_EVENT_SIGNAL_LEGACY_BOOT 0x00000204
+
+
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_GUID TianoSpecificDevicePath;
+ UINT32 Type;
+} TIANO_DEVICE_PATH;
+
+#define TIANO_MEDIA_FW_VOL_FILEPATH_DEVICE_PATH_TYPE 0x01
+typedef struct {
+ TIANO_DEVICE_PATH Tiano;
+ EFI_GUID NameGuid;
+} FRAMEWORK_MEDIA_FW_VOL_FILEPATH_DEVICE_PATH;
+
+
+//
+// Function prototype for invoking a function on an Application Processor
+// Used by both the SMM infrastructure and the MP Services Protocol
+//
+typedef
+VOID
+(EFIAPI *EFI_AP_PROCEDURE) (
+ IN VOID *Buffer
+ );
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Framework/FrameworkFirmwareFileSystem.h b/IntelFrameworkPkg/Include/Framework/FrameworkFirmwareFileSystem.h new file mode 100644 index 0000000000..c0acbc98f0 --- /dev/null +++ b/IntelFrameworkPkg/Include/Framework/FrameworkFirmwareFileSystem.h @@ -0,0 +1,31 @@ +/** @file
+ This file defines the data structures that comprise the FFS file system.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkFirmwareFileSystem.h
+
+ @par Revision Reference:
+ These definitions are from Firmware File System Spec 0.9 but not in PI specs.
+
+**/
+
+#ifndef _FRAMEWORK_FIRMWARE_FILE_SYSTEM_H_
+#define _FRAMEWORK_FIRMWARE_FILE_SYSTEM_H_
+
+#include <PiPei.h>
+
+typedef UINT16 EFI_FFS_FILE_TAIL;
+
+#define FFS_ATTRIB_TAIL_PRESENT 0x01
+#define FFS_ATTRIB_RECOVERY 0x02
+#define FFS_ATTRIB_HEADER_EXTENSION 0x04
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Framework/FrameworkFirmwareVolumeHeader.h b/IntelFrameworkPkg/Include/Framework/FrameworkFirmwareVolumeHeader.h new file mode 100644 index 0000000000..1f584fe0e2 --- /dev/null +++ b/IntelFrameworkPkg/Include/Framework/FrameworkFirmwareVolumeHeader.h @@ -0,0 +1,82 @@ +/** @file
+ Defines data structure that is the volume header found at the beginning of
+ all firmware volumes that are either memory mapped, or have an
+ associated FirmwareVolumeBlock protocol.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FirmwareVolumeHeader.h
+
+ @par Revision Reference:
+ These definitions are from Firmware Volume Block Spec 0.9.
+
+**/
+
+#ifndef __EFI_FIRMWARE_VOLUME_HEADER_H__
+#define __EFI_FIRMWARE_VOLUME_HEADER_H__
+
+//
+// Firmware Volume Block Attributes definition
+//
+typedef UINT32 EFI_FVB_ATTRIBUTES;
+
+//
+// Firmware Volume Block Attributes bit definitions
+//
+#define EFI_FVB_READ_DISABLED_CAP 0x00000001
+#define EFI_FVB_READ_ENABLED_CAP 0x00000002
+#define EFI_FVB_READ_STATUS 0x00000004
+
+#define EFI_FVB_WRITE_DISABLED_CAP 0x00000008
+#define EFI_FVB_WRITE_ENABLED_CAP 0x00000010
+#define EFI_FVB_WRITE_STATUS 0x00000020
+
+#define EFI_FVB_LOCK_CAP 0x00000040
+#define EFI_FVB_LOCK_STATUS 0x00000080
+
+#define EFI_FVB_STICKY_WRITE 0x00000200
+#define EFI_FVB_MEMORY_MAPPED 0x00000400
+#define EFI_FVB_ERASE_POLARITY 0x00000800
+
+#define EFI_FVB_ALIGNMENT_CAP 0x00008000
+#define EFI_FVB_ALIGNMENT_2 0x00010000
+#define EFI_FVB_ALIGNMENT_4 0x00020000
+#define EFI_FVB_ALIGNMENT_8 0x00040000
+#define EFI_FVB_ALIGNMENT_16 0x00080000
+#define EFI_FVB_ALIGNMENT_32 0x00100000
+#define EFI_FVB_ALIGNMENT_64 0x00200000
+#define EFI_FVB_ALIGNMENT_128 0x00400000
+#define EFI_FVB_ALIGNMENT_256 0x00800000
+#define EFI_FVB_ALIGNMENT_512 0x01000000
+#define EFI_FVB_ALIGNMENT_1K 0x02000000
+#define EFI_FVB_ALIGNMENT_2K 0x04000000
+#define EFI_FVB_ALIGNMENT_4K 0x08000000
+#define EFI_FVB_ALIGNMENT_8K 0x10000000
+#define EFI_FVB_ALIGNMENT_16K 0x20000000
+#define EFI_FVB_ALIGNMENT_32K 0x40000000
+#define EFI_FVB_ALIGNMENT_64K 0x80000000
+
+#define EFI_FVB_CAPABILITIES (EFI_FVB_READ_DISABLED_CAP | \
+ EFI_FVB_READ_ENABLED_CAP | \
+ EFI_FVB_WRITE_DISABLED_CAP | \
+ EFI_FVB_WRITE_ENABLED_CAP | \
+ EFI_FVB_LOCK_CAP \
+ )
+
+#define EFI_TEST_FFS_ATTRIBUTES_BIT(FvbAttributes, TestAttributes, Bit) \
+ ( \
+ (BOOLEAN) ( \
+ (FvbAttributes & EFI_FVB_ERASE_POLARITY) ? (((~TestAttributes) & Bit) == Bit) : ((TestAttributes & Bit) == Bit) \
+ ) \
+ )
+
+#define EFI_FVB_STATUS (EFI_FVB_READ_STATUS | EFI_FVB_WRITE_STATUS | EFI_FVB_LOCK_STATUS)
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Framework/FrameworkFirmwareVolumeImageFormat.h b/IntelFrameworkPkg/Include/Framework/FrameworkFirmwareVolumeImageFormat.h new file mode 100644 index 0000000000..9b4e3b6054 --- /dev/null +++ b/IntelFrameworkPkg/Include/Framework/FrameworkFirmwareVolumeImageFormat.h @@ -0,0 +1,43 @@ +/** @file
+ This file defines the data structures that are architecturally defined for file
+ images loaded via the FirmwareVolume protocol. The Firmware Volume specification
+ is the basis for these definitions.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkFimrwareVolumeImageFormat.h
+
+ @par Revision Reference:
+ These definitions are from Firmware Volume Spec 0.9.
+
+**/
+
+#ifndef __FRAMEWORK_FIRMWARE_VOLUME_IMAGE_FORMAT_H__
+#define __FRAMEWORK_FIRMWARE_VOLUME_IMAGE_FORMAT_H__
+
+//
+// Bit values for AuthenticationStatus
+//
+#define EFI_AGGREGATE_AUTH_STATUS_PLATFORM_OVERRIDE 0x000001
+#define EFI_AGGREGATE_AUTH_STATUS_IMAGE_SIGNED 0x000002
+#define EFI_AGGREGATE_AUTH_STATUS_NOT_TESTED 0x000004
+#define EFI_AGGREGATE_AUTH_STATUS_TEST_FAILED 0x000008
+#define EFI_AGGREGATE_AUTH_STATUS_ALL 0x00000f
+
+#define EFI_LOCAL_AUTH_STATUS_PLATFORM_OVERRIDE 0x010000
+#define EFI_LOCAL_AUTH_STATUS_IMAGE_SIGNED 0x020000
+#define EFI_LOCAL_AUTH_STATUS_NOT_TESTED 0x040000
+#define EFI_LOCAL_AUTH_STATUS_TEST_FAILED 0x080000
+#define EFI_LOCAL_AUTH_STATUS_ALL 0x0f0000
+
+
+#define EFI_FV_FILETYPE_ALL 0x00
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Framework/FrameworkHob.h b/IntelFrameworkPkg/Include/Framework/FrameworkHob.h new file mode 100644 index 0000000000..cdc419d0ea --- /dev/null +++ b/IntelFrameworkPkg/Include/Framework/FrameworkHob.h @@ -0,0 +1,36 @@ +/** @file
+ This file defines the data structures per HOB specification v0.9.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkFirmwareFileSystem.h
+
+ @par Revision Reference:
+ These definitions are from HOB Spec 0.9 but not adopted by PI specs.
+
+**/
+
+#ifndef _FRAMEWORK_HOB_H_
+#define _FRAMEWORK_HOB_H_
+
+#include <PiPei.h>
+
+//
+// Capsule volume HOB -- identical to a firmware volume
+//
+#define EFI_HOB_TYPE_CV 0x0008
+
+typedef struct {
+ EFI_HOB_GENERIC_HEADER Header;
+ EFI_PHYSICAL_ADDRESS BaseAddress;
+ UINT64 Length;
+} EFI_HOB_CAPSULE_VOLUME;
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Framework/FrameworkLegacy16.h b/IntelFrameworkPkg/Include/Framework/FrameworkLegacy16.h new file mode 100644 index 0000000000..7f80c8ac72 --- /dev/null +++ b/IntelFrameworkPkg/Include/Framework/FrameworkLegacy16.h @@ -0,0 +1,431 @@ +/** @file
+ API between 16-bit Legacy BIOS and EFI
+
+ We need to figure out what the 16-bit code is going to use to
+ represent these data structures. Is a pointer SEG:OFF or 32-bit...
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkLegacy16.h
+
+ @par Revision Reference:
+ These definitions are from Compatibility Support Module Spec Version 0.96.
+
+**/
+
+#ifndef _FRAMEWORK_LEGACY_16_H_
+#define _FRAMEWORK_LEGACY_16_H_
+
+#include <Base.h>
+
+//
+// All structures defined in this header file are packed on byte boundary
+//
+#pragma pack(1)
+
+typedef UINT8 SERIAL_MODE;
+typedef UINT8 PARALLEL_MODE;
+
+///////////////////////////////////////////////////////////////////////////////
+// EFI_COMPATIBILITY16_TABLE is located at a 16-byte boundary starting with the
+// signature "$EFI"
+///////////////////////////////////////////////////////////////////////////////
+
+#define EFI_COMPATIBILITY16_TABLE_SIGNATURE EFI_SIGNATURE_32('$', 'E', 'F', 'I')
+
+typedef struct {
+ UINT32 Signature; // "$EFI"
+ UINT8 TableChecksum;
+ UINT8 TableLength;
+ UINT8 EfiMajorRevision;
+ UINT8 EfiMinorRevision;
+ UINT8 TableMajorRevision;
+ UINT8 TableMinorRevision;
+ UINT16 Reserved;
+ UINT16 Compatibility16CallSegment;
+ UINT16 Compatibility16CallOffset;
+ UINT16 PnPInstallationCheckSegment;
+ UINT16 PnPInstallationCheckOffset;
+ UINT32 EfiSystemTable; // The physical address of EFI_SYSTEM_TABLE
+ UINT32 OemIdStringPointer;
+ UINT32 AcpiRsdPtrPointer;
+ UINT16 OemRevision;
+ UINT32 E820Pointer;
+ UINT32 E820Length;
+ UINT32 IrqRoutingTablePointer;
+ UINT32 IrqRoutingTableLength;
+ UINT32 MpTablePtr;
+ UINT32 MpTableLength;
+ UINT16 OemIntSegment;
+ UINT16 OemIntOffset;
+ UINT16 Oem32Segment;
+ UINT16 Oem32Offset;
+ UINT16 Oem16Segment;
+ UINT16 Oem16Offset;
+ UINT16 TpmSegment;
+ UINT16 TpmOffset;
+ UINT32 IbvPointer;
+ UINT32 PciExpressBase;
+ UINT8 LastPciBus;
+} EFI_COMPATIBILITY16_TABLE;
+
+///////////////////////////////////////////////////////////////////////////////
+// Functions provided by the CSM binary
+///////////////////////////////////////////////////////////////////////////////
+typedef enum {
+ Legacy16InitializeYourself = 0x0000,
+ Legacy16UpdateBbs = 0x0001,
+ Legacy16PrepareToBoot = 0x0002,
+ Legacy16Boot = 0x0003,
+ Legacy16RetrieveLastBootDevice= 0x0004,
+ Legacy16DispatchOprom = 0x0005,
+ Legacy16GetTableAddress = 0x0006,
+ Legacy16SetKeyboardLeds = 0x0007,
+ Legacy16InstallPciHandler = 0x0008
+} EFI_COMPATIBILITY_FUNCTIONS;
+
+///////////////////////////////////////////////////////////////////////////////
+// EFI_TO_COMPATIBILITY16_INIT_TABLE
+///////////////////////////////////////////////////////////////////////////////
+typedef struct {
+ UINT32 BiosLessThan1MB;
+ UINT32 HiPmmMemory;
+ UINT32 HiPmmMemorySizeInBytes;
+ UINT16 ReverseThunkCallSegment;
+ UINT16 ReverseThunkCallOffset;
+ UINT32 NumberE820Entries;
+ UINT32 OsMemoryAbove1Mb;
+ UINT32 ThunkStart;
+ UINT32 ThunkSizeInBytes;
+ UINT32 LowPmmMemory;
+ UINT32 LowPmmMemorySizeInBytes;
+} EFI_TO_COMPATIBILITY16_INIT_TABLE;
+
+///////////////////////////////////////////////////////////////////////////////
+// EFI_TO_COMPATIBILITY16_BOOT_TABLE
+///////////////////////////////////////////////////////////////////////////////
+
+typedef UINT8 SERIAL_MODE;
+typedef UINT8 PARALLEL_MODE;
+
+//
+// DEVICE_PRODUCER_SERIAL & its modes
+//
+typedef struct {
+ UINT16 Address;
+ UINT8 Irq;
+ SERIAL_MODE Mode;
+} DEVICE_PRODUCER_SERIAL;
+
+#define DEVICE_SERIAL_MODE_NORMAL 0x00
+#define DEVICE_SERIAL_MODE_IRDA 0x01
+#define DEVICE_SERIAL_MODE_ASK_IR 0x02
+#define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00
+#define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10
+
+//
+// DEVICE_PRODUCER_PARALLEL & its modes
+//
+typedef struct {
+ UINT16 Address;
+ UINT8 Irq;
+ UINT8 Dma;
+ PARALLEL_MODE Mode;
+} DEVICE_PRODUCER_PARALLEL;
+
+#define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00
+#define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01
+#define DEVICE_PARALLEL_MODE_MODE_EPP 0x02
+#define DEVICE_PARALLEL_MODE_MODE_ECP 0x03
+
+//
+// DEVICE_PRODUCER_FLOPPY
+//
+typedef struct {
+ UINT16 Address;
+ UINT8 Irq;
+ UINT8 Dma;
+ UINT8 NumberOfFloppy;
+} DEVICE_PRODUCER_FLOPPY;
+
+//
+// LEGACY_DEVICE_FLAGS
+//
+typedef struct {
+ UINT32 A20Kybd : 1;
+ UINT32 A20Port90 : 1;
+ UINT32 Reserved : 30;
+} LEGACY_DEVICE_FLAGS;
+
+//
+// DEVICE_PRODUCER_DATA_HEADER
+//
+typedef struct {
+ DEVICE_PRODUCER_SERIAL Serial[4];
+ DEVICE_PRODUCER_PARALLEL Parallel[3];
+ DEVICE_PRODUCER_FLOPPY Floppy;
+ UINT8 MousePresent;
+ LEGACY_DEVICE_FLAGS Flags;
+} DEVICE_PRODUCER_DATA_HEADER;
+
+//
+// ATAPI_IDENTIFY
+//
+typedef struct {
+ UINT16 Raw[256];
+} ATAPI_IDENTIFY;
+
+//
+// HDD_INFO & its status
+//
+typedef struct {
+ UINT16 Status;
+ UINT32 Bus;
+ UINT32 Device;
+ UINT32 Function;
+ UINT16 CommandBaseAddress;
+ UINT16 ControlBaseAddress;
+ UINT16 BusMasterAddress;
+ UINT8 HddIrq;
+ ATAPI_IDENTIFY IdentifyDrive[2];
+} HDD_INFO;
+
+#define HDD_PRIMARY 0x01
+#define HDD_SECONDARY 0x02
+#define HDD_MASTER_ATAPI_CDROM 0x04
+#define HDD_SLAVE_ATAPI_CDROM 0x08
+#define HDD_MASTER_IDE 0x20
+#define HDD_SLAVE_IDE 0x40
+#define HDD_MASTER_ATAPI_ZIPDISK 0x10
+#define HDD_SLAVE_ATAPI_ZIPDISK 0x80
+
+//
+// BBS_STATUS_FLAGS
+//
+typedef struct {
+ UINT16 OldPosition : 4;
+ UINT16 Reserved1 : 4;
+ UINT16 Enabled : 1;
+ UINT16 Failed : 1;
+ UINT16 MediaPresent : 2;
+ UINT16 Reserved2 : 4;
+} BBS_STATUS_FLAGS;
+
+//
+// BBS_TABLE, device type values & boot priority values
+//
+typedef struct {
+ UINT16 BootPriority;
+ UINT32 Bus;
+ UINT32 Device;
+ UINT32 Function;
+ UINT8 Class;
+ UINT8 SubClass;
+ UINT16 MfgStringOffset;
+ UINT16 MfgStringSegment;
+ UINT16 DeviceType;
+ BBS_STATUS_FLAGS StatusFlags;
+ UINT16 BootHandlerOffset;
+ UINT16 BootHandlerSegment;
+ UINT16 DescStringOffset;
+ UINT16 DescStringSegment;
+ UINT32 InitPerReserved;
+ UINT32 AdditionalIrq13Handler;
+ UINT32 AdditionalIrq18Handler;
+ UINT32 AdditionalIrq19Handler;
+ UINT32 AdditionalIrq40Handler;
+ UINT8 AssignedDriveNumber;
+ UINT32 AdditionalIrq41Handler;
+ UINT32 AdditionalIrq46Handler;
+ UINT32 IBV1;
+ UINT32 IBV2;
+} BBS_TABLE;
+
+#define BBS_FLOPPY 0x01
+#define BBS_HARDDISK 0x02
+#define BBS_CDROM 0x03
+#define BBS_PCMCIA 0x04
+#define BBS_USB 0x05
+#define BBS_EMBED_NETWORK 0x06
+#define BBS_BEV_DEVICE 0x80
+#define BBS_UNKNOWN 0xff
+
+#define BBS_DO_NOT_BOOT_FROM 0xFFFC
+#define BBS_LOWEST_PRIORITY 0xFFFD
+#define BBS_UNPRIORITIZED_ENTRY 0xFFFE
+#define BBS_IGNORE_ENTRY 0xFFFF
+
+//
+// SMM_ATTRIBUTES & relating type, port and data size constants
+//
+typedef struct {
+ UINT16 Type : 3;
+ UINT16 PortGranularity : 3;
+ UINT16 DataGranularity : 3;
+ UINT16 Reserved : 7;
+} SMM_ATTRIBUTES;
+
+#define STANDARD_IO 0x00
+#define STANDARD_MEMORY 0x01
+
+#define PORT_SIZE_8 0x00
+#define PORT_SIZE_16 0x01
+#define PORT_SIZE_32 0x02
+#define PORT_SIZE_64 0x03
+
+#define DATA_SIZE_8 0x00
+#define DATA_SIZE_16 0x01
+#define DATA_SIZE_32 0x02
+#define DATA_SIZE_64 0x03
+
+//
+// SMM_FUNCTION & relating constants
+//
+typedef struct {
+ UINT16 Function : 15;
+ UINT16 Owner : 1;
+} SMM_FUNCTION;
+
+#define INT15_D042 0x0000
+#define GET_USB_BOOT_INFO 0x0001
+#define DMI_PNP_50_57 0x0002
+
+#define STANDARD_OWNER 0x0
+#define OEM_OWNER 0x1
+
+//
+// SMM_ENTRY
+//
+// This structure assumes both port and data sizes are 1. SmmAttribute must be
+// properly to reflect that assumption.
+//
+typedef struct {
+ SMM_ATTRIBUTES SmmAttributes;
+ SMM_FUNCTION SmmFunction;
+ UINT8 SmmPort;
+ UINT8 SmmData;
+} SMM_ENTRY;
+
+//
+// SMM_TABLE
+//
+typedef struct {
+ UINT16 NumSmmEntries;
+ SMM_ENTRY SmmEntry;
+} SMM_TABLE;
+
+//
+// UDC_ATTRIBUTES
+//
+typedef struct {
+ UINT8 DirectoryServiceValidity : 1;
+ UINT8 RabcaUsedFlag : 1;
+ UINT8 ExecuteHddDiagnosticsFlag : 1;
+ UINT8 Reserved : 5;
+} UDC_ATTRIBUTES;
+
+//
+// UD_TABLE
+//
+typedef struct {
+ UDC_ATTRIBUTES Attributes;
+ UINT8 DeviceNumber;
+ UINT8 BbsTableEntryNumberForParentDevice;
+ UINT8 BbsTableEntryNumberForBoot;
+ UINT8 BbsTableEntryNumberForHddDiag;
+ UINT8 BeerData[128];
+ UINT8 ServiceAreaData[64];
+} UD_TABLE;
+
+//
+// EFI_TO_COMPATIBILITY16_BOOT_TABLE
+//
+#define EFI_TO_LEGACY_MAJOR_VERSION 0x02
+#define EFI_TO_LEGACY_MINOR_VERSION 0x00
+#define MAX_IDE_CONTROLLER 8
+
+typedef struct {
+ UINT16 MajorVersion;
+ UINT16 MinorVersion;
+ UINT32 AcpiTable; // 4 GB range
+ UINT32 SmbiosTable; // 4 GB range
+ UINT32 SmbiosTableLength;
+
+ //
+ // Legacy SIO state
+ //
+ DEVICE_PRODUCER_DATA_HEADER SioData;
+
+ UINT16 DevicePathType;
+ UINT16 PciIrqMask;
+ UINT32 NumberE820Entries;
+
+ //
+ // Controller & Drive Identify[2] per controller information
+ //
+ HDD_INFO HddInfo[MAX_IDE_CONTROLLER];
+
+ UINT32 NumberBbsEntries;
+ UINT32 BbsTable;
+ UINT32 SmmTable;
+ UINT32 OsMemoryAbove1Mb;
+ UINT32 UnconventionalDeviceTable;
+} EFI_TO_COMPATIBILITY16_BOOT_TABLE;
+
+///////////////////////////////////////////////////////////////////////////////
+// EFI_DISPATCH_OPROM_TABLE
+///////////////////////////////////////////////////////////////////////////////
+
+typedef struct {
+ UINT16 PnPInstallationCheckSegment;
+ UINT16 PnPInstallationCheckOffset;
+ UINT16 OpromSegment;
+ UINT8 PciBus;
+ UINT8 PciDeviceFunction;
+ UINT8 NumberBbsEntries;
+ VOID *BbsTablePointer; /// @bug: variable size on 32/64-bit systems.
+} EFI_DISPATCH_OPROM_TABLE;
+
+///////////////////////////////////////////////////////////////////////////////
+// EFI_LEGACY_INSTALL_PCI_HANDLER
+///////////////////////////////////////////////////////////////////////////////
+typedef struct {
+ UINT8 PciBus;
+ UINT8 PciDeviceFun;
+ UINT8 PciSegment;
+ UINT8 PciClass;
+ UINT8 PciSubclass;
+ UINT8 PciInterface;
+
+ //
+ // Primary section
+ //
+ UINT8 PrimaryIrq;
+ UINT8 PrimaryReserved;
+ UINT16 PrimaryControl;
+ UINT16 PrimaryBase;
+ UINT16 PrimaryBusMaster;
+
+ //
+ // Secondary Section
+ //
+ UINT8 SecondaryIrq;
+ UINT8 SecondaryReserved;
+ UINT16 SecondaryControl;
+ UINT16 SecondaryBase;
+ UINT16 SecondaryBusMaster;
+} EFI_LEGACY_INSTALL_PCI_HANDLER;
+
+//
+// Restore default pack value
+//
+#pragma pack()
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Framework/FrameworkSmmCis.h b/IntelFrameworkPkg/Include/Framework/FrameworkSmmCis.h new file mode 100644 index 0000000000..6fe8e662d9 --- /dev/null +++ b/IntelFrameworkPkg/Include/Framework/FrameworkSmmCis.h @@ -0,0 +1,480 @@ +/** @file
+ Include file matches things in the Smm CIS spec.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkSmmCis.h
+
+ @par Revision Reference:
+ Version 0.9.
+
+**/
+
+#ifndef _FRAMEWORK_SMM_CIS_H_
+#define _FRAMEWORK_SMM_CIS_H_
+
+#include <Common/FrameworkDxeCis.h>
+
+#define EFI_SMM_CPU_IO_GUID \
+ { \
+ 0x5f439a0b, 0x45d8, 0x4682, {0xa4, 0xf4, 0xf0, 0x57, 0x6b, 0x51, 0x34, 0x41 } \
+ }
+
+typedef struct _EFI_SMM_SYSTEM_TABLE EFI_SMM_SYSTEM_TABLE;
+typedef struct _EFI_SMM_CPU_IO_INTERFACE EFI_SMM_CPU_IO_INTERFACE;
+
+
+//
+// SMM Base specification constant and types
+//
+#define SMM_SMST_SIGNATURE EFI_SIGNATURE_32 ('S', 'M', 'S', 'T')
+#define EFI_SMM_SYSTEM_TABLE_REVISION (0 << 16) | (0x09)
+
+//
+// *******************************************************
+// EFI_SMM_IO_WIDTH
+// *******************************************************
+//
+typedef enum {
+ SMM_IO_UINT8 = 0,
+ SMM_IO_UINT16 = 1,
+ SMM_IO_UINT32 = 2,
+ SMM_IO_UINT64 = 3
+} EFI_SMM_IO_WIDTH;
+
+/**
+ Provides the basic memory and I/O interfaces that are used to
+ abstract accesses to devices.
+
+ @param This The EFI_SMM_CPU_IO_INTERFACE instance.
+ @param Width Signifies the width of the I/O operations.
+ @param Address The base address of the I/O operations.
+ @param Count The number of I/O operations to perform.
+ @param Buffer For read operations, the destination buffer to store the results.
+ For write operations, the source buffer from which to write data.
+
+ @retval EFI_SUCCESS The data was read from or written to the device.
+ @retval EFI_UNSUPPORTED The Address is not valid for this system.
+ @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_CPU_IO) (
+ IN EFI_SMM_CPU_IO_INTERFACE *This,
+ IN EFI_SMM_IO_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
+ );
+
+typedef struct {
+ EFI_SMM_CPU_IO Read;
+ EFI_SMM_CPU_IO Write;
+} EFI_SMM_IO_ACCESS;
+
+struct _EFI_SMM_CPU_IO_INTERFACE {
+ EFI_SMM_IO_ACCESS Mem;
+ EFI_SMM_IO_ACCESS Io;
+};
+
+/**
+ Allocates pool memory from SMRAM for IA-32 or runtime memory for
+ the Itanium processor family.
+
+ @param PoolType The type of pool to allocate.The only supported type is EfiRuntimeServicesData
+ @param Size The number of bytes to allocate from the pool.
+ @param Buffer A pointer to a pointer to the allocated buffer if the call
+ succeeds; undefined otherwise.
+
+ @retval EFI_SUCCESS The requested number of bytes was allocated.
+ @retval EFI_OUT_OF_RESOURCES The pool requested could not be allocated.
+ @retval EFI_UNSUPPORTED In runtime.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMMCORE_ALLOCATE_POOL) (
+ IN EFI_MEMORY_TYPE PoolType,
+ IN UINTN Size,
+ OUT VOID **Buffer
+ );
+
+/**
+ Returns pool memory to the system.
+
+ @param Buffer Pointer to the buffer to free.
+
+ @retval EFI_SUCCESS The memory was returned to the system.
+ @retval EFI_INVALID_PARAMETER Buffer was invalid.
+ @retval EFI_UNSUPPORTED In runtime.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMMCORE_FREE_POOL) (
+ IN VOID *Buffer
+ );
+
+/**
+ Allocates memory pages from the system.
+
+ @param Type The type of allocation to perform.
+ @param MemoryType The only supported type is EfiRuntimeServicesData
+ @param NumberofPages The number of contiguous 4 KB pages to allocate
+ @param Memory Pointer to a physical address. On input, the way in which
+ the address is used depends on the value of Type. On output, the address
+ is set to the base of the page range that was allocated.
+
+ @retval EFI_SUCCESS The requested pages were allocated.
+ @retval EFI_OUT_OF_RESOURCES The pages requested could not be allocated.
+ @retval EFI_NOT_FOUND The requested pages could not be found.
+ @retval EFI_INVALID_PARAMETER Type is not AllocateAnyPages or AllocateMaxAddress
+ or AllocateAddress. Or MemoryType is in the range EfiMaxMemoryType..0x7FFFFFFF.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMMCORE_ALLOCATE_PAGES) (
+ IN EFI_ALLOCATE_TYPE Type,
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN NumberOfPages,
+ OUT EFI_PHYSICAL_ADDRESS *Memory
+ );
+
+/**
+ Frees memory pages for the system.
+
+ @param Memory The base physical address of the pages to be freed
+ @param NumberOfPages The number of contiguous 4 KB pages to free.
+
+ @retval EFI_SUCCESS The requested memory pages were freed.
+ @retval EFI_INVALID_PARAMETER Memory is not a page-aligned address or NumberOfPages is invalid.
+ @retval EFI_NOT_FOUND The requested memory pages were not allocated with SmmAllocatePages().
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMMCORE_FREE_PAGES) (
+ IN EFI_PHYSICAL_ADDRESS Memory,
+ IN UINTN NumberOfPages
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_STARTUP_THIS_AP) (
+ IN EFI_AP_PROCEDURE Procedure,
+ IN UINTN CpuNumber,
+ IN OUT VOID *ProcArguments OPTIONAL
+ );
+
+typedef struct {
+ UINT8 Reserved1[248];
+ UINT32 SMBASE;
+ UINT32 SMMRevId;
+ UINT16 IORestart;
+ UINT16 AutoHALTRestart;
+ UINT8 Reserved2[164];
+ UINT32 ES;
+ UINT32 CS;
+ UINT32 SS;
+ UINT32 DS;
+ UINT32 FS;
+ UINT32 GS;
+ UINT32 LDTBase;
+ UINT32 TR;
+ UINT32 DR7;
+ UINT32 DR6;
+ UINT32 EAX;
+ UINT32 ECX;
+ UINT32 EDX;
+ UINT32 EBX;
+ UINT32 ESP;
+ UINT32 EBP;
+ UINT32 ESI;
+ UINT32 EDI;
+ UINT32 EIP;
+ UINT32 EFLAGS;
+ UINT32 CR3;
+ UINT32 CR0;
+} EFI_SMI_CPU_SAVE_STATE;
+
+typedef struct {
+ UINT64 reserved;
+ UINT64 r1;
+ UINT64 r2;
+ UINT64 r3;
+ UINT64 r4;
+ UINT64 r5;
+ UINT64 r6;
+ UINT64 r7;
+ UINT64 r8;
+ UINT64 r9;
+ UINT64 r10;
+ UINT64 r11;
+ UINT64 r12;
+ UINT64 r13;
+ UINT64 r14;
+ UINT64 r15;
+ UINT64 r16;
+ UINT64 r17;
+ UINT64 r18;
+ UINT64 r19;
+ UINT64 r20;
+ UINT64 r21;
+ UINT64 r22;
+ UINT64 r23;
+ UINT64 r24;
+ UINT64 r25;
+ UINT64 r26;
+ UINT64 r27;
+ UINT64 r28;
+ UINT64 r29;
+ UINT64 r30;
+ UINT64 r31;
+
+ UINT64 pr;
+
+ UINT64 b0;
+ UINT64 b1;
+ UINT64 b2;
+ UINT64 b3;
+ UINT64 b4;
+ UINT64 b5;
+ UINT64 b6;
+ UINT64 b7;
+
+ // application registers
+ UINT64 ar_rsc;
+ UINT64 ar_bsp;
+ UINT64 ar_bspstore;
+ UINT64 ar_rnat;
+
+ UINT64 ar_fcr;
+
+ UINT64 ar_eflag;
+ UINT64 ar_csd;
+ UINT64 ar_ssd;
+ UINT64 ar_cflg;
+ UINT64 ar_fsr;
+ UINT64 ar_fir;
+ UINT64 ar_fdr;
+
+ UINT64 ar_ccv;
+
+ UINT64 ar_unat;
+
+ UINT64 ar_fpsr;
+
+ UINT64 ar_pfs;
+ UINT64 ar_lc;
+ UINT64 ar_ec;
+
+ // control registers
+ UINT64 cr_dcr;
+ UINT64 cr_itm;
+ UINT64 cr_iva;
+ UINT64 cr_pta;
+ UINT64 cr_ipsr;
+ UINT64 cr_isr;
+ UINT64 cr_iip;
+ UINT64 cr_ifa;
+ UINT64 cr_itir;
+ UINT64 cr_iipa;
+ UINT64 cr_ifs;
+ UINT64 cr_iim;
+ UINT64 cr_iha;
+
+ // debug registers
+ UINT64 dbr0;
+ UINT64 dbr1;
+ UINT64 dbr2;
+ UINT64 dbr3;
+ UINT64 dbr4;
+ UINT64 dbr5;
+ UINT64 dbr6;
+ UINT64 dbr7;
+
+ UINT64 ibr0;
+ UINT64 ibr1;
+ UINT64 ibr2;
+ UINT64 ibr3;
+ UINT64 ibr4;
+ UINT64 ibr5;
+ UINT64 ibr6;
+ UINT64 ibr7;
+
+ // virtual registers
+ UINT64 int_nat; // nat bits for R1-R31
+
+} EFI_PMI_SYSTEM_CONTEXT;
+
+typedef union {
+ EFI_SMI_CPU_SAVE_STATE Ia32SaveState;
+ EFI_PMI_SYSTEM_CONTEXT ItaniumSaveState;
+} EFI_SMM_CPU_SAVE_STATE;
+
+typedef struct {
+ UINT16 Fcw;
+ UINT16 Fsw;
+ UINT16 Ftw;
+ UINT16 Opcode;
+ UINT32 Eip;
+ UINT16 Cs;
+ UINT16 Rsvd1;
+ UINT32 DataOffset;
+ UINT16 Ds;
+ UINT8 Rsvd2[10];
+ UINT8 St0Mm0[10], Rsvd3[6];
+ UINT8 St0Mm1[10], Rsvd4[6];
+ UINT8 St0Mm2[10], Rsvd5[6];
+ UINT8 St0Mm3[10], Rsvd6[6];
+ UINT8 St0Mm4[10], Rsvd7[6];
+ UINT8 St0Mm5[10], Rsvd8[6];
+ UINT8 St0Mm6[10], Rsvd9[6];
+ UINT8 St0Mm7[10], Rsvd10[6];
+ UINT8 Rsvd11[22*16];
+} EFI_SMI_OPTIONAL_FPSAVE_STATE;
+
+typedef struct {
+ UINT64 f2[2];
+ UINT64 f3[2];
+ UINT64 f4[2];
+ UINT64 f5[2];
+ UINT64 f6[2];
+ UINT64 f7[2];
+ UINT64 f8[2];
+ UINT64 f9[2];
+ UINT64 f10[2];
+ UINT64 f11[2];
+ UINT64 f12[2];
+ UINT64 f13[2];
+ UINT64 f14[2];
+ UINT64 f15[2];
+ UINT64 f16[2];
+ UINT64 f17[2];
+ UINT64 f18[2];
+ UINT64 f19[2];
+ UINT64 f20[2];
+ UINT64 f21[2];
+ UINT64 f22[2];
+ UINT64 f23[2];
+ UINT64 f24[2];
+ UINT64 f25[2];
+ UINT64 f26[2];
+ UINT64 f27[2];
+ UINT64 f28[2];
+ UINT64 f29[2];
+ UINT64 f30[2];
+ UINT64 f31[2];
+} EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT;
+
+typedef union {
+ EFI_SMI_OPTIONAL_FPSAVE_STATE Ia32FpSave;
+ EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT ItaniumFpSave;
+} EFI_SMM_FLOATING_POINT_SAVE_STATE;
+
+/**
+ This function is the main entry point for an SMM handler dispatch
+ or communicate-based callback.
+
+ @param SmmImageHandle A unique value returned by the SMM infrastructure
+ in response to registration for a communicate-based callback or dispatch.
+ @param CommunicationBuffer
+ An optional buffer that will be populated
+ by the SMM infrastructure in response to a non-SMM agent (preboot or runtime)
+ invoking the EFI_SMM_BASE_PROTOCOL.Communicate() service.
+ @param SourceSize If CommunicationBuffer is non-NULL, this field
+ indicates the size of the data payload in this buffer.
+
+ @return Status Code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_HANDLER_ENTRY_POINT) (
+ IN EFI_HANDLE SmmImageHandle,
+ IN OUT VOID *CommunicationBuffer OPTIONAL,
+ IN OUT UINTN *SourceSize OPTIONAL
+ );
+
+/**
+ The SmmInstallConfigurationTable() function is used to maintain the list
+ of configuration tables that are stored in the System Management System
+ Table. The list is stored as an array of (GUID, Pointer) pairs. The list
+ must be allocated from pool memory with PoolType set to EfiRuntimeServicesData.
+
+ @param SystemTable A pointer to the SMM System Table.
+ @param Guid A pointer to the GUID for the entry to add, update, or remove.
+ @param Table A pointer to the buffer of the table to add.
+ @param TableSize The size of the table to install.
+
+ @retval EFI_SUCCESS The (Guid, Table) pair was added, updated, or removed.
+ @retval EFI_INVALID_PARAMETER Guid is not valid.
+ @retval EFI_NOT_FOUND An attempt was made to delete a non-existent entry.
+ @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_INSTALL_CONFIGURATION_TABLE) (
+ IN EFI_SMM_SYSTEM_TABLE *SystemTable,
+ IN EFI_GUID *Guid,
+ IN VOID *Table,
+ IN UINTN TableSize
+ );
+
+//
+// System Management System Table (SMST)
+//
+struct _EFI_SMM_SYSTEM_TABLE {
+ EFI_TABLE_HEADER Hdr;
+
+ CHAR16 *SmmFirmwareVendor;
+ UINT32 SmmFirmwareRevision;
+
+ EFI_SMM_INSTALL_CONFIGURATION_TABLE SmmInstallConfigurationTable;
+
+ //
+ // I/O Services
+ //
+ EFI_GUID EfiSmmCpuIoGuid;
+ EFI_SMM_CPU_IO_INTERFACE SmmIo;
+
+ //
+ // Runtime memory service
+ //
+ EFI_SMMCORE_ALLOCATE_POOL SmmAllocatePool;
+ EFI_SMMCORE_FREE_POOL SmmFreePool;
+ EFI_SMMCORE_ALLOCATE_PAGES SmmAllocatePages;
+ EFI_SMMCORE_FREE_PAGES SmmFreePages;
+
+ //
+ // MP service
+ //
+ EFI_SMM_STARTUP_THIS_AP SmmStartupThisAp;
+
+ //
+ // CPU information records
+ //
+ UINTN CurrentlyExecutingCpu;
+ UINTN NumberOfCpus;
+ EFI_SMM_CPU_SAVE_STATE *CpuSaveState;
+ EFI_SMM_FLOATING_POINT_SAVE_STATE *CpuOptionalFloatingPointState;
+
+ //
+ // Extensibility table
+ //
+ UINTN NumberOfTableEntries;
+ EFI_CONFIGURATION_TABLE *SmmConfigurationTable;
+};
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Framework/FrameworkStatusCode.h b/IntelFrameworkPkg/Include/Framework/FrameworkStatusCode.h new file mode 100644 index 0000000000..6e997b679f --- /dev/null +++ b/IntelFrameworkPkg/Include/Framework/FrameworkStatusCode.h @@ -0,0 +1,905 @@ +/** @file
+ Status Code Definitions, according to Intel Platform Innovation Framework
+ for EFI Status Codes Specification
+
+ The file is divided into sections for ease of use.
+
+<pre>
+ Section: Contents:
+ 1 General Status Code Definitions
+ 2 Class definitions
+ 3 Computing Unit Subclasses, Progress and Error Codes
+ 4 Peripheral Subclasses, Progress and Error Codes.
+ 5 IO Bus Subclasses, Progress and Error Codes.
+ 6 Software Subclasses, Progress and Error Codes.
+ 7 Debug Codes
+</pre>
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: StatusCode.h
+
+ @par Revision Reference:
+ Version 0.92.
+
+**/
+
+#ifndef _FRAMEWORK_STATUS_CODE_H_
+#define _FRAMEWORK_STATUS_CODE_H_
+
+#include <PiPei.h>
+
+//
+// /////////////////////////////////////////////////////////////////////////////
+// Section 1
+////////////////////////////////////////////////////////////////////////////////
+
+//
+// Data Hub Status Code class record definition
+// This structure isn't adopted by PI, so is defined here.
+//
+typedef struct {
+ EFI_STATUS_CODE_TYPE CodeType;
+ EFI_STATUS_CODE_VALUE Value;
+ UINT32 Instance;
+ EFI_GUID CallerId;
+ EFI_STATUS_CODE_DATA Data;
+} DATA_HUB_STATUS_CODE_DATA_RECORD;
+
+//
+// /////////////////////////////////////////////////////////////////////////////
+// Section 2
+///////////////////////////////////////////////////////////////////////////////
+//
+// Class definitions
+// Values of 4-127 are reserved for future use by this
+// specification.
+// Values in the range 127-255 are reserved for OEM use.
+//
+#define EFI_COMPUTING_UNIT 0x00000000
+#define EFI_PERIPHERAL 0x01000000
+#define EFI_IO_BUS 0x02000000
+#define EFI_SOFTWARE 0x03000000
+
+//
+// General partitioning scheme for Progress and Error Codes are
+// 0x0000-0x0FFF - Shared by all sub-classes in a given class
+// 0x1000-0x7FFF - Subclass Specific
+// 0x8000-0xFFFF - OEM specific
+//
+#define EFI_SUBCLASS_SPECIFIC 0x1000
+#define EFI_OEM_SPECIFIC 0x8000
+
+//
+// /////////////////////////////////////////////////////////////////////////////
+// Section 3
+///////////////////////////////////////////////////////////////////////////////
+//
+// Computing Unit Subclass definitions.
+// Values of 8-127 are reserved for future use by this
+// specification.
+// Values of 128-255 are reserved for OEM use.
+//
+#define EFI_COMPUTING_UNIT_UNSPECIFIED (EFI_COMPUTING_UNIT | 0x00000000)
+#define EFI_COMPUTING_UNIT_HOST_PROCESSOR (EFI_COMPUTING_UNIT | 0x00010000)
+#define EFI_COMPUTING_UNIT_FIRMWARE_PROCESSOR (EFI_COMPUTING_UNIT | 0x00020000)
+#define EFI_COMPUTING_UNIT_IO_PROCESSOR (EFI_COMPUTING_UNIT | 0x00030000)
+#define EFI_COMPUTING_UNIT_CACHE (EFI_COMPUTING_UNIT | 0x00040000)
+#define EFI_COMPUTING_UNIT_MEMORY (EFI_COMPUTING_UNIT | 0x00050000)
+#define EFI_COMPUTING_UNIT_CHIPSET (EFI_COMPUTING_UNIT | 0x00060000)
+
+//
+// Computing Unit Class Progress Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_CU_PC_INIT_BEGIN 0x00000000
+#define EFI_CU_PC_INIT_END 0x00000001
+
+//
+// Computing Unit Unspecified Subclass Progress Code definitions.
+//
+//
+// Computing Unit Host Processor Subclass Progress Code definitions.
+//
+#define EFI_CU_HP_PC_POWER_ON_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_HP_PC_CACHE_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_HP_PC_RAM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_HP_PC_MEMORY_CONTROLLER_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_CU_HP_PC_IO_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_CU_HP_PC_BSP_SELECT (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_CU_HP_PC_BSP_RESELECT (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_CU_HP_PC_AP_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_CU_HP_PC_SMM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+
+//
+// Computing Unit Firmware Processor Subclass Progress Code definitions.
+//
+//
+// Computing Unit IO Processor Subclass Progress Code definitions.
+//
+//
+// Computing Unit Cache Subclass Progress Code definitions.
+//
+#define EFI_CU_CACHE_PC_PRESENCE_DETECT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_CACHE_PC_CONFIGURATION (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// Computing Unit Memory Subclass Progress Code definitions.
+//
+#define EFI_CU_MEMORY_PC_SPD_READ (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_MEMORY_PC_PRESENCE_DETECT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_MEMORY_PC_TIMING (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_MEMORY_PC_CONFIGURING (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_CU_MEMORY_PC_OPTIMIZING (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_CU_MEMORY_PC_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_CU_MEMORY_PC_TEST (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+
+//
+// Computing Unit Chipset Subclass Progress Code definitions.
+//
+//
+// Computing Unit Class Error Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_CU_EC_NON_SPECIFIC 0x00000000
+#define EFI_CU_EC_DISABLED 0x00000001
+#define EFI_CU_EC_NOT_SUPPORTED 0x00000002
+#define EFI_CU_EC_NOT_DETECTED 0x00000003
+#define EFI_CU_EC_NOT_CONFIGURED 0x00000004
+
+//
+// Computing Unit Unspecified Subclass Error Code definitions.
+//
+//
+// Computing Unit Host Processor Subclass Error Code definitions.
+//
+#define EFI_CU_HP_EC_INVALID_TYPE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_HP_EC_INVALID_SPEED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_HP_EC_MISMATCH (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_HP_EC_TIMER_EXPIRED (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_CU_HP_EC_SELF_TEST (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_CU_HP_EC_INTERNAL (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_CU_HP_EC_THERMAL (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_CU_HP_EC_LOW_VOLTAGE (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_CU_HP_EC_HIGH_VOLTAGE (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_CU_HP_EC_CACHE (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_CU_HP_EC_MICROCODE_UPDATE (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+#define EFI_CU_HP_EC_CORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x0000000B)
+#define EFI_CU_HP_EC_UNCORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x0000000C)
+#define EFI_CU_HP_EC_NO_MICROCODE_UPDATE (EFI_SUBCLASS_SPECIFIC | 0x0000000D)
+
+//
+// Computing Unit Firmware Processor Subclass Error Code definitions.
+//
+#define EFI_CU_FP_EC_HARD_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_FP_EC_SOFT_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_FP_EC_COMM_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+
+//
+// Computing Unit IO Processor Subclass Error Code definitions.
+//
+//
+// Computing Unit Cache Subclass Error Code definitions.
+//
+#define EFI_CU_CACHE_EC_INVALID_TYPE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_CACHE_EC_INVALID_SPEED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_CACHE_EC_INVALID_SIZE (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_CACHE_EC_MISMATCH (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+
+//
+// Computing Unit Memory Subclass Error Code definitions.
+//
+#define EFI_CU_MEMORY_EC_INVALID_TYPE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_MEMORY_EC_INVALID_SPEED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_MEMORY_EC_CORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_MEMORY_EC_UNCORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_CU_MEMORY_EC_SPD_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_CU_MEMORY_EC_INVALID_SIZE (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_CU_MEMORY_EC_MISMATCH (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_CU_MEMORY_EC_S3_RESUME_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_CU_MEMORY_EC_UPDATE_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_CU_MEMORY_EC_NONE_DETECTED (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_CU_MEMORY_EC_NONE_USEFUL (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+
+//
+// Computing Unit Chipset Subclass Error Code definitions.
+//
+
+///////////////////////////////////////////////////////////////////////////////
+// Section 4
+///////////////////////////////////////////////////////////////////////////////
+//
+// Peripheral Subclass definitions.
+// Values of 12-127 are reserved for future use by this
+// specification.
+// Values of 128-255 are reserved for OEM use.
+//
+#define EFI_PERIPHERAL_UNSPECIFIED (EFI_PERIPHERAL | 0x00000000)
+#define EFI_PERIPHERAL_KEYBOARD (EFI_PERIPHERAL | 0x00010000)
+#define EFI_PERIPHERAL_MOUSE (EFI_PERIPHERAL | 0x00020000)
+#define EFI_PERIPHERAL_LOCAL_CONSOLE (EFI_PERIPHERAL | 0x00030000)
+#define EFI_PERIPHERAL_REMOTE_CONSOLE (EFI_PERIPHERAL | 0x00040000)
+#define EFI_PERIPHERAL_SERIAL_PORT (EFI_PERIPHERAL | 0x00050000)
+#define EFI_PERIPHERAL_PARALLEL_PORT (EFI_PERIPHERAL | 0x00060000)
+#define EFI_PERIPHERAL_FIXED_MEDIA (EFI_PERIPHERAL | 0x00070000)
+#define EFI_PERIPHERAL_REMOVABLE_MEDIA (EFI_PERIPHERAL | 0x00080000)
+#define EFI_PERIPHERAL_AUDIO_INPUT (EFI_PERIPHERAL | 0x00090000)
+#define EFI_PERIPHERAL_AUDIO_OUTPUT (EFI_PERIPHERAL | 0x000A0000)
+#define EFI_PERIPHERAL_LCD_DEVICE (EFI_PERIPHERAL | 0x000B0000)
+#define EFI_PERIPHERAL_NETWORK (EFI_PERIPHERAL | 0x000C0000)
+
+//
+// Peripheral Class Progress Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_P_PC_INIT 0x00000000
+#define EFI_P_PC_RESET 0x00000001
+#define EFI_P_PC_DISABLE 0x00000002
+#define EFI_P_PC_PRESENCE_DETECT 0x00000003
+#define EFI_P_PC_ENABLE 0x00000004
+#define EFI_P_PC_RECONFIG 0x00000005
+#define EFI_P_PC_DETECTED 0x00000006
+
+//
+// Peripheral Class Unspecified Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Keyboard Subclass Progress Code definitions.
+//
+#define EFI_P_KEYBOARD_PC_CLEAR_BUFFER (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_P_KEYBOARD_PC_SELF_TEST (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// Peripheral Class Mouse Subclass Progress Code definitions.
+//
+#define EFI_P_MOUSE_PC_SELF_TEST (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+
+//
+// Peripheral Class Local Console Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Remote Console Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Serial Port Subclass Progress Code definitions.
+//
+#define EFI_P_SERIAL_PORT_PC_CLEAR_BUFFER (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+
+//
+// Peripheral Class Parallel Port Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Fixed Media Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Removable Media Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Audio Input Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Audio Output Subclass Progress Code definitions.
+//
+//
+// Peripheral Class LCD Device Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Network Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Error Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_P_EC_NON_SPECIFIC 0x00000000
+#define EFI_P_EC_DISABLED 0x00000001
+#define EFI_P_EC_NOT_SUPPORTED 0x00000002
+#define EFI_P_EC_NOT_DETECTED 0x00000003
+#define EFI_P_EC_NOT_CONFIGURED 0x00000004
+#define EFI_P_EC_INTERFACE_ERROR 0x00000005
+#define EFI_P_EC_CONTROLLER_ERROR 0x00000006
+#define EFI_P_EC_INPUT_ERROR 0x00000007
+#define EFI_P_EC_OUTPUT_ERROR 0x00000008
+#define EFI_P_EC_RESOURCE_CONFLICT 0x00000009
+
+//
+// Peripheral Class Unspecified Subclass Error Code definitions.
+//
+//
+// Peripheral Class Keyboard Subclass Error Code definitions.
+//
+#define EFI_P_KEYBOARD_EC_LOCKED (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_P_KEYBOARD_EC_STUCK_KEY (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// Peripheral Class Mouse Subclass Error Code definitions.
+//
+#define EFI_P_MOUSE_EC_LOCKED (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+
+//
+// Peripheral Class Local Console Subclass Error Code definitions.
+//
+//
+// Peripheral Class Remote Console Subclass Error Code definitions.
+//
+//
+// Peripheral Class Serial Port Subclass Error Code definitions.
+//
+//
+// Peripheral Class Parallel Port Subclass Error Code definitions.
+//
+//
+// Peripheral Class Fixed Media Subclass Error Code definitions.
+//
+//
+// Peripheral Class Removable Media Subclass Error Code definitions.
+//
+//
+// Peripheral Class Audio Input Subclass Error Code definitions.
+//
+//
+// Peripheral Class Audio Output Subclass Error Code definitions.
+//
+//
+// Peripheral Class LCD Device Subclass Error Code definitions.
+//
+//
+// Peripheral Class Network Subclass Error Code definitions.
+//
+
+///////////////////////////////////////////////////////////////////////////////
+// Section 5
+///////////////////////////////////////////////////////////////////////////////
+//
+// IO Bus Subclass definitions.
+// Values of 14-127 are reserved for future use by this
+// specification.
+// Values of 128-255 are reserved for OEM use.
+//
+#define EFI_IO_BUS_UNSPECIFIED (EFI_IO_BUS | 0x00000000)
+#define EFI_IO_BUS_PCI (EFI_IO_BUS | 0x00010000)
+#define EFI_IO_BUS_USB (EFI_IO_BUS | 0x00020000)
+#define EFI_IO_BUS_IBA (EFI_IO_BUS | 0x00030000)
+#define EFI_IO_BUS_AGP (EFI_IO_BUS | 0x00040000)
+#define EFI_IO_BUS_PC_CARD (EFI_IO_BUS | 0x00050000)
+#define EFI_IO_BUS_LPC (EFI_IO_BUS | 0x00060000)
+#define EFI_IO_BUS_SCSI (EFI_IO_BUS | 0x00070000)
+#define EFI_IO_BUS_ATA_ATAPI (EFI_IO_BUS | 0x00080000)
+#define EFI_IO_BUS_FC (EFI_IO_BUS | 0x00090000)
+#define EFI_IO_BUS_IP_NETWORK (EFI_IO_BUS | 0x000A0000)
+#define EFI_IO_BUS_SMBUS (EFI_IO_BUS | 0x000B0000)
+#define EFI_IO_BUS_I2C (EFI_IO_BUS | 0x000C0000)
+
+//
+// IO Bus Class Progress Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_IOB_PC_INIT 0x00000000
+#define EFI_IOB_PC_RESET 0x00000001
+#define EFI_IOB_PC_DISABLE 0x00000002
+#define EFI_IOB_PC_DETECT 0x00000003
+#define EFI_IOB_PC_ENABLE 0x00000004
+#define EFI_IOB_PC_RECONFIG 0x00000005
+#define EFI_IOB_PC_HOTPLUG 0x00000006
+
+//
+// IO Bus Class Unspecified Subclass Progress Code definitions.
+//
+//
+// IO Bus Class PCI Subclass Progress Code definitions.
+//
+#define EFI_IOB_PCI_PC_BUS_ENUM (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_IOB_PCI_PC_RES_ALLOC (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_IOB_PCI_PC_HPC_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+
+//
+// IO Bus Class USB Subclass Progress Code definitions.
+//
+//
+// IO Bus Class IBA Subclass Progress Code definitions.
+//
+//
+// IO Bus Class AGP Subclass Progress Code definitions.
+//
+//
+// IO Bus Class PC Card Subclass Progress Code definitions.
+//
+//
+// IO Bus Class LPC Subclass Progress Code definitions.
+//
+//
+// IO Bus Class SCSI Subclass Progress Code definitions.
+//
+//
+// IO Bus Class ATA/ATAPI Subclass Progress Code definitions.
+//
+#define EFI_IOB_ATA_BUS_SMART_ENABLE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_IOB_ATA_BUS_SMART_DISABLE (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+
+//
+// IO Bus Class FC Subclass Progress Code definitions.
+//
+//
+// IO Bus Class IP Network Subclass Progress Code definitions.
+//
+//
+// IO Bus Class SMBUS Subclass Progress Code definitions.
+//
+//
+// IO Bus Class I2C Subclass Progress Code definitions.
+//
+//
+// IO Bus Class Error Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_IOB_EC_NON_SPECIFIC 0x00000000
+#define EFI_IOB_EC_DISABLED 0x00000001
+#define EFI_IOB_EC_NOT_SUPPORTED 0x00000002
+#define EFI_IOB_EC_NOT_DETECTED 0x00000003
+#define EFI_IOB_EC_NOT_CONFIGURED 0x00000004
+#define EFI_IOB_EC_INTERFACE_ERROR 0x00000005
+#define EFI_IOB_EC_CONTROLLER_ERROR 0x00000006
+#define EFI_IOB_EC_READ_ERROR 0x00000007
+#define EFI_IOB_EC_WRITE_ERROR 0x00000008
+#define EFI_IOB_EC_RESOURCE_CONFLICT 0x00000009
+
+//
+// IO Bus Class Unspecified Subclass Error Code definitions.
+//
+//
+// IO Bus Class PCI Subclass Error Code definitions.
+//
+#define EFI_IOB_PCI_EC_PERR (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_IOB_PCI_EC_SERR (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// IO Bus Class USB Subclass Error Code definitions.
+//
+//
+// IO Bus Class IBA Subclass Error Code definitions.
+//
+//
+// IO Bus Class AGP Subclass Error Code definitions.
+//
+//
+// IO Bus Class PC Card Subclass Error Code definitions.
+//
+//
+// IO Bus Class LPC Subclass Error Code definitions.
+//
+//
+// IO Bus Class SCSI Subclass Error Code definitions.
+//
+//
+// IO Bus Class ATA/ATAPI Subclass Error Code definitions.
+//
+#define EFI_IOB_ATA_BUS_SMART_NOTSUPPORTED (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_IOB_ATA_BUS_SMART_DISABLED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// IO Bus Class FC Subclass Error Code definitions.
+//
+//
+// IO Bus Class IP Network Subclass Error Code definitions.
+//
+//
+// IO Bus Class SMBUS Subclass Error Code definitions.
+//
+//
+// IO Bus Class I2C Subclass Error Code definitions.
+//
+
+///////////////////////////////////////////////////////////////////////////////
+// Section 6
+///////////////////////////////////////////////////////////////////////////////
+//
+// Software Subclass definitions.
+// Values of 14-127 are reserved for future use by this
+// specification.
+// Values of 128-255 are reserved for OEM use.
+//
+#define EFI_SOFTWARE_UNSPECIFIED (EFI_SOFTWARE | 0x00000000)
+#define EFI_SOFTWARE_SEC (EFI_SOFTWARE | 0x00010000)
+#define EFI_SOFTWARE_PEI_CORE (EFI_SOFTWARE | 0x00020000)
+#define EFI_SOFTWARE_PEI_MODULE (EFI_SOFTWARE | 0x00030000)
+#define EFI_SOFTWARE_DXE_CORE (EFI_SOFTWARE | 0x00040000)
+#define EFI_SOFTWARE_DXE_BS_DRIVER (EFI_SOFTWARE | 0x00050000)
+#define EFI_SOFTWARE_DXE_RT_DRIVER (EFI_SOFTWARE | 0x00060000)
+#define EFI_SOFTWARE_SMM_DRIVER (EFI_SOFTWARE | 0x00070000)
+#define EFI_SOFTWARE_EFI_APPLICATION (EFI_SOFTWARE | 0x00080000)
+#define EFI_SOFTWARE_EFI_OS_LOADER (EFI_SOFTWARE | 0x00090000)
+#define EFI_SOFTWARE_RT (EFI_SOFTWARE | 0x000A0000)
+#define EFI_SOFTWARE_AL (EFI_SOFTWARE | 0x000B0000)
+#define EFI_SOFTWARE_EBC_EXCEPTION (EFI_SOFTWARE | 0x000C0000)
+#define EFI_SOFTWARE_IA32_EXCEPTION (EFI_SOFTWARE | 0x000D0000)
+#define EFI_SOFTWARE_IPF_EXCEPTION (EFI_SOFTWARE | 0x000E0000)
+#define EFI_SOFTWARE_PEI_SERVICE (EFI_SOFTWARE | 0x000F0000)
+#define EFI_SOFTWARE_EFI_BOOT_SERVICE (EFI_SOFTWARE | 0x00100000)
+#define EFI_SOFTWARE_EFI_RUNTIME_SERVICE (EFI_SOFTWARE | 0x00110000)
+#define EFI_SOFTWARE_EFI_DXE_SERVICE (EFI_SOFTWARE | 0x00120000)
+#define EFI_SOFTWARE_X64_EXCEPTION (EFI_SOFTWARE | 0x00130000)
+
+//
+// Software Class Progress Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_SW_PC_INIT 0x00000000
+#define EFI_SW_PC_LOAD 0x00000001
+#define EFI_SW_PC_INIT_BEGIN 0x00000002
+#define EFI_SW_PC_INIT_END 0x00000003
+#define EFI_SW_PC_AUTHENTICATE_BEGIN 0x00000004
+#define EFI_SW_PC_AUTHENTICATE_END 0x00000005
+#define EFI_SW_PC_INPUT_WAIT 0x00000006
+#define EFI_SW_PC_USER_SETUP 0x00000007
+
+//
+// Software Class Unspecified Subclass Progress Code definitions.
+//
+//
+// Software Class SEC Subclass Progress Code definitions.
+//
+#define EFI_SW_SEC_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_SEC_PC_HANDOFF_TO_NEXT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// Software Class PEI Core Subclass Progress Code definitions.
+//
+#define EFI_SW_PEI_CORE_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_PEI_CORE_PC_HANDOFF_TO_NEXT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_PEI_CORE_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+
+//
+// Software Class PEI Module Subclass Progress Code definitions.
+//
+#define EFI_SW_PEIM_PC_RECOVERY_BEGIN (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_PEIM_PC_CAPSULE_LOAD (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_PEIM_PC_CAPSULE_START (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_PEIM_PC_RECOVERY_USER (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_PEIM_PC_RECOVERY_AUTO (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+
+//
+// Software Class DXE Core Subclass Progress Code definitions.
+//
+#define EFI_SW_DXE_CORE_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_DXE_CORE_PC_HANDOFF_TO_NEXT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_DXE_CORE_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_DXE_CORE_PC_START_DRIVER (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+
+//
+// Software Class DXE BS Driver Subclass Progress Code definitions.
+//
+#define EFI_SW_DXE_BS_PC_LEGACY_OPROM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_DXE_BS_PC_READY_TO_BOOT_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_DXE_BS_PC_LEGACY_BOOT_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_DXE_BS_PC_EXIT_BOOT_SERVICES_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_DXE_BS_PC_VIRTUAL_ADDRESS_CHANGE_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_DXE_BS_PC_BEGIN_CONNECTING_DRIVERS (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_DXE_BS_PC_VERIFYING_PASSWORD (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+
+//
+// Software Class DXE RT Driver Subclass Progress Code definitions.
+//
+#define EFI_SW_DXE_RT_PC_S0 (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_DXE_RT_PC_S1 (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_DXE_RT_PC_S2 (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_DXE_RT_PC_S3 (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_DXE_RT_PC_S4 (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_DXE_RT_PC_S5 (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+
+//
+// Software Class SMM Driver Subclass Progress Code definitions.
+//
+//
+// Software Class EFI Application Subclass Progress Code definitions.
+//
+//
+// Software Class EFI OS Loader Subclass Progress Code definitions.
+//
+//
+// Software Class EFI RT Subclass Progress Code definitions.
+//
+#define EFI_SW_RT_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_RT_PC_HANDOFF_TO_NEXT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_RT_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+
+//
+// Software Class EFI AL Subclass Progress Code definitions.
+//
+#define EFI_SW_AL_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_AL_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// Software Class EBC Exception Subclass Progress Code definitions.
+//
+//
+// Software Class IA32 Exception Subclass Progress Code definitions.
+//
+//
+// Software Class X64 Exception Subclass Progress Code definitions.
+//
+//
+// Software Class IPF Exception Subclass Progress Code definitions.
+//
+//
+// Software Class PEI Services Subclass Progress Code definitions.
+//
+#define EFI_SW_PS_PC_INSTALL_PPI (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_PS_PC_REINSTALL_PPI (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_PS_PC_LOCATE_PPI (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_PS_PC_NOTIFY_PPI (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_PS_PC_GET_BOOT_MODE (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_PS_PC_SET_BOOT_MODE (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_PS_PC_GET_HOB_LIST (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_SW_PS_PC_CREATE_HOB (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_SW_PS_PC_FFS_FIND_NEXT_VOLUME (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_SW_PS_PC_FFS_FIND_NEXT_FILE (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_SW_PS_PC_FFS_FIND_SECTION_DATA (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+#define EFI_SW_PS_PC_INSTALL_PEI_MEMORY (EFI_SUBCLASS_SPECIFIC | 0x0000000B)
+#define EFI_SW_PS_PC_ALLOCATE_PAGES (EFI_SUBCLASS_SPECIFIC | 0x0000000C)
+#define EFI_SW_PS_PC_ALLOCATE_POOL (EFI_SUBCLASS_SPECIFIC | 0x0000000D)
+#define EFI_SW_PS_PC_COPY_MEM (EFI_SUBCLASS_SPECIFIC | 0x0000000E)
+#define EFI_SW_PS_PC_SET_MEM (EFI_SUBCLASS_SPECIFIC | 0x0000000F)
+
+//
+// Software Class EFI Boot Services Subclass Progress Code definitions.
+//
+#define EFI_SW_BS_PC_RAISE_TPL (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_BS_PC_RESTORE_TPL (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_BS_PC_ALLOCATE_PAGES (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_BS_PC_FREE_PAGES (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_BS_PC_GET_MEMORY_MAP (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_BS_PC_ALLOCATE_POOL (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_BS_PC_FREE_POOL (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_SW_BS_PC_CREATE_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_SW_BS_PC_SET_TIMER (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_SW_BS_PC_WAIT_FOR_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_SW_BS_PC_SIGNAL_EVENT (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+#define EFI_SW_BS_PC_CLOSE_EVENT (EFI_SUBCLASS_SPECIFIC | 0x0000000B)
+#define EFI_SW_BS_PC_CHECK_EVENT (EFI_SUBCLASS_SPECIFIC | 0x0000000C)
+#define EFI_SW_BS_PC_INSTALL_PROTOCOL_INTERFACE (EFI_SUBCLASS_SPECIFIC | 0x0000000D)
+#define EFI_SW_BS_PC_REINSTALL_PROTOCOL_INTERFACE (EFI_SUBCLASS_SPECIFIC | 0x0000000E)
+#define EFI_SW_BS_PC_UNINSTALL_PROTOCOL_INTERFACE (EFI_SUBCLASS_SPECIFIC | 0x0000000F)
+#define EFI_SW_BS_PC_HANDLE_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x00000010)
+#define EFI_SW_BS_PC_PC_HANDLE_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x00000011)
+#define EFI_SW_BS_PC_REGISTER_PROTOCOL_NOTIFY (EFI_SUBCLASS_SPECIFIC | 0x00000012)
+#define EFI_SW_BS_PC_LOCATE_HANDLE (EFI_SUBCLASS_SPECIFIC | 0x00000013)
+#define EFI_SW_BS_PC_INSTALL_CONFIGURATION_TABLE (EFI_SUBCLASS_SPECIFIC | 0x00000014)
+#define EFI_SW_BS_PC_LOAD_IMAGE (EFI_SUBCLASS_SPECIFIC | 0x00000015)
+#define EFI_SW_BS_PC_START_IMAGE (EFI_SUBCLASS_SPECIFIC | 0x00000016)
+#define EFI_SW_BS_PC_EXIT (EFI_SUBCLASS_SPECIFIC | 0x00000017)
+#define EFI_SW_BS_PC_UNLOAD_IMAGE (EFI_SUBCLASS_SPECIFIC | 0x00000018)
+#define EFI_SW_BS_PC_EXIT_BOOT_SERVICES (EFI_SUBCLASS_SPECIFIC | 0x00000019)
+#define EFI_SW_BS_PC_GET_NEXT_MONOTONIC_COUNT (EFI_SUBCLASS_SPECIFIC | 0x0000001A)
+#define EFI_SW_BS_PC_STALL (EFI_SUBCLASS_SPECIFIC | 0x0000001B)
+#define EFI_SW_BS_PC_SET_WATCHDOG_TIMER (EFI_SUBCLASS_SPECIFIC | 0x0000001C)
+#define EFI_SW_BS_PC_CONNECT_CONTROLLER (EFI_SUBCLASS_SPECIFIC | 0x0000001D)
+#define EFI_SW_BS_PC_DISCONNECT_CONTROLLER (EFI_SUBCLASS_SPECIFIC | 0x0000001E)
+#define EFI_SW_BS_PC_OPEN_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x0000001F)
+#define EFI_SW_BS_PC_CLOSE_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x00000020)
+#define EFI_SW_BS_PC_OPEN_PROTOCOL_INFORMATION (EFI_SUBCLASS_SPECIFIC | 0x00000021)
+#define EFI_SW_BS_PC_PROTOCOLS_PER_HANDLE (EFI_SUBCLASS_SPECIFIC | 0x00000022)
+#define EFI_SW_BS_PC_LOCATE_HANDLE_BUFFER (EFI_SUBCLASS_SPECIFIC | 0x00000023)
+#define EFI_SW_BS_PC_LOCATE_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x00000024)
+#define EFI_SW_BS_PC_INSTALL_MULTIPLE_INTERFACES (EFI_SUBCLASS_SPECIFIC | 0x00000025)
+#define EFI_SW_BS_PC_UNINSTALL_MULTIPLE_INTERFACES (EFI_SUBCLASS_SPECIFIC | 0x00000026)
+#define EFI_SW_BS_PC_CALCULATE_CRC_32 (EFI_SUBCLASS_SPECIFIC | 0x00000027)
+#define EFI_SW_BS_PC_COPY_MEM (EFI_SUBCLASS_SPECIFIC | 0x00000028)
+#define EFI_SW_BS_PC_SET_MEM (EFI_SUBCLASS_SPECIFIC | 0x00000029)
+
+//
+// Software Class EFI Runtime Services Subclass Progress Code definitions.
+//
+#define EFI_SW_RS_PC_GET_TIME (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_RS_PC_SET_TIME (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_RS_PC_GET_WAKEUP_TIME (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_RS_PC_SET_WAKEUP_TIME (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_RS_PC_SET_VIRTUAL_ADDRESS_MAP (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_RS_PC_CONVERT_POINTER (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_RS_PC_GET_VARIABLE (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_SW_RS_PC_GET_NEXT_VARIABLE_NAME (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_SW_RS_PC_SET_VARIABLE (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_SW_RS_PC_GET_NEXT_HIGH_MONOTONIC_COUNT (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_SW_RS_PC_RESET_SYSTEM (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+
+//
+// Software Class EFI DXE Services Subclass Progress Code definitions
+//
+#define EFI_SW_DS_PC_ADD_MEMORY_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_DS_PC_ALLOCATE_MEMORY_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_DS_PC_FREE_MEMORY_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_DS_PC_REMOVE_MEMORY_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_DS_PC_GET_MEMORY_SPACE_DESCRIPTOR (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_DS_PC_SET_MEMORY_SPACE_ATTRIBUTES (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_DS_PC_GET_MEMORY_SPACE_MAP (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_SW_DS_PC_ADD_IO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_SW_DS_PC_ALLOCATE_IO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_SW_DS_PC_FREE_IO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_SW_DS_PC_REMOVE_IO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+#define EFI_SW_DS_PC_GET_IO_SPACE_DESCRIPTOR (EFI_SUBCLASS_SPECIFIC | 0x0000000B)
+#define EFI_SW_DS_PC_GET_IO_SPACE_MAP (EFI_SUBCLASS_SPECIFIC | 0x0000000C)
+#define EFI_SW_DS_PC_DISPATCH (EFI_SUBCLASS_SPECIFIC | 0x0000000D)
+#define EFI_SW_DS_PC_SCHEDULE (EFI_SUBCLASS_SPECIFIC | 0x0000000E)
+#define EFI_SW_DS_PC_TRUST (EFI_SUBCLASS_SPECIFIC | 0x0000000F)
+#define EFI_SW_DS_PC_PROCESS_FIRMWARE_VOLUME (EFI_SUBCLASS_SPECIFIC | 0x00000010)
+
+//
+// Software Class Error Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_SW_EC_NON_SPECIFIC 0x00000000
+#define EFI_SW_EC_LOAD_ERROR 0x00000001
+#define EFI_SW_EC_INVALID_PARAMETER 0x00000002
+#define EFI_SW_EC_UNSUPPORTED 0x00000003
+#define EFI_SW_EC_INVALID_BUFFER 0x00000004
+#define EFI_SW_EC_OUT_OF_RESOURCES 0x00000005
+#define EFI_SW_EC_ABORTED 0x00000006
+#define EFI_SW_EC_ILLEGAL_SOFTWARE_STATE 0x00000007
+#define EFI_SW_EC_ILLEGAL_HARDWARE_STATE 0x00000008
+#define EFI_SW_EC_START_ERROR 0x00000009
+#define EFI_SW_EC_BAD_DATE_TIME 0x0000000A
+#define EFI_SW_EC_CFG_INVALID 0x0000000B
+#define EFI_SW_EC_CFG_CLR_REQUEST 0x0000000C
+#define EFI_SW_EC_CFG_DEFAULT 0x0000000D
+#define EFI_SW_EC_PWD_INVALID 0x0000000E
+#define EFI_SW_EC_PWD_CLR_REQUEST 0x0000000F
+#define EFI_SW_EC_PWD_CLEARED 0x00000010
+#define EFI_SW_EC_EVENT_LOG_FULL 0x00000011
+
+//
+// Software Class Unspecified Subclass Error Code definitions.
+//
+//
+// Software Class SEC Subclass Error Code definitions.
+//
+//
+// Software Class PEI Core Subclass Error Code definitions.
+//
+#define EFI_SW_PEI_CORE_EC_DXE_CORRUPT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+
+//
+// Software Class PEI Module Subclass Error Code definitions.
+//
+#define EFI_SW_PEIM_EC_NO_RECOVERY_CAPSULE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_PEIM_EC_INVALID_CAPSULE_DESCRIPTOR (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// Software Class DXE Core Subclass Error Code definitions.
+//
+#define EFI_SW_CSM_LEGACY_ROM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+//
+// Software Class DXE Boot Service Driver Subclass Error Code definitions.
+//
+#define EFI_SW_DXE_BS_EC_LEGACY_OPROM_NO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+
+//
+// Software Class DXE Runtime Service Driver Subclass Error Code definitions.
+//
+//
+// Software Class SMM Driver Subclass Error Code definitions.
+//
+//
+// Software Class EFI Application Subclass Error Code definitions.
+//
+//
+// Software Class EFI OS Loader Subclass Error Code definitions.
+//
+//
+// Software Class EFI RT Subclass Error Code definitions.
+//
+//
+// Software Class EFI AL Subclass Error Code definitions.
+//
+//
+// Software Class EBC Exception Subclass Error Code definitions.
+// These exceptions are derived from the debug protocol definitions in the EFI
+// specification.
+//
+#define EFI_SW_EC_EBC_UNDEFINED (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_UNDEFINED)
+#define EFI_SW_EC_EBC_DIVIDE_ERROR (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_DIVIDE_ERROR)
+#define EFI_SW_EC_EBC_DEBUG (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_DEBUG)
+#define EFI_SW_EC_EBC_BREAKPOINT (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_BREAKPOINT)
+#define EFI_SW_EC_EBC_OVERFLOW (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_OVERFLOW)
+#define EFI_SW_EC_EBC_INVALID_OPCODE (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_INVALID_OPCODE)
+#define EFI_SW_EC_EBC_STACK_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_STACK_FAULT)
+#define EFI_SW_EC_EBC_ALIGNMENT_CHECK (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_ALIGNMENT_CHECK)
+#define EFI_SW_EC_EBC_INSTRUCTION_ENCODING (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_INSTRUCTION_ENCODING)
+#define EFI_SW_EC_EBC_BAD_BREAK (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_BAD_BREAK)
+#define EFI_SW_EC_EBC_STEP (EFI_SUBCLASS_SPECIFIC | EXCEPT_EBC_STEP)
+
+//
+// Software Class IA32 Exception Subclass Error Code definitions.
+// These exceptions are derived from the debug protocol definitions in the EFI
+// specification.
+//
+#define EFI_SW_EC_IA32_DIVIDE_ERROR (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_DIVIDE_ERROR)
+#define EFI_SW_EC_IA32_DEBUG (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_DEBUG)
+#define EFI_SW_EC_IA32_NMI (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_NMI)
+#define EFI_SW_EC_IA32_BREAKPOINT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_BREAKPOINT)
+#define EFI_SW_EC_IA32_OVERFLOW (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_OVERFLOW)
+#define EFI_SW_EC_IA32_BOUND (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_BOUND)
+#define EFI_SW_EC_IA32_INVALID_OPCODE (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_INVALID_OPCODE)
+#define EFI_SW_EC_IA32_DOUBLE_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_DOUBLE_FAULT)
+#define EFI_SW_EC_IA32_INVALID_TSS (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_INVALID_TSS)
+#define EFI_SW_EC_IA32_SEG_NOT_PRESENT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_SEG_NOT_PRESENT)
+#define EFI_SW_EC_IA32_STACK_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_STACK_FAULT)
+#define EFI_SW_EC_IA32_GP_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_GP_FAULT)
+#define EFI_SW_EC_IA32_PAGE_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_PAGE_FAULT)
+#define EFI_SW_EC_IA32_FP_ERROR (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_FP_ERROR)
+#define EFI_SW_EC_IA32_ALIGNMENT_CHECK (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_ALIGNMENT_CHECK)
+#define EFI_SW_EC_IA32_MACHINE_CHECK (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_MACHINE_CHECK)
+#define EFI_SW_EC_IA32_SIMD (EFI_SUBCLASS_SPECIFIC | EXCEPT_IA32_SIMD)
+
+//
+// Software Class X64 Exception Subclass Error Code definitions.
+// These exceptions are derived from the debug protocol definitions in the EFI
+// specification.
+//
+#define EFI_SW_EC_X64_DIVIDE_ERROR (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_DIVIDE_ERROR)
+#define EFI_SW_EC_X64_DEBUG (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_DEBUG)
+#define EFI_SW_EC_X64_NMI (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_NMI)
+#define EFI_SW_EC_X64_BREAKPOINT (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_BREAKPOINT)
+#define EFI_SW_EC_X64_OVERFLOW (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_OVERFLOW)
+#define EFI_SW_EC_X64_BOUND (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_BOUND)
+#define EFI_SW_EC_X64_INVALID_OPCODE (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_INVALID_OPCODE)
+#define EFI_SW_EC_X64_DOUBLE_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_DOUBLE_FAULT)
+#define EFI_SW_EC_X64_INVALID_TSS (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_INVALID_TSS)
+#define EFI_SW_EC_X64_SEG_NOT_PRESENT (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_SEG_NOT_PRESENT)
+#define EFI_SW_EC_X64_STACK_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_STACK_FAULT)
+#define EFI_SW_EC_X64_GP_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_GP_FAULT)
+#define EFI_SW_EC_X64_PAGE_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_PAGE_FAULT)
+#define EFI_SW_EC_X64_FP_ERROR (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_FP_ERROR)
+#define EFI_SW_EC_X64_ALIGNMENT_CHECK (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_ALIGNMENT_CHECK)
+#define EFI_SW_EC_X64_MACHINE_CHECK (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_MACHINE_CHECK)
+#define EFI_SW_EC_X64_SIMD (EFI_SUBCLASS_SPECIFIC | EXCEPT_X64_SIMD)
+
+//
+// Software Class IPF Exception Subclass Error Code definitions.
+// These exceptions are derived from the debug protocol definitions in the EFI
+// specification.
+//
+#define EFI_SW_EC_IPF_ALT_DTLB (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_ALT_DTLB)
+#define EFI_SW_EC_IPF_DNESTED_TLB (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_DNESTED_TLB)
+#define EFI_SW_EC_IPF_BREAKPOINT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_BREAKPOINT)
+#define EFI_SW_EC_IPF_EXTERNAL_INTERRUPT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_EXTERNAL_INTERRUPT)
+#define EFI_SW_EC_IPF_GEN_EXCEPT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_GEN_EXCEPT)
+#define EFI_SW_EC_IPF_NAT_CONSUMPTION (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_NAT_CONSUMPTION)
+#define EFI_SW_EC_IPF_DEBUG_EXCEPT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_DEBUG_EXCEPT)
+#define EFI_SW_EC_IPF_UNALIGNED_ACCESS (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_UNALIGNED_ACCESS)
+#define EFI_SW_EC_IPF_FP_FAULT (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_FP_FAULT)
+#define EFI_SW_EC_IPF_FP_TRAP (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_FP_TRAP)
+#define EFI_SW_EC_IPF_TAKEN_BRANCH (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_TAKEN_BRANCH)
+#define EFI_SW_EC_IPF_SINGLE_STEP (EFI_SUBCLASS_SPECIFIC | EXCEPT_IPF_SINGLE_STEP)
+
+
+//
+// Software Class PEI Service Subclass Error Code definitions.
+//
+//
+// Software Class EFI Boot Service Subclass Error Code definitions.
+//
+//
+// Software Class EFI Runtime Service Subclass Error Code definitions.
+//
+//
+// Software Class EFI DXE Service Subclass Error Code definitions.
+//
+
+///////////////////////////////////////////////////////////////////////////////
+// Section 7
+///////////////////////////////////////////////////////////////////////////////
+//
+// Debug Code definitions for all classes and subclass
+// Only one debug code is defined at this point and should
+// be used for anything that gets sent to debug stream.
+//
+#define EFI_DC_UNSPECIFIED 0x0
+
+#endif
diff --git a/IntelFrameworkPkg/Include/Framework/FrameworkStatusCodeDataTypeId.h b/IntelFrameworkPkg/Include/Framework/FrameworkStatusCodeDataTypeId.h new file mode 100644 index 0000000000..92c222a9de --- /dev/null +++ b/IntelFrameworkPkg/Include/Framework/FrameworkStatusCodeDataTypeId.h @@ -0,0 +1,433 @@ +/** @file
+ This file defines the data structures to support Status Code Data.
+
+ Copyright (c) 2007, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkStatusCodeDataTypeId.h
+
+ @par Revision Reference:
+ These definitions are from Framework of EFI Status Code Spec
+ Version 0.92.
+
+**/
+
+#ifndef __FRAMEWORK_STATUS_CODE_DATA_TYPE_ID_H__
+#define __FRAMEWORK_STATUS_CODE_DATA_TYPE_ID_H__
+
+#include <Common/DataHubRecords.h>
+#include <Protocol/DebugSupport.h>
+
+///
+/// The size of string
+///
+#define EFI_STATUS_CODE_DATA_MAX_STRING_SIZE 150
+
+///
+/// This is the max data size including all the headers which can be passed
+/// as Status Code data. This data should be multiple of 8 byte
+/// to avoid any kind of boundary issue. Also, sum of this data size (inclusive
+/// of size of EFI_STATUS_CODE_DATA should not exceed the max record size of
+/// data hub
+///
+#define EFI_STATUS_CODE_DATA_MAX_SIZE 200
+
+#pragma pack(1)
+typedef enum {
+ EfiStringAscii,
+ EfiStringUnicode,
+ EfiStringToken
+} EFI_STRING_TYPE;
+
+typedef struct {
+ EFI_HII_HANDLE Handle;
+ STRING_REF Token;
+} EFI_STATUS_CODE_STRING_TOKEN;
+
+typedef union {
+ CHAR8 *Ascii;
+ CHAR16 *Unicode;
+ EFI_STATUS_CODE_STRING_TOKEN Hii;
+} EFI_STATUS_CODE_STRING;
+
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_STRING_TYPE StringType;
+ EFI_STATUS_CODE_STRING String;
+} EFI_STATUS_CODE_STRING_DATA;
+
+#pragma pack()
+
+#pragma pack(1)
+
+typedef struct {
+ UINT32 ErrorLevel;
+ //
+ // 12 * sizeof (UINT64) Var Arg stack
+ //
+ // ascii DEBUG () Format string
+ //
+} EFI_DEBUG_INFO;
+
+#pragma pack()
+
+//
+// declaration for EFI_EXP_DATA. This may change
+//
+// typedef UINTN EFI_EXP_DATA;
+
+///
+/// Voltage Extended Error Data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_EXP_BASE10_DATA Voltage;
+ EFI_EXP_BASE10_DATA Threshold;
+} EFI_COMPUTING_UNIT_VOLTAGE_ERROR_DATA;
+
+typedef struct {
+ EFI_EXP_BASE10_DATA Voltage;
+ EFI_EXP_BASE10_DATA Threshold;
+} EFI_COMPUTING_UNIT_VOLTAGE_ERROR_DATA_PAYLOAD;
+
+///
+/// Microcode Update Extended Error Data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ UINT32 Version;
+} EFI_COMPUTING_UNIT_MICROCODE_UPDATE_ERROR_DATA;
+
+typedef struct {
+ UINT32 Version;
+} EFI_COMPUTING_UNIT_MICROCODE_UPDATE_ERROR_DATA_PAYLOAD;
+
+///
+/// Asynchronous Timer Extended Error Data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_EXP_BASE10_DATA TimerLimit;
+} EFI_COMPUTING_UNIT_TIMER_EXPIRED_ERROR_DATA;
+
+typedef struct {
+ EFI_EXP_BASE10_DATA TimerLimit;
+} EFI_COMPUTING_UNIT_TIMER_EXPIRED_ERROR_DATA_PAYLOAD;
+
+///
+/// Host Processor Mismatch Extended Error Data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ UINT32 Instance;
+ UINT16 Attributes;
+} EFI_HOST_PROCESSOR_MISMATCH_ERROR_DATA;
+
+typedef struct {
+ UINT32 Instance;
+ UINT16 Attributes;
+} EFI_HOST_PROCESSOR_MISMATCH_ERROR_DATA_PAYLOAD;
+
+//
+// EFI_COMPUTING_UNIT_MISMATCH_ATTRIBUTES
+// All other attributes are reserved for future use and
+// must be initialized to 0.
+//
+#define EFI_COMPUTING_UNIT_MISMATCH_SPEED 0x0001
+#define EFI_COMPUTING_UNIT_MISMATCH_FSB_SPEED 0x0002
+#define EFI_COMPUTING_UNIT_MISMATCH_FAMILY 0x0004
+#define EFI_COMPUTING_UNIT_MISMATCH_MODEL 0x0008
+#define EFI_COMPUTING_UNIT_MISMATCH_STEPPING 0x0010
+#define EFI_COMPUTING_UNIT_MISMATCH_CACHE_SIZE 0x0020
+#define EFI_COMPUTING_UNIT_MISMATCH_OEM1 0x1000
+#define EFI_COMPUTING_UNIT_MISMATCH_OEM2 0x2000
+#define EFI_COMPUTING_UNIT_MISMATCH_OEM3 0x4000
+#define EFI_COMPUTING_UNIT_MISMATCH_OEM4 0x8000
+
+///
+/// Thermal Extended Error Data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_EXP_BASE10_DATA Temperature;
+ EFI_EXP_BASE10_DATA Threshold;
+} EFI_COMPUTING_UNIT_THERMAL_ERROR_DATA;
+
+typedef struct {
+ EFI_EXP_BASE10_DATA Temperature;
+ EFI_EXP_BASE10_DATA Threshold;
+} EFI_COMPUTING_UNIT_THERMAL_ERROR_DATA_PAYLOAD;
+
+///
+/// Processor Disabled Extended Error Data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ UINT32 Cause;
+ BOOLEAN SoftwareDisabled;
+} EFI_COMPUTING_UNIT_CPU_DISABLED_ERROR_DATA;
+
+typedef struct {
+ UINT32 Cause;
+ BOOLEAN SoftwareDisabled;
+} EFI_COMPUTING_UNIT_CPU_DISABLED_ERROR_DATA_PAYLOAD;
+
+typedef enum {
+ EfiInitCacheDataOnly,
+ EfiInitCacheInstrOnly,
+ EfiInitCacheBoth,
+ EfiInitCacheUnspecified
+} EFI_INIT_CACHE_TYPE;
+
+///
+/// Embedded cache init extended data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ UINT32 Level;
+ EFI_INIT_CACHE_TYPE Type;
+} EFI_CACHE_INIT_DATA;
+
+typedef struct {
+ UINT32 Level;
+ EFI_INIT_CACHE_TYPE Type;
+} EFI_CACHE_INIT_DATA_PAYLOAD;
+
+//
+// Memory Extended Error Data
+//
+
+///
+/// Memory Error Granularity Definition
+///
+typedef UINT8 EFI_MEMORY_ERROR_GRANULARITY;
+
+///
+/// Memory Error Operation Definition
+///
+typedef UINT8 EFI_MEMORY_ERROR_OPERATION;
+
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_MEMORY_ERROR_GRANULARITY Granularity;
+ EFI_MEMORY_ERROR_OPERATION Operation;
+ UINTN Syndrome;
+ EFI_PHYSICAL_ADDRESS Address;
+ UINTN Resolution;
+} EFI_MEMORY_EXTENDED_ERROR_DATA;
+
+typedef struct {
+ EFI_MEMORY_ERROR_GRANULARITY Granularity;
+ EFI_MEMORY_ERROR_OPERATION Operation;
+ UINTN Syndrome;
+ EFI_PHYSICAL_ADDRESS Address;
+ UINTN Resolution;
+} EFI_MEMORY_EXTENDED_ERROR_DATA_PAYLOAD;
+
+//
+// Memory Error Granularities
+//
+#define EFI_MEMORY_ERROR_OTHER 0x01
+#define EFI_MEMORY_ERROR_UNKNOWN 0x02
+#define EFI_MEMORY_ERROR_DEVICE 0x03
+#define EFI_MEMORY_ERROR_PARTITION 0x04
+
+//
+// Memory Error Operations
+//
+#define EFI_MEMORY_OPERATION_OTHER 0x01
+#define EFI_MEMORY_OPERATION_UNKNOWN 0x02
+#define EFI_MEMORY_OPERATION_READ 0x03
+#define EFI_MEMORY_OPERATION_WRITE 0x04
+#define EFI_MEMORY_OPERATION_PARTIAL_WRITE 0x05
+
+//
+// Define shorthands to describe Group Operations
+// Many memory init operations are essentially group
+// operations.
+
+/// A shorthand to describe that the operation is performed
+/// on multiple devices within the array
+///
+#define EFI_MULTIPLE_MEMORY_DEVICE_OPERATION 0xfffe
+///
+/// A shorthand to describe that the operation is performed on all devices within the array
+///
+#define EFI_ALL_MEMORY_DEVICE_OPERATION 0xffff
+///
+/// A shorthand to describe that the operation is performed on multiple arrays
+///
+#define EFI_MULTIPLE_MEMORY_ARRAY_OPERATION 0xfffe
+///
+/// A shorthand to describe that the operation is performed on all the arrays
+///
+#define EFI_ALL_MEMORY_ARRAY_OPERATION 0xffff
+
+//
+// DIMM number
+//
+#pragma pack(1)
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ UINT16 Array;
+ UINT16 Device;
+} EFI_STATUS_CODE_DIMM_NUMBER;
+
+typedef struct {
+ UINT16 Array;
+ UINT16 Device;
+} EFI_STATUS_CODE_DIMM_NUMBER_PAYLOAD;
+#pragma pack()
+
+///
+/// Memory Module Mismatch Extended Error Data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_STATUS_CODE_DIMM_NUMBER Instance;
+} EFI_MEMORY_MODULE_MISMATCH_ERROR_DATA;
+
+typedef struct {
+ EFI_STATUS_CODE_DIMM_NUMBER Instance;
+} EFI_MEMORY_MODULE_MISMATCH_ERROR_DATA_PAYLOAD;
+
+///
+/// Memory Range Extended Data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_PHYSICAL_ADDRESS Start;
+ EFI_PHYSICAL_ADDRESS Length;
+} EFI_MEMORY_RANGE_EXTENDED_DATA;
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS Start;
+ EFI_PHYSICAL_ADDRESS Length;
+} EFI_MEMORY_RANGE_EXTENDED_DATA_PAYLOAD;
+
+///
+/// Device handle Extended Data. Used for many
+/// errors and progress codes to point to the device.
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_HANDLE Handle;
+} EFI_DEVICE_HANDLE_EXTENDED_DATA;
+
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ UINT8 *DevicePath;
+} EFI_DEVICE_PATH_EXTENDED_DATA;
+
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_HANDLE ControllerHandle;
+ EFI_HANDLE DriverBindingHandle;
+ UINT16 DevicePathSize;
+ UINT8 *RemainingDevicePath;
+} EFI_STATUS_CODE_START_EXTENDED_DATA;
+
+typedef struct {
+ EFI_HANDLE Handle;
+} EFI_DEVICE_HANDLE_EXTENDED_DATA_PAYLOAD;
+
+typedef struct {
+ UINT8 *DevicePath;
+} EFI_DEVICE_PATH_EXTENDED_DATA_PAYLOAD;
+
+typedef struct {
+ EFI_HANDLE ControllerHandle;
+ EFI_HANDLE DriverBindingHandle;
+ UINT16 DevicePathSize;
+ UINT8 *RemainingDevicePath;
+} EFI_STATUS_CODE_START_EXTENDED_DATA_PAYLOAD;
+
+///
+/// Resource Allocation Failure Extended Error Data
+///
+
+/*
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ UINT32 Bar;
+ VOID *ReqRes;
+ VOID *AllocRes;
+} EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA;
+*/
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ UINT32 Bar;
+ UINT16 DevicePathSize;
+ UINT16 ReqResSize;
+ UINT16 AllocResSize;
+ UINT8 *DevicePath;
+ UINT8 *ReqRes;
+ UINT8 *AllocRes;
+} EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA;
+
+typedef struct {
+ UINT32 Bar;
+ UINT16 DevicePathSize;
+ UINT16 ReqResSize;
+ UINT16 AllocResSize;
+ UINT8 *DevicePath;
+ UINT8 *ReqRes;
+ UINT8 *AllocRes;
+} EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD;
+
+///
+/// Extended Error Data for Assert
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ UINT32 LineNumber;
+ UINT32 FileNameSize;
+ EFI_STATUS_CODE_STRING_DATA *FileName;
+} EFI_DEBUG_ASSERT_DATA;
+
+typedef struct {
+ UINT32 LineNumber;
+ UINT32 FileNameSize;
+ EFI_STATUS_CODE_STRING_DATA *FileName;
+} EFI_DEBUG_ASSERT_DATA_PAYLOAD;
+
+///
+/// System Context Data EBC/IA32/IPF
+///
+typedef union {
+ EFI_SYSTEM_CONTEXT_EBC SystemContextEbc;
+ EFI_SYSTEM_CONTEXT_IA32 SystemContextIa32;
+ EFI_SYSTEM_CONTEXT_IPF SystemContextIpf;
+} EFI_STATUS_CODE_EXCEP_SYSTEM_CONTEXT;
+
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_STATUS_CODE_EXCEP_SYSTEM_CONTEXT Context;
+} EFI_STATUS_CODE_EXCEP_EXTENDED_DATA;
+
+typedef struct {
+ EFI_STATUS_CODE_EXCEP_SYSTEM_CONTEXT Context;
+} EFI_STATUS_CODE_EXCEP_EXTENDED_DATA_PAYLOAD;
+
+///
+/// Legacy Oprom extended data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_HANDLE DeviceHandle;
+ EFI_PHYSICAL_ADDRESS RomImageBase;
+} EFI_LEGACY_OPROM_EXTENDED_DATA;
+
+typedef struct {
+ EFI_HANDLE DeviceHandle;
+ EFI_PHYSICAL_ADDRESS RomImageBase;
+} EFI_LEGACY_OPROM_EXTENDED_DATA_PAYLOAD;
+
+#endif
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