1 files changed, 37 insertions, 37 deletions
diff --git a/MdePkg/Library/BaseLib/Arm/DisableInterrupts.asm b/MdePkg/Library/BaseLib/Arm/DisableInterrupts.asm
index 71adb1c7a5..859a51f4fe 100644
--- a/MdePkg/Library/BaseLib/Arm/DisableInterrupts.asm
+++ b/MdePkg/Library/BaseLib/Arm/DisableInterrupts.asm
@@ -1,37 +1,37 @@
-;------------------------------------------------------------------------------ 
-;
-; DisableInterrupts() for ARM
-;
-; Copyright (c) 2006 - 2009, Intel Corporation<BR>
-; Portions copyright (c) 2008-2009 Apple Inc.<BR>
-; All rights reserved. This program and the accompanying materials
-; are licensed and made available under the terms and conditions of the BSD License
-; which accompanies this distribution.  The full text of the license may be found at
-; http://opensource.org/licenses/bsd-license.php
-;
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-;
-;------------------------------------------------------------------------------
-
-    EXPORT DisableInterrupts
-
-    AREA Interrupt_disable, CODE, READONLY
-
-;/**
-;  Disables CPU interrupts.
-;
-;**/
-;VOID
-;EFIAPI
-;DisableInterrupts (
-;  VOID
-;  );
-;
-DisableInterrupts
-    MRS     R0,CPSR
-    ORR     R0,R0,#0x80             ;Disable IRQ interrupts
-    MSR     CPSR_c,R0
-    BX      LR
-    
-    END
+;------------------------------------------------------------------------------ 
+;
+; DisableInterrupts() for ARM
+;
+; Copyright (c) 2006 - 2009, Intel Corporation<BR>
+; Portions copyright (c) 2008-2009 Apple Inc.<BR>
+; All rights reserved. This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+    EXPORT DisableInterrupts
+
+    AREA Interrupt_disable, CODE, READONLY
+
+;/**
+;  Disables CPU interrupts.
+;
+;**/
+;VOID
+;EFIAPI
+;DisableInterrupts (
+;  VOID
+;  );
+;
+DisableInterrupts
+    MRS     R0,CPSR
+    ORR     R0,R0,#0x80             ;Disable IRQ interrupts
+    MSR     CPSR_c,R0
+    BX      LR
+    
+    END