diff options
Diffstat (limited to 'OldMdePkg/Library/BaseCacheMaintenanceLib')
4 files changed, 0 insertions, 770 deletions
diff --git a/OldMdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.msa b/OldMdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.msa deleted file mode 100644 index cb156056be..0000000000 --- a/OldMdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.msa +++ /dev/null @@ -1,49 +0,0 @@ -<?xml version="1.0" encoding="UTF-8"?>
-<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
- <MsaHeader>
- <ModuleName>BaseCacheMaintenanceLib</ModuleName>
- <ModuleType>BASE</ModuleType>
- <GuidValue>123dd843-57c9-4158-8418-ce68b3944ce7</GuidValue>
- <Version>1.0</Version>
- <Abstract>Component description file for Base Cache Maintenance Library</Abstract>
- <Description>Cache Maintenance Library that uses Base Library services to maintain caches. - This library assumes there are no chipset dependencies required to maintain caches.</Description>
- <Copyright>Copyright (c) 2006 - 2007, Intel Corporation</Copyright>
- <License>All rights reserved. This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
- <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
- </MsaHeader>
- <ModuleDefinitions>
- <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
- <BinaryModule>false</BinaryModule>
- <OutputFileBasename>BaseCacheMaintenanceLib</OutputFileBasename>
- </ModuleDefinitions>
- <LibraryClassDefinitions>
- <LibraryClass Usage="ALWAYS_PRODUCED">
- <Keyword>CacheMaintenanceLib</Keyword>
- </LibraryClass>
- <LibraryClass Usage="ALWAYS_CONSUMED" SupArchList="IA32 X64 IPF">
- <Keyword>BaseLib</Keyword>
- </LibraryClass>
- <LibraryClass Usage="ALWAYS_CONSUMED">
- <Keyword>DebugLib</Keyword>
- </LibraryClass>
- </LibraryClassDefinitions>
- <SourceFiles>
- <Filename SupArchList="IA32">x86Cache.c</Filename>
- <Filename SupArchList="X64">x86Cache.c</Filename>
- <Filename SupArchList="EBC">EbcCache.c</Filename>
- <Filename SupArchList="IPF">IpfCache.c</Filename>
- </SourceFiles>
- <PackageDependencies>
- <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
- </PackageDependencies>
- <Externs>
- <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
- <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
- </Externs>
-</ModuleSurfaceArea>
\ No newline at end of file diff --git a/OldMdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c b/OldMdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c deleted file mode 100644 index 3a0f6f2395..0000000000 --- a/OldMdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c +++ /dev/null @@ -1,231 +0,0 @@ -/** @file
- Cache Maintenance Functions.
-
- Copyright (c) 2006, Intel Corporation<BR>
- All rights reserved. This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-/**
- Invalidates the entire instruction cache in cache coherency domain of the
- calling CPU.
-
- Invalidates the entire instruction cache in cache coherency domain of the
- calling CPU.
-
-**/
-VOID
-EFIAPI
-InvalidateInstructionCache (
- VOID
- )
-{
-}
-
-/**
- Invalidates a range of instruction cache lines in the cache coherency domain
- of the calling CPU.
-
- Invalidates the instruction cache lines specified by Address and Length. If
- Address is not aligned on a cache line boundary, then entire instruction
- cache line containing Address is invalidated. If Address + Length is not
- aligned on a cache line boundary, then the entire instruction cache line
- containing Address + Length -1 is invalidated. This function may choose to
- invalidate the entire instruction cache if that is more efficient than
- invalidating the specified range. If Length is 0, the no instruction cache
- lines are invalidated. Address is returned.
-
- If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
-
- @param Address The base address of the instruction cache lines to
- invalidate. If the CPU is in a physical addressing mode, then
- Address is a physical address. If the CPU is in a virtual
- addressing mode, then Address is a virtual address.
-
- @param Length The number of bytes to invalidate from the instruction cache.
-
- @return Address
-
-**/
-VOID *
-EFIAPI
-InvalidateInstructionCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
- return Address;
-}
-
-/**
- Writes Back and Invalidates the entire data cache in cache coherency domain
- of the calling CPU.
-
- Writes Back and Invalidates the entire data cache in cache coherency domain
- of the calling CPU. This function guarantees that all dirty cache lines are
- written back to system memory, and also invalidates all the data cache lines
- in the cache coherency domain of the calling CPU.
-
-**/
-VOID
-EFIAPI
-WriteBackInvalidateDataCache (
- VOID
- )
-{
-}
-
-/**
- Writes Back and Invalidates a range of data cache lines in the cache
- coherency domain of the calling CPU.
-
- Writes Back and Invalidate the data cache lines specified by Address and
- Length. If Address is not aligned on a cache line boundary, then entire data
- cache line containing Address is written back and invalidated. If Address +
- Length is not aligned on a cache line boundary, then the entire data cache
- line containing Address + Length -1 is written back and invalidated. This
- function may choose to write back and invalidate the entire data cache if
- that is more efficient than writing back and invalidating the specified
- range. If Length is 0, the no data cache lines are written back and
- invalidated. Address is returned.
-
- If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
-
- @param Address The base address of the data cache lines to write back and
- invalidate. If the CPU is in a physical addressing mode, then
- Address is a physical address. If the CPU is in a virtual
- addressing mode, then Address is a virtual address.
- @param Length The number of bytes to write back and invalidate from the
- data cache.
-
- @return Address
-
-**/
-VOID *
-EFIAPI
-WriteBackInvalidateDataCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
- return Address;
-}
-
-/**
- Writes Back the entire data cache in cache coherency domain of the calling
- CPU.
-
- Writes Back the entire data cache in cache coherency domain of the calling
- CPU. This function guarantees that all dirty cache lines are written back to
- system memory. This function may also invalidate all the data cache lines in
- the cache coherency domain of the calling CPU.
-
-**/
-VOID
-EFIAPI
-WriteBackDataCache (
- VOID
- )
-{
-}
-
-/**
- Writes Back a range of data cache lines in the cache coherency domain of the
- calling CPU.
-
- Writes Back the data cache lines specified by Address and Length. If Address
- is not aligned on a cache line boundary, then entire data cache line
- containing Address is written back. If Address + Length is not aligned on a
- cache line boundary, then the entire data cache line containing Address +
- Length -1 is written back. This function may choose to write back the entire
- data cache if that is more efficient than writing back the specified range.
- If Length is 0, the no data cache lines are written back. This function may
- also invalidate all the data cache lines in the specified range of the cache
- coherency domain of the calling CPU. Address is returned.
-
- If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
-
- @param Address The base address of the data cache lines to write back. If
- the CPU is in a physical addressing mode, then Address is a
- physical address. If the CPU is in a virtual addressing
- mode, then Address is a virtual address.
- @param Length The number of bytes to write back from the data cache.
-
- @return Address
-
-**/
-VOID *
-EFIAPI
-WriteBackDataCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
- return Address;
-}
-
-/**
- Invalidates the entire data cache in cache coherency domain of the calling
- CPU.
-
- Invalidates the entire data cache in cache coherency domain of the calling
- CPU. This function must be used with care because dirty cache lines are not
- written back to system memory. It is typically used for cache diagnostics. If
- the CPU does not support invalidation of the entire data cache, then a write
- back and invalidate operation should be performed on the entire data cache.
-
-**/
-VOID
-EFIAPI
-InvalidateDataCache (
- VOID
- )
-{
-}
-
-/**
- Invalidates a range of data cache lines in the cache coherency domain of the
- calling CPU.
-
- Invalidates the data cache lines specified by Address and Length. If Address
- is not aligned on a cache line boundary, then entire data cache line
- containing Address is invalidated. If Address + Length is not aligned on a
- cache line boundary, then the entire data cache line containing Address +
- Length -1 is invalidated. This function must never invalidate any cache lines
- outside the specified range. If Length is 0, the no data cache lines are
- invalidated. Address is returned. This function must be used with care
- because dirty cache lines are not written back to system memory. It is
- typically used for cache diagnostics. If the CPU does not support
- invalidation of a data cache range, then a write back and invalidate
- operation should be performed on the data cache range.
-
- If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
-
- @param Address The base address of the data cache lines to invalidate. If
- the CPU is in a physical addressing mode, then Address is a
- physical address. If the CPU is in a virtual addressing mode,
- then Address is a virtual address.
- @param Length The number of bytes to invalidate from the data cache.
-
- @return Address
-
-**/
-VOID *
-EFIAPI
-InvalidateDataCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
- return Address;
-}
diff --git a/OldMdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c b/OldMdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c deleted file mode 100644 index 17060eb70f..0000000000 --- a/OldMdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c +++ /dev/null @@ -1,236 +0,0 @@ -/** @file
- Cache Maintenance Functions.
-
- Copyright (c) 2006, Intel Corporation<BR>
- All rights reserved. This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-
-/**
- Invalidates the entire instruction cache in cache coherency domain of the
- calling CPU.
-
- Invalidates the entire instruction cache in cache coherency domain of the
- calling CPU.
-
-**/
-VOID
-EFIAPI
-InvalidateInstructionCache (
- VOID
- )
-{
- PalCallStatic (NULL, 1, 1, 1, 0);
-}
-
-/**
- Invalidates a range of instruction cache lines in the cache coherency domain
- of the calling CPU.
-
- Invalidates the instruction cache lines specified by Address and Length. If
- Address is not aligned on a cache line boundary, then entire instruction
- cache line containing Address is invalidated. If Address + Length is not
- aligned on a cache line boundary, then the entire instruction cache line
- containing Address + Length -1 is invalidated. This function may choose to
- invalidate the entire instruction cache if that is more efficient than
- invalidating the specified range. If Length is 0, the no instruction cache
- lines are invalidated. Address is returned.
-
- If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
-
- @param Address The base address of the instruction cache lines to
- invalidate. If the CPU is in a physical addressing mode, then
- Address is a physical address. If the CPU is in a virtual
- addressing mode, then Address is a virtual address.
-
- @param Length The number of bytes to invalidate from the instruction cache.
-
- @return Address
-
-**/
-VOID *
-EFIAPI
-InvalidateInstructionCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- return IpfFlushCacheRange (Address, Length);
-}
-
-/**
- Writes Back and Invalidates the entire data cache in cache coherency domain
- of the calling CPU.
-
- Writes Back and Invalidates the entire data cache in cache coherency domain
- of the calling CPU. This function guarantees that all dirty cache lines are
- written back to system memory, and also invalidates all the data cache lines
- in the cache coherency domain of the calling CPU.
-
-**/
-VOID
-EFIAPI
-WriteBackInvalidateDataCache (
- VOID
- )
-{
- PalCallStatic (NULL, 1, 2, 1, 0);
-}
-
-/**
- Writes Back and Invalidates a range of data cache lines in the cache
- coherency domain of the calling CPU.
-
- Writes Back and Invalidate the data cache lines specified by Address and
- Length. If Address is not aligned on a cache line boundary, then entire data
- cache line containing Address is written back and invalidated. If Address +
- Length is not aligned on a cache line boundary, then the entire data cache
- line containing Address + Length -1 is written back and invalidated. This
- function may choose to write back and invalidate the entire data cache if
- that is more efficient than writing back and invalidating the specified
- range. If Length is 0, the no data cache lines are written back and
- invalidated. Address is returned.
-
- If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
-
- @param Address The base address of the data cache lines to write back and
- invalidate. If the CPU is in a physical addressing mode, then
- Address is a physical address. If the CPU is in a virtual
- addressing mode, then Address is a virtual address.
- @param Length The number of bytes to write back and invalidate from the
- data cache.
-
- @return Address
-
-**/
-VOID *
-EFIAPI
-WriteBackInvalidateDataCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
-
- return IpfFlushCacheRange (Address, Length);
-}
-
-/**
- Writes Back the entire data cache in cache coherency domain of the calling
- CPU.
-
- Writes Back the entire data cache in cache coherency domain of the calling
- CPU. This function guarantees that all dirty cache lines are written back to
- system memory. This function may also invalidate all the data cache lines in
- the cache coherency domain of the calling CPU.
-
-**/
-VOID
-EFIAPI
-WriteBackDataCache (
- VOID
- )
-{
- PalCallStatic (NULL, 1, 2, 0, 0);
-}
-
-/**
- Writes Back a range of data cache lines in the cache coherency domain of the
- calling CPU.
-
- Writes Back the data cache lines specified by Address and Length. If Address
- is not aligned on a cache line boundary, then entire data cache line
- containing Address is written back. If Address + Length is not aligned on a
- cache line boundary, then the entire data cache line containing Address +
- Length -1 is written back. This function may choose to write back the entire
- data cache if that is more efficient than writing back the specified range.
- If Length is 0, the no data cache lines are written back. This function may
- also invalidate all the data cache lines in the specified range of the cache
- coherency domain of the calling CPU. Address is returned.
-
- If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
-
- @param Address The base address of the data cache lines to write back. If
- the CPU is in a physical addressing mode, then Address is a
- physical address. If the CPU is in a virtual addressing
- mode, then Address is a virtual address.
- @param Length The number of bytes to write back from the data cache.
-
- @return Address
-
-**/
-VOID *
-EFIAPI
-WriteBackDataCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
-
- return IpfFlushCacheRange (Address, Length);
-}
-
-/**
- Invalidates the entire data cache in cache coherency domain of the calling
- CPU.
-
- Invalidates the entire data cache in cache coherency domain of the calling
- CPU. This function must be used with care because dirty cache lines are not
- written back to system memory. It is typically used for cache diagnostics. If
- the CPU does not support invalidation of the entire data cache, then a write
- back and invalidate operation should be performed on the entire data cache.
-
-**/
-VOID
-EFIAPI
-InvalidateDataCache (
- VOID
- )
-{
- WriteBackInvalidateDataCache ();
-}
-
-/**
- Invalidates a range of data cache lines in the cache coherency domain of the
- calling CPU.
-
- Invalidates the data cache lines specified by Address and Length. If Address
- is not aligned on a cache line boundary, then entire data cache line
- containing Address is invalidated. If Address + Length is not aligned on a
- cache line boundary, then the entire data cache line containing Address +
- Length -1 is invalidated. This function must never invalidate any cache lines
- outside the specified range. If Length is 0, the no data cache lines are
- invalidated. Address is returned. This function must be used with care
- because dirty cache lines are not written back to system memory. It is
- typically used for cache diagnostics. If the CPU does not support
- invalidation of a data cache range, then a write back and invalidate
- operation should be performed on the data cache range.
-
- If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
-
- @param Address The base address of the data cache lines to invalidate. If
- the CPU is in a physical addressing mode, then Address is a
- physical address. If the CPU is in a virtual addressing mode,
- then Address is a virtual address.
- @param Length The number of bytes to invalidate from the data cache.
-
- @return Address
-
-**/
-VOID *
-EFIAPI
-InvalidateDataCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- return IpfFlushCacheRange (Address, Length);
-}
diff --git a/OldMdePkg/Library/BaseCacheMaintenanceLib/x86Cache.c b/OldMdePkg/Library/BaseCacheMaintenanceLib/x86Cache.c deleted file mode 100644 index 6e812c99c3..0000000000 --- a/OldMdePkg/Library/BaseCacheMaintenanceLib/x86Cache.c +++ /dev/null @@ -1,254 +0,0 @@ -/** @file
- Cache Maintenance Functions.
-
- Copyright (c) 2006, Intel Corporation<BR>
- All rights reserved. This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
- Module Name: x86Cache.c
-
-**/
-
-//
-// This size must be at or below the smallest cache size possible among all
-// supported processors
-//
-#define CACHE_LINE_SIZE 0x20
-
-/**
- Invalidates the entire instruction cache in cache coherency domain of the
- calling CPU.
-
- Invalidates the entire instruction cache in cache coherency domain of the
- calling CPU.
-
-**/
-VOID
-EFIAPI
-InvalidateInstructionCache (
- VOID
- )
-{
-}
-
-/**
- Invalidates a range of instruction cache lines in the cache coherency domain
- of the calling CPU.
-
- Invalidates the instruction cache lines specified by Address and Length. If
- Address is not aligned on a cache line boundary, then entire instruction
- cache line containing Address is invalidated. If Address + Length is not
- aligned on a cache line boundary, then the entire instruction cache line
- containing Address + Length -1 is invalidated. This function may choose to
- invalidate the entire instruction cache if that is more efficient than
- invalidating the specified range. If Length is 0, the no instruction cache
- lines are invalidated. Address is returned.
-
- If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
-
- @param Address The base address of the instruction cache lines to
- invalidate. If the CPU is in a physical addressing mode, then
- Address is a physical address. If the CPU is in a virtual
- addressing mode, then Address is a virtual address.
-
- @param Length The number of bytes to invalidate from the instruction cache.
-
- @return Address
-
-**/
-VOID *
-EFIAPI
-InvalidateInstructionCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
- return Address;
-}
-
-/**
- Writes Back and Invalidates the entire data cache in cache coherency domain
- of the calling CPU.
-
- Writes Back and Invalidates the entire data cache in cache coherency domain
- of the calling CPU. This function guarantees that all dirty cache lines are
- written back to system memory, and also invalidates all the data cache lines
- in the cache coherency domain of the calling CPU.
-
-**/
-VOID
-EFIAPI
-WriteBackInvalidateDataCache (
- VOID
- )
-{
- AsmWbinvd ();
-}
-
-/**
- Writes Back and Invalidates a range of data cache lines in the cache
- coherency domain of the calling CPU.
-
- Writes Back and Invalidate the data cache lines specified by Address and
- Length. If Address is not aligned on a cache line boundary, then entire data
- cache line containing Address is written back and invalidated. If Address +
- Length is not aligned on a cache line boundary, then the entire data cache
- line containing Address + Length -1 is written back and invalidated. This
- function may choose to write back and invalidate the entire data cache if
- that is more efficient than writing back and invalidating the specified
- range. If Length is 0, the no data cache lines are written back and
- invalidated. Address is returned.
-
- If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
-
- @param Address The base address of the data cache lines to write back and
- invalidate. If the CPU is in a physical addressing mode, then
- Address is a physical address. If the CPU is in a virtual
- addressing mode, then Address is a virtual address.
- @param Length The number of bytes to write back and invalidate from the
- data cache.
-
- @return Address
-
-**/
-VOID *
-EFIAPI
-WriteBackInvalidateDataCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- UINTN Start, End;
-
- ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
-
- if (Length == 0) {
- return Address;
- }
-
- Start = (UINTN)Address;
- End = (Start + Length + (CACHE_LINE_SIZE - 1)) & ~(CACHE_LINE_SIZE - 1);
- Start &= ~(CACHE_LINE_SIZE - 1);
-
- do {
- Start = (UINTN)AsmFlushCacheLine ((VOID*)Start) + CACHE_LINE_SIZE;
- } while (Start != End);
- return Address;
-}
-
-/**
- Writes Back the entire data cache in cache coherency domain of the calling
- CPU.
-
- Writes Back the entire data cache in cache coherency domain of the calling
- CPU. This function guarantees that all dirty cache lines are written back to
- system memory. This function may also invalidate all the data cache lines in
- the cache coherency domain of the calling CPU.
-
-**/
-VOID
-EFIAPI
-WriteBackDataCache (
- VOID
- )
-{
- WriteBackInvalidateDataCache ();
-}
-
-/**
- Writes Back a range of data cache lines in the cache coherency domain of the
- calling CPU.
-
- Writes Back the data cache lines specified by Address and Length. If Address
- is not aligned on a cache line boundary, then entire data cache line
- containing Address is written back. If Address + Length is not aligned on a
- cache line boundary, then the entire data cache line containing Address +
- Length -1 is written back. This function may choose to write back the entire
- data cache if that is more efficient than writing back the specified range.
- If Length is 0, the no data cache lines are written back. This function may
- also invalidate all the data cache lines in the specified range of the cache
- coherency domain of the calling CPU. Address is returned.
-
- If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
-
- @param Address The base address of the data cache lines to write back. If
- the CPU is in a physical addressing mode, then Address is a
- physical address. If the CPU is in a virtual addressing
- mode, then Address is a virtual address.
- @param Length The number of bytes to write back from the data cache.
-
- @return Address
-
-**/
-VOID *
-EFIAPI
-WriteBackDataCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- return WriteBackInvalidateDataCacheRange (Address, Length);
-}
-
-/**
- Invalidates the entire data cache in cache coherency domain of the calling
- CPU.
-
- Invalidates the entire data cache in cache coherency domain of the calling
- CPU. This function must be used with care because dirty cache lines are not
- written back to system memory. It is typically used for cache diagnostics. If
- the CPU does not support invalidation of the entire data cache, then a write
- back and invalidate operation should be performed on the entire data cache.
-
-**/
-VOID
-EFIAPI
-InvalidateDataCache (
- VOID
- )
-{
- AsmInvd ();
-}
-
-/**
- Invalidates a range of data cache lines in the cache coherency domain of the
- calling CPU.
-
- Invalidates the data cache lines specified by Address and Length. If Address
- is not aligned on a cache line boundary, then entire data cache line
- containing Address is invalidated. If Address + Length is not aligned on a
- cache line boundary, then the entire data cache line containing Address +
- Length -1 is invalidated. This function must never invalidate any cache lines
- outside the specified range. If Length is 0, the no data cache lines are
- invalidated. Address is returned. This function must be used with care
- because dirty cache lines are not written back to system memory. It is
- typically used for cache diagnostics. If the CPU does not support
- invalidation of a data cache range, then a write back and invalidate
- operation should be performed on the data cache range.
-
- If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
-
- @param Address The base address of the data cache lines to invalidate. If
- the CPU is in a physical addressing mode, then Address is a
- physical address. If the CPU is in a virtual addressing mode,
- then Address is a virtual address.
- @param Length The number of bytes to invalidate from the data cache.
-
- @return Address
-
-**/
-VOID *
-EFIAPI
-InvalidateDataCacheRange (
- IN VOID *Address,
- IN UINTN Length
- )
-{
- return WriteBackInvalidateDataCacheRange (Address, Length);
-}
|