diff options
Diffstat (limited to 'OldMdePkg/Library/BasePciLibCf8')
-rw-r--r-- | OldMdePkg/Library/BasePciLibCf8/BasePciLibCf8.msa | 43 | ||||
-rw-r--r-- | OldMdePkg/Library/BasePciLibCf8/PciLib.c | 1068 |
2 files changed, 0 insertions, 1111 deletions
diff --git a/OldMdePkg/Library/BasePciLibCf8/BasePciLibCf8.msa b/OldMdePkg/Library/BasePciLibCf8/BasePciLibCf8.msa deleted file mode 100644 index 85edbbabd7..0000000000 --- a/OldMdePkg/Library/BasePciLibCf8/BasePciLibCf8.msa +++ /dev/null @@ -1,43 +0,0 @@ -<?xml version="1.0" encoding="UTF-8"?>
-<ModuleSurfaceArea xmlns="http://www.TianoCore.org/2006/Edk2.0">
- <MsaHeader>
- <ModuleName>BasePciLibCf8</ModuleName>
- <ModuleType>BASE</ModuleType>
- <GuidValue>28bde99c-e8a7-4e3e-9a8a-e66cd64f31c6</GuidValue>
- <Version>1.0</Version>
- <Abstract>Component description file for PCI CF8 Base PCI Library</Abstract>
- <Description>PCI Library that uses I/O ports 0xCF8 and 0xCFC to perform
- PCI Configuration cycles. Layers on top of an I/O Library instance.</Description>
- <Copyright>Copyright (c) 2006 - 2007, Intel Corporation.</Copyright>
- <License>All rights reserved. This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.</License>
- <Specification>FRAMEWORK_BUILD_PACKAGING_SPECIFICATION 0x00000052</Specification>
- </MsaHeader>
- <ModuleDefinitions>
- <SupportedArchitectures>IA32 X64 IPF EBC</SupportedArchitectures>
- <BinaryModule>false</BinaryModule>
- <OutputFileBasename>BasePciLibCf8</OutputFileBasename>
- </ModuleDefinitions>
- <LibraryClassDefinitions>
- <LibraryClass Usage="ALWAYS_PRODUCED">
- <Keyword>PciLib</Keyword>
- </LibraryClass>
- <LibraryClass Usage="ALWAYS_CONSUMED">
- <Keyword>PciCf8Lib</Keyword>
- </LibraryClass>
- </LibraryClassDefinitions>
- <SourceFiles>
- <Filename>PciLib.c</Filename>
- </SourceFiles>
- <PackageDependencies>
- <Package PackageGuid="5e0e9358-46b6-4ae2-8218-4ab8b9bbdcec"/>
- </PackageDependencies>
- <Externs>
- <Specification>EFI_SPECIFICATION_VERSION 0x00020000</Specification>
- <Specification>EDK_RELEASE_VERSION 0x00020000</Specification>
- </Externs>
-</ModuleSurfaceArea>
\ No newline at end of file diff --git a/OldMdePkg/Library/BasePciLibCf8/PciLib.c b/OldMdePkg/Library/BasePciLibCf8/PciLib.c deleted file mode 100644 index 7e21e23174..0000000000 --- a/OldMdePkg/Library/BasePciLibCf8/PciLib.c +++ /dev/null @@ -1,1068 +0,0 @@ -/** @file
- PCI Library using Port CF8/CFC access.
-
- Copyright (c) 2006, Intel Corporation<BR>
- All rights reserved. This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
- Module Name: PciLib.c
-
-**/
-
-/**
- Reads an 8-bit PCI configuration register.
-
- Reads and returns the 8-bit PCI configuration register specified by Address.
- This function must guarantee that all PCI read and write operations are
- serialized.
-
- If Address > 0x0FFFFFFF, then ASSERT().
-
- @param Address Address that encodes the PCI Bus, Device, Function and
- Register.
-
- @return The read value from the PCI configuration register.
-
-**/
-UINT8
-EFIAPI
-PciRead8 (
- IN UINTN Address
- )
-{
- return PciCf8Read8 (Address);
-}
-
-/**
- Writes an 8-bit PCI configuration register.
-
- Writes the 8-bit PCI configuration register specified by Address with the
- value specified by Value. Value is returned. This function must guarantee
- that all PCI read and write operations are serialized.
-
- If Address > 0x0FFFFFFF, then ASSERT().
-
- @param Address Address that encodes the PCI Bus, Device, Function and
- Register.
- @param Value The value to write.
-
- @return The value written to the PCI configuration register.
-
-**/
-UINT8
-EFIAPI
-PciWrite8 (
- IN UINTN Address,
- IN UINT8 Data
- )
-{
- return PciCf8Write8 (Address, Data);
-}
-
-/**
- Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
- an 8-bit value.
-
- Reads the 8-bit PCI configuration register specified by Address, performs a
- bitwise inclusive OR between the read result and the value specified by
- OrData, and writes the result to the 8-bit PCI configuration register
- specified by Address. The value written to the PCI configuration register is
- returned. This function must guarantee that all PCI read and write operations
- are serialized.
-
- If Address > 0x0FFFFFFF, then ASSERT().
-
- @param Address Address that encodes the PCI Bus, Device, Function and
- Register.
- @param OrData The value to OR with the PCI configuration register.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT8
-EFIAPI
-PciOr8 (
- IN UINTN Address,
- IN UINT8 OrData
- )
-{
- return PciCf8Or8 (Address, OrData);
-}
-
-/**
- Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
- value.
-
- Reads the 8-bit PCI configuration register specified by Address, performs a
- bitwise AND between the read result and the value specified by AndData, and
- writes the result to the 8-bit PCI configuration register specified by
- Address. The value written to the PCI configuration register is returned.
- This function must guarantee that all PCI read and write operations are
- serialized.
-
- If Address > 0x0FFFFFFF, then ASSERT().
-
- @param Address Address that encodes the PCI Bus, Device, Function and
- Register.
- @param AndData The value to AND with the PCI configuration register.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT8
-EFIAPI
-PciAnd8 (
- IN UINTN Address,
- IN UINT8 AndData
- )
-{
- return PciCf8And8 (Address, AndData);
-}
-
-/**
- Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
- value, followed a bitwise inclusive OR with another 8-bit value.
-
- Reads the 8-bit PCI configuration register specified by Address, performs a
- bitwise AND between the read result and the value specified by AndData,
- performs a bitwise inclusive OR between the result of the AND operation and
- the value specified by OrData, and writes the result to the 8-bit PCI
- configuration register specified by Address. The value written to the PCI
- configuration register is returned. This function must guarantee that all PCI
- read and write operations are serialized.
-
- If Address > 0x0FFFFFFF, then ASSERT().
-
- @param Address Address that encodes the PCI Bus, Device, Function and
- Register.
- @param AndData The value to AND with the PCI configuration register.
- @param OrData The value to OR with the result of the AND operation.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT8
-EFIAPI
-PciAndThenOr8 (
- IN UINTN Address,
- IN UINT8 AndData,
- IN UINT8 OrData
- )
-{
- return PciCf8AndThenOr8 (Address, AndData, OrData);
-}
-
-/**
- Reads a bit field of a PCI configuration register.
-
- Reads the bit field in an 8-bit PCI configuration register. The bit field is
- specified by the StartBit and the EndBit. The value of the bit field is
- returned.
-
- If Address > 0x0FFFFFFF, then ASSERT().
- If StartBit is greater than 7, then ASSERT().
- If EndBit is greater than 7, then ASSERT().
- If EndBit is less than StartBit, then ASSERT().
-
- @param Address PCI configuration register to read.
- @param StartBit The ordinal of the least significant bit in the bit field.
- Range 0..7.
- @param EndBit The ordinal of the most significant bit in the bit field.
- Range 0..7.
-
- @return The value of the bit field read from the PCI configuration register.
-
-**/
-UINT8
-EFIAPI
-PciBitFieldRead8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit
- )
-{
- return PciCf8BitFieldRead8 (Address, StartBit, EndBit);
-}
-
-/**
- Writes a bit field to a PCI configuration register.
-
- Writes Value to the bit field of the PCI configuration register. The bit
- field is specified by the StartBit and the EndBit. All other bits in the
- destination PCI configuration register are preserved. The new value of the
- 8-bit register is returned.
-
- If Address > 0x0FFFFFFF, then ASSERT().
- If StartBit is greater than 7, then ASSERT().
- If EndBit is greater than 7, then ASSERT().
- If EndBit is less than StartBit, then ASSERT().
-
- @param Address PCI configuration register to write.
- @param StartBit The ordinal of the least significant bit in the bit field.
- Range 0..7.
- @param EndBit The ordinal of the most significant bit in the bit field.
- Range 0..7.
- @param Value New value of the bit field.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT8
-EFIAPI
-PciBitFieldWrite8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 Value
- )
-{
- return PciCf8BitFieldWrite8 (Address, StartBit, EndBit, Value);
-}
-
-/**
- Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
- writes the result back to the bit field in the 8-bit port.
-
- Reads the 8-bit PCI configuration register specified by Address, performs a
- bitwise inclusive OR between the read result and the value specified by
- OrData, and writes the result to the 8-bit PCI configuration register
- specified by Address. The value written to the PCI configuration register is
- returned. This function must guarantee that all PCI read and write operations
- are serialized. Extra left bits in OrData are stripped.
-
- If Address > 0x0FFFFFFF, then ASSERT().
- If StartBit is greater than 7, then ASSERT().
- If EndBit is greater than 7, then ASSERT().
- If EndBit is less than StartBit, then ASSERT().
-
- @param Address PCI configuration register to write.
- @param StartBit The ordinal of the least significant bit in the bit field.
- Range 0..7.
- @param EndBit The ordinal of the most significant bit in the bit field.
- Range 0..7.
- @param OrData The value to OR with the PCI configuration register.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT8
-EFIAPI
-PciBitFieldOr8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 OrData
- )
-{
- return PciCf8BitFieldOr8 (Address, StartBit, EndBit, OrData);
-}
-
-/**
- Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
- AND, and writes the result back to the bit field in the 8-bit register.
-
- Reads the 8-bit PCI configuration register specified by Address, performs a
- bitwise AND between the read result and the value specified by AndData, and
- writes the result to the 8-bit PCI configuration register specified by
- Address. The value written to the PCI configuration register is returned.
- This function must guarantee that all PCI read and write operations are
- serialized. Extra left bits in AndData are stripped.
-
- If Address > 0x0FFFFFFF, then ASSERT().
- If StartBit is greater than 7, then ASSERT().
- If EndBit is greater than 7, then ASSERT().
- If EndBit is less than StartBit, then ASSERT().
-
- @param Address PCI configuration register to write.
- @param StartBit The ordinal of the least significant bit in the bit field.
- Range 0..7.
- @param EndBit The ordinal of the most significant bit in the bit field.
- Range 0..7.
- @param AndData The value to AND with the PCI configuration register.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT8
-EFIAPI
-PciBitFieldAnd8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 AndData
- )
-{
- return PciCf8BitFieldAnd8 (Address, StartBit, EndBit, AndData);
-}
-
-/**
- Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
- bitwise inclusive OR, and writes the result back to the bit field in the
- 8-bit port.
-
- Reads the 8-bit PCI configuration register specified by Address, performs a
- bitwise AND followed by a bitwise inclusive OR between the read result and
- the value specified by AndData, and writes the result to the 8-bit PCI
- configuration register specified by Address. The value written to the PCI
- configuration register is returned. This function must guarantee that all PCI
- read and write operations are serialized. Extra left bits in both AndData and
- OrData are stripped.
-
- If Address > 0x0FFFFFFF, then ASSERT().
- If StartBit is greater than 7, then ASSERT().
- If EndBit is greater than 7, then ASSERT().
- If EndBit is less than StartBit, then ASSERT().
-
- @param Address PCI configuration register to write.
- @param StartBit The ordinal of the least significant bit in the bit field.
- Range 0..7.
- @param EndBit The ordinal of the most significant bit in the bit field.
- Range 0..7.
- @param AndData The value to AND with the PCI configuration register.
- @param OrData The value to OR with the result of the AND operation.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT8
-EFIAPI
-PciBitFieldAndThenOr8 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT8 AndData,
- IN UINT8 OrData
- )
-{
- return PciCf8BitFieldAndThenOr8 (Address, StartBit, EndBit, AndData, OrData);
-}
-
-/**
- Reads a 16-bit PCI configuration register.
-
- Reads and returns the 16-bit PCI configuration register specified by Address.
- This function must guarantee that all PCI read and write operations are
- serialized.
-
- If Address > 0x0FFFFFFF, then ASSERT().
-
- @param Address Address that encodes the PCI Bus, Device, Function and
- Register.
-
- @return The read value from the PCI configuration register.
-
-**/
-UINT16
-EFIAPI
-PciRead16 (
- IN UINTN Address
- )
-{
- return PciCf8Read16 (Address);
-}
-
-/**
- Writes a 16-bit PCI configuration register.
-
- Writes the 16-bit PCI configuration register specified by Address with the
- value specified by Value. Value is returned. This function must guarantee
- that all PCI read and write operations are serialized.
-
- If Address > 0x0FFFFFFF, then ASSERT().
-
- @param Address Address that encodes the PCI Bus, Device, Function and
- Register.
- @param Value The value to write.
-
- @return The value written to the PCI configuration register.
-
-**/
-UINT16
-EFIAPI
-PciWrite16 (
- IN UINTN Address,
- IN UINT16 Data
- )
-{
- return PciCf8Write16 (Address, Data);
-}
-
-/**
- Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
- a 16-bit value.
-
- Reads the 16-bit PCI configuration register specified by Address, performs a
- bitwise inclusive OR between the read result and the value specified by
- OrData, and writes the result to the 16-bit PCI configuration register
- specified by Address. The value written to the PCI configuration register is
- returned. This function must guarantee that all PCI read and write operations
- are serialized.
-
- If Address > 0x0FFFFFFF, then ASSERT().
-
- @param Address Address that encodes the PCI Bus, Device, Function and
- Register.
- @param OrData The value to OR with the PCI configuration register.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT16
-EFIAPI
-PciOr16 (
- IN UINTN Address,
- IN UINT16 OrData
- )
-{
- return PciCf8Or16 (Address, OrData);
-}
-
-/**
- Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
- value.
-
- Reads the 16-bit PCI configuration register specified by Address, performs a
- bitwise AND between the read result and the value specified by AndData, and
- writes the result to the 16-bit PCI configuration register specified by
- Address. The value written to the PCI configuration register is returned.
- This function must guarantee that all PCI read and write operations are
- serialized.
-
- If Address > 0x0FFFFFFF, then ASSERT().
-
- @param Address Address that encodes the PCI Bus, Device, Function and
- Register.
- @param AndData The value to AND with the PCI configuration register.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT16
-EFIAPI
-PciAnd16 (
- IN UINTN Address,
- IN UINT16 AndData
- )
-{
- return PciCf8And16 (Address, AndData);
-}
-
-/**
- Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
- value, followed a bitwise inclusive OR with another 16-bit value.
-
- Reads the 16-bit PCI configuration register specified by Address, performs a
- bitwise AND between the read result and the value specified by AndData,
- performs a bitwise inclusive OR between the result of the AND operation and
- the value specified by OrData, and writes the result to the 16-bit PCI
- configuration register specified by Address. The value written to the PCI
- configuration register is returned. This function must guarantee that all PCI
- read and write operations are serialized.
-
- If Address > 0x0FFFFFFF, then ASSERT().
-
- @param Address Address that encodes the PCI Bus, Device, Function and
- Register.
- @param AndData The value to AND with the PCI configuration register.
- @param OrData The value to OR with the result of the AND operation.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT16
-EFIAPI
-PciAndThenOr16 (
- IN UINTN Address,
- IN UINT16 AndData,
- IN UINT16 OrData
- )
-{
- return PciCf8AndThenOr16 (Address, AndData, OrData);
-}
-
-/**
- Reads a bit field of a PCI configuration register.
-
- Reads the bit field in a 16-bit PCI configuration register. The bit field is
- specified by the StartBit and the EndBit. The value of the bit field is
- returned.
-
- If Address > 0x0FFFFFFF, then ASSERT().
- If StartBit is greater than 15, then ASSERT().
- If EndBit is greater than 15, then ASSERT().
- If EndBit is less than StartBit, then ASSERT().
-
- @param Address PCI configuration register to read.
- @param StartBit The ordinal of the least significant bit in the bit field.
- Range 0..15.
- @param EndBit The ordinal of the most significant bit in the bit field.
- Range 0..15.
-
- @return The value of the bit field read from the PCI configuration register.
-
-**/
-UINT16
-EFIAPI
-PciBitFieldRead16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit
- )
-{
- return PciCf8BitFieldRead16 (Address, StartBit, EndBit);
-}
-
-/**
- Writes a bit field to a PCI configuration register.
-
- Writes Value to the bit field of the PCI configuration register. The bit
- field is specified by the StartBit and the EndBit. All other bits in the
- destination PCI configuration register are preserved. The new value of the
- 16-bit register is returned.
-
- If Address > 0x0FFFFFFF, then ASSERT().
- If StartBit is greater than 15, then ASSERT().
- If EndBit is greater than 15, then ASSERT().
- If EndBit is less than StartBit, then ASSERT().
-
- @param Address PCI configuration register to write.
- @param StartBit The ordinal of the least significant bit in the bit field.
- Range 0..15.
- @param EndBit The ordinal of the most significant bit in the bit field.
- Range 0..15.
- @param Value New value of the bit field.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT16
-EFIAPI
-PciBitFieldWrite16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 Value
- )
-{
- return PciCf8BitFieldWrite16 (Address, StartBit, EndBit, Value);
-}
-
-/**
- Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
- writes the result back to the bit field in the 16-bit port.
-
- Reads the 16-bit PCI configuration register specified by Address, performs a
- bitwise inclusive OR between the read result and the value specified by
- OrData, and writes the result to the 16-bit PCI configuration register
- specified by Address. The value written to the PCI configuration register is
- returned. This function must guarantee that all PCI read and write operations
- are serialized. Extra left bits in OrData are stripped.
-
- If Address > 0x0FFFFFFF, then ASSERT().
- If StartBit is greater than 15, then ASSERT().
- If EndBit is greater than 15, then ASSERT().
- If EndBit is less than StartBit, then ASSERT().
-
- @param Address PCI configuration register to write.
- @param StartBit The ordinal of the least significant bit in the bit field.
- Range 0..15.
- @param EndBit The ordinal of the most significant bit in the bit field.
- Range 0..15.
- @param OrData The value to OR with the PCI configuration register.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT16
-EFIAPI
-PciBitFieldOr16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 OrData
- )
-{
- return PciCf8BitFieldOr16 (Address, StartBit, EndBit, OrData);
-}
-
-/**
- Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
- AND, and writes the result back to the bit field in the 16-bit register.
-
- Reads the 16-bit PCI configuration register specified by Address, performs a
- bitwise AND between the read result and the value specified by AndData, and
- writes the result to the 16-bit PCI configuration register specified by
- Address. The value written to the PCI configuration register is returned.
- This function must guarantee that all PCI read and write operations are
- serialized. Extra left bits in AndData are stripped.
-
- If Address > 0x0FFFFFFF, then ASSERT().
- If StartBit is greater than 15, then ASSERT().
- If EndBit is greater than 15, then ASSERT().
- If EndBit is less than StartBit, then ASSERT().
-
- @param Address PCI configuration register to write.
- @param StartBit The ordinal of the least significant bit in the bit field.
- Range 0..15.
- @param EndBit The ordinal of the most significant bit in the bit field.
- Range 0..15.
- @param AndData The value to AND with the PCI configuration register.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT16
-EFIAPI
-PciBitFieldAnd16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 AndData
- )
-{
- return PciCf8BitFieldAnd16 (Address, StartBit, EndBit, AndData);
-}
-
-/**
- Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
- bitwise inclusive OR, and writes the result back to the bit field in the
- 16-bit port.
-
- Reads the 16-bit PCI configuration register specified by Address, performs a
- bitwise AND followed by a bitwise inclusive OR between the read result and
- the value specified by AndData, and writes the result to the 16-bit PCI
- configuration register specified by Address. The value written to the PCI
- configuration register is returned. This function must guarantee that all PCI
- read and write operations are serialized. Extra left bits in both AndData and
- OrData are stripped.
-
- If Address > 0x0FFFFFFF, then ASSERT().
- If StartBit is greater than 15, then ASSERT().
- If EndBit is greater than 15, then ASSERT().
- If EndBit is less than StartBit, then ASSERT().
-
- @param Address PCI configuration register to write.
- @param StartBit The ordinal of the least significant bit in the bit field.
- Range 0..15.
- @param EndBit The ordinal of the most significant bit in the bit field.
- Range 0..15.
- @param AndData The value to AND with the PCI configuration register.
- @param OrData The value to OR with the result of the AND operation.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT16
-EFIAPI
-PciBitFieldAndThenOr16 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT16 AndData,
- IN UINT16 OrData
- )
-{
- return PciCf8BitFieldAndThenOr16 (Address, StartBit, EndBit, AndData, OrData);
-}
-
-/**
- Reads a 32-bit PCI configuration register.
-
- Reads and returns the 32-bit PCI configuration register specified by Address.
- This function must guarantee that all PCI read and write operations are
- serialized.
-
- If Address > 0x0FFFFFFF, then ASSERT().
-
- @param Address Address that encodes the PCI Bus, Device, Function and
- Register.
-
- @return The read value from the PCI configuration register.
-
-**/
-UINT32
-EFIAPI
-PciRead32 (
- IN UINTN Address
- )
-{
- return PciCf8Read32 (Address);
-}
-
-/**
- Writes a 32-bit PCI configuration register.
-
- Writes the 32-bit PCI configuration register specified by Address with the
- value specified by Value. Value is returned. This function must guarantee
- that all PCI read and write operations are serialized.
-
- If Address > 0x0FFFFFFF, then ASSERT().
-
- @param Address Address that encodes the PCI Bus, Device, Function and
- Register.
- @param Value The value to write.
-
- @return The value written to the PCI configuration register.
-
-**/
-UINT32
-EFIAPI
-PciWrite32 (
- IN UINTN Address,
- IN UINT32 Data
- )
-{
- return PciCf8Write32 (Address, Data);
-}
-
-/**
- Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
- a 32-bit value.
-
- Reads the 32-bit PCI configuration register specified by Address, performs a
- bitwise inclusive OR between the read result and the value specified by
- OrData, and writes the result to the 32-bit PCI configuration register
- specified by Address. The value written to the PCI configuration register is
- returned. This function must guarantee that all PCI read and write operations
- are serialized.
-
- If Address > 0x0FFFFFFF, then ASSERT().
-
- @param Address Address that encodes the PCI Bus, Device, Function and
- Register.
- @param OrData The value to OR with the PCI configuration register.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT32
-EFIAPI
-PciOr32 (
- IN UINTN Address,
- IN UINT32 OrData
- )
-{
- return PciCf8Or32 (Address, OrData);
-}
-
-/**
- Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
- value.
-
- Reads the 32-bit PCI configuration register specified by Address, performs a
- bitwise AND between the read result and the value specified by AndData, and
- writes the result to the 32-bit PCI configuration register specified by
- Address. The value written to the PCI configuration register is returned.
- This function must guarantee that all PCI read and write operations are
- serialized.
-
- If Address > 0x0FFFFFFF, then ASSERT().
-
- @param Address Address that encodes the PCI Bus, Device, Function and
- Register.
- @param AndData The value to AND with the PCI configuration register.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT32
-EFIAPI
-PciAnd32 (
- IN UINTN Address,
- IN UINT32 AndData
- )
-{
- return PciCf8And32 (Address, AndData);
-}
-
-/**
- Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
- value, followed a bitwise inclusive OR with another 32-bit value.
-
- Reads the 32-bit PCI configuration register specified by Address, performs a
- bitwise AND between the read result and the value specified by AndData,
- performs a bitwise inclusive OR between the result of the AND operation and
- the value specified by OrData, and writes the result to the 32-bit PCI
- configuration register specified by Address. The value written to the PCI
- configuration register is returned. This function must guarantee that all PCI
- read and write operations are serialized.
-
- If Address > 0x0FFFFFFF, then ASSERT().
-
- @param Address Address that encodes the PCI Bus, Device, Function and
- Register.
- @param AndData The value to AND with the PCI configuration register.
- @param OrData The value to OR with the result of the AND operation.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT32
-EFIAPI
-PciAndThenOr32 (
- IN UINTN Address,
- IN UINT32 AndData,
- IN UINT32 OrData
- )
-{
- return PciCf8AndThenOr32 (Address, AndData, OrData);
-}
-
-/**
- Reads a bit field of a PCI configuration register.
-
- Reads the bit field in a 32-bit PCI configuration register. The bit field is
- specified by the StartBit and the EndBit. The value of the bit field is
- returned.
-
- If Address > 0x0FFFFFFF, then ASSERT().
- If StartBit is greater than 31, then ASSERT().
- If EndBit is greater than 31, then ASSERT().
- If EndBit is less than StartBit, then ASSERT().
-
- @param Address PCI configuration register to read.
- @param StartBit The ordinal of the least significant bit in the bit field.
- Range 0..31.
- @param EndBit The ordinal of the most significant bit in the bit field.
- Range 0..31.
-
- @return The value of the bit field read from the PCI configuration register.
-
-**/
-UINT32
-EFIAPI
-PciBitFieldRead32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit
- )
-{
- return PciCf8BitFieldRead32 (Address, StartBit, EndBit);
-}
-
-/**
- Writes a bit field to a PCI configuration register.
-
- Writes Value to the bit field of the PCI configuration register. The bit
- field is specified by the StartBit and the EndBit. All other bits in the
- destination PCI configuration register are preserved. The new value of the
- 32-bit register is returned.
-
- If Address > 0x0FFFFFFF, then ASSERT().
- If StartBit is greater than 31, then ASSERT().
- If EndBit is greater than 31, then ASSERT().
- If EndBit is less than StartBit, then ASSERT().
-
- @param Address PCI configuration register to write.
- @param StartBit The ordinal of the least significant bit in the bit field.
- Range 0..31.
- @param EndBit The ordinal of the most significant bit in the bit field.
- Range 0..31.
- @param Value New value of the bit field.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT32
-EFIAPI
-PciBitFieldWrite32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 Value
- )
-{
- return PciCf8BitFieldWrite32 (Address, StartBit, EndBit, Value);
-}
-
-/**
- Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
- writes the result back to the bit field in the 32-bit port.
-
- Reads the 32-bit PCI configuration register specified by Address, performs a
- bitwise inclusive OR between the read result and the value specified by
- OrData, and writes the result to the 32-bit PCI configuration register
- specified by Address. The value written to the PCI configuration register is
- returned. This function must guarantee that all PCI read and write operations
- are serialized. Extra left bits in OrData are stripped.
-
- If Address > 0x0FFFFFFF, then ASSERT().
- If StartBit is greater than 31, then ASSERT().
- If EndBit is greater than 31, then ASSERT().
- If EndBit is less than StartBit, then ASSERT().
-
- @param Address PCI configuration register to write.
- @param StartBit The ordinal of the least significant bit in the bit field.
- Range 0..31.
- @param EndBit The ordinal of the most significant bit in the bit field.
- Range 0..31.
- @param OrData The value to OR with the PCI configuration register.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT32
-EFIAPI
-PciBitFieldOr32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 OrData
- )
-{
- return PciCf8BitFieldOr32 (Address, StartBit, EndBit, OrData);
-}
-
-/**
- Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
- AND, and writes the result back to the bit field in the 32-bit register.
-
- Reads the 32-bit PCI configuration register specified by Address, performs a
- bitwise AND between the read result and the value specified by AndData, and
- writes the result to the 32-bit PCI configuration register specified by
- Address. The value written to the PCI configuration register is returned.
- This function must guarantee that all PCI read and write operations are
- serialized. Extra left bits in AndData are stripped.
-
- If Address > 0x0FFFFFFF, then ASSERT().
- If StartBit is greater than 31, then ASSERT().
- If EndBit is greater than 31, then ASSERT().
- If EndBit is less than StartBit, then ASSERT().
-
- @param Address PCI configuration register to write.
- @param StartBit The ordinal of the least significant bit in the bit field.
- Range 0..31.
- @param EndBit The ordinal of the most significant bit in the bit field.
- Range 0..31.
- @param AndData The value to AND with the PCI configuration register.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT32
-EFIAPI
-PciBitFieldAnd32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 AndData
- )
-{
- return PciCf8BitFieldAnd32 (Address, StartBit, EndBit, AndData);
-}
-
-/**
- Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
- bitwise inclusive OR, and writes the result back to the bit field in the
- 32-bit port.
-
- Reads the 32-bit PCI configuration register specified by Address, performs a
- bitwise AND followed by a bitwise inclusive OR between the read result and
- the value specified by AndData, and writes the result to the 32-bit PCI
- configuration register specified by Address. The value written to the PCI
- configuration register is returned. This function must guarantee that all PCI
- read and write operations are serialized. Extra left bits in both AndData and
- OrData are stripped.
-
- If Address > 0x0FFFFFFF, then ASSERT().
- If StartBit is greater than 31, then ASSERT().
- If EndBit is greater than 31, then ASSERT().
- If EndBit is less than StartBit, then ASSERT().
-
- @param Address PCI configuration register to write.
- @param StartBit The ordinal of the least significant bit in the bit field.
- Range 0..31.
- @param EndBit The ordinal of the most significant bit in the bit field.
- Range 0..31.
- @param AndData The value to AND with the PCI configuration register.
- @param OrData The value to OR with the result of the AND operation.
-
- @return The value written back to the PCI configuration register.
-
-**/
-UINT32
-EFIAPI
-PciBitFieldAndThenOr32 (
- IN UINTN Address,
- IN UINTN StartBit,
- IN UINTN EndBit,
- IN UINT32 AndData,
- IN UINT32 OrData
- )
-{
- return PciCf8BitFieldAndThenOr32 (Address, StartBit, EndBit, AndData, OrData);
-}
-
-/**
- Reads a range of PCI configuration registers into a caller supplied buffer.
-
- Reads the range of PCI configuration registers specified by StartAddress and
- Size into the buffer specified by Buffer. This function only allows the PCI
- configuration registers from a single PCI function to be read. Size is
- returned. When possible 32-bit PCI configuration read cycles are used to read
- from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
- and 16-bit PCI configuration read cycles may be used at the beginning and the
- end of the range.
-
- If StartAddress > 0x0FFFFFFF, then ASSERT().
- If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
- If Size > 0 and Buffer is NULL, then ASSERT().
-
- @param StartAddress Starting address that encodes the PCI Bus, Device,
- Function and Register.
- @param Size Size in bytes of the transfer.
- @param Buffer Pointer to a buffer receiving the data read.
-
- @return Size
-
-**/
-UINTN
-EFIAPI
-PciReadBuffer (
- IN UINTN StartAddress,
- IN UINTN Size,
- OUT VOID *Buffer
- )
-{
- return PciCf8ReadBuffer (StartAddress, Size, Buffer);
-}
-
-/**
- Copies the data in a caller supplied buffer to a specified range of PCI
- configuration space.
-
- Writes the range of PCI configuration registers specified by StartAddress and
- Size from the buffer specified by Buffer. This function only allows the PCI
- configuration registers from a single PCI function to be written. Size is
- returned. When possible 32-bit PCI configuration write cycles are used to
- write from StartAdress to StartAddress + Size. Due to alignment restrictions,
- 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
- and the end of the range.
-
- If StartAddress > 0x0FFFFFFF, then ASSERT().
- If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
- If Size > 0 and Buffer is NULL, then ASSERT().
-
- @param StartAddress Starting address that encodes the PCI Bus, Device,
- Function and Register.
- @param Size Size in bytes of the transfer.
- @param Buffer Pointer to a buffer containing the data to write.
-
- @return Size
-
-**/
-UINTN
-EFIAPI
-PciWriteBuffer (
- IN UINTN StartAddress,
- IN UINTN Size,
- IN VOID *Buffer
- )
-{
- return PciCf8WriteBuffer (StartAddress, Size, Buffer);
-}
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