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-rw-r--r--Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c
index 2bac0a5e34..96dd4f7e45 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c
@@ -1,7 +1,7 @@
/** @file
Reset Architectural Protocol implementation.
- Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -289,14 +289,14 @@ IntelScResetSystem (
switch (ResetType) {
case EfiResetWarm:
InitialData = V_RST_CNT_HARDSTARTSTATE;
- OutputData = mResetInstance->ResetSelect;
+ OutputData = V_RST_CNT_HARDRESET;
if (mResetInstance->ResetSelect == V_RST_CNT_FULLRESET) {
}
break;
case EfiResetCold:
InitialData = V_RST_CNT_HARDSTARTSTATE;
- OutputData = V_RST_CNT_HARDRESET;
+ OutputData = mResetInstance->ResetSelect;
break;
case EfiResetShutdown: