diff options
Diffstat (limited to 'UefiCpuPkg/Include/Register/Msr/CoreMsr.h')
| -rw-r--r-- | UefiCpuPkg/Include/Register/Msr/CoreMsr.h | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/UefiCpuPkg/Include/Register/Msr/CoreMsr.h b/UefiCpuPkg/Include/Register/Msr/CoreMsr.h index 0902aa94d4..4897c74d5a 100644 --- a/UefiCpuPkg/Include/Register/Msr/CoreMsr.h +++ b/UefiCpuPkg/Include/Register/Msr/CoreMsr.h @@ -6,7 +6,7 @@ returned is a single 32-bit or 64-bit value, then a data structure is not
provided for that MSR.
- Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -27,6 +27,22 @@ #include <Register/ArchitecturalMsr.h>
/**
+ Is Intel Core Solo and Intel Core Duo Processors?
+
+ @param DisplayFamily Display Family ID
+ @param DisplayModel Display Model ID
+
+ @retval TRUE Yes, it is.
+ @retval FALSE No, it isn't.
+**/
+#define IS_CORE_PROCESSOR(DisplayFamily, DisplayModel) \
+ (DisplayFamily == 0x06 && \
+ ( \
+ DisplayModel == 0x0E \
+ ) \
+ )
+
+/**
Unique. See Section 35.22, "MSRs in Pentium Processors," and see Table 35-2.
@param ECX MSR_CORE_P5_MC_ADDR (0x00000000)
|