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2016-09-08ArmPkg/ArmBaseLib: clean up directory structureArd Biesheuvel
For historical reasons, the files under ArmLib are split up into 'common' files under Common/, containing common C files as well as AArch64 and Arm specific asm files, and ArmV7 and AArch64 files under ArmV7/ and AArch64/, respectively. This presumably dates back to the time when ArmLib supported different revisions of the 32-bit architecture (i.e., pre-V7) Since the PI spec requires V7 or later, we can simplify this to Arm/ and AArch64, which aligns ArmLib with the majority of other modules that carry ARM or AArch64 specific code. So move the files around so that shared files live at the same level as ArmBaseLib.inf, and ARM/AArch64 specific files live in Arm/ or AArch64/, respectively. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-09-08ArmPkg/ArmBaseLib: remove MemoryAllocationLib.h includesArd Biesheuvel
The ArmBaseLib timer code does not depend on MemoryAllocationLib at all, so remove the #includes referring to it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-09-08Maintainers.txt: Add Giri as IntelFsp2*Pkg, IntelSiliconPkg maintainerJiewen Yao
Add Giri as 2nd maintainer to IntelFsp2*Pkg and IntelSiliconPkg. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Amy Chan <amy.chan@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08ArmPlatformPkg: remove EFI_MEMORY_UC attribute from normal memoryArd Biesheuvel
On ARM systems, mapping normal memory as device memory may have unintended side effects, given that unaligned accesses or loads and stores with special semantics (e.g., load/store exclusive) may fault or may not work as expected. Similarly, DC ZVA instructions are only supported on normal memory, not device memory. So remove the EFI_MEMORY_UC attribute that we set by default on system RAM. If any region requires this attribute, it is up to the driver to set this attribute, and to ensure that no offending operations are performed on it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-09-08ArmVirtPkg: restrict mapping attributes of normal memory to EFI_MEMORY_WBArd Biesheuvel
In general, on an ARM system, mapping normal memory as device memory may have unintended side effects, given that unaligned accesses or loads and stores with special semantics (e.g., load/store exclusive) may fault or may not work as expected. Under KVM, the situation is even worse, since the host may not expect the guest to perform uncached accesses, and so writes to such an uncached region may get lost completely. Since the only safe mapping type under KVM is EFI_MEMORY_WB, remove all other memory type attributes. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2016-09-08ArmPkg/ArmLib: remove all ArmLib flavors except ArmBaseLibArd Biesheuvel
This removes the following ArmLib implementation, which were, apart from the fact that they targeted either ARM or AARCH64, fully identical: ArmPkg/Library/ArmLib/AArch64/AArch64Lib.inf ArmPkg/Library/ArmLib/AArch64/AArch64LibPei.inf ArmPkg/Library/ArmLib/AArch64/AArch64LibPrePi.inf ArmPkg/Library/ArmLib/AArch64/AArch64LibSec.inf ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf ArmPkg/Library/ArmLib/ArmV7/ArmV7LibSec.inf Only ArmBaseLib remains, which can fulfil the dependencies upon each of the listed flavors. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-09-08ArmVirtPkg: replace all ArmLib resolutions with ArmBaseLibArd Biesheuvel
The various ArmLib flavors are identical in practice, and a new ArmBaseLib has been introduced that can replace all of them. So replace all occurrences with ArmBaseLib. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2016-09-08BeagleBoardPkg EmbeddedPkg Omap35xxPkg: move to ArmBaseLibArd Biesheuvel
The various ArmLib flavors are identical in practice, and a new ArmBaseLib has been introduced that can replace all of them. So replace all occurrences with ArmBaseLib. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-09-08ArmPkg/ArmLib: introduce ArmBaseLibArd Biesheuvel
Introduce a new ArmLib version ArmBaseLib, which encapsulates the ARM version ArmV7Lib and the AArch64 version AArch64Lib. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-09-08ArmPkg/ArmLib: remove NullArmLibArd Biesheuvel
Remove the NULL instance of ArmLib: it is not currently used, and its usefulness its dubious. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-09-08ArmPkg ArmPlatformPkg ArmVirtPkg: ARM GICv2/v3 Base Address width fix-upDennis Chen
According to the ACPI 6.0/6.1 spec, the physical base address of GICC, GICD, GICR and GIC ITS is 64-bit. So change the type of the various GIC base address PCDs to 64-bit, and fix up all users. Contributed-under: TianoCore Contribution Agreement 1.0 Cc: Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by: Dennis Chen <dennis.chen@arm.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
2016-09-08OvmfPkg/QemuBootOrderLib: drop too strict "/HD(" suffix from vblk prefixLaszlo Ersek
Translating QEMU's virtio-block OpenFirmware device path to a UEFI device path prefix was one of the earliest case handled in QemuBootOrderLib. At that time, I terminated the translation output (the UEFI devpath prefix) with a "/HD(" suffix. The intent was for the translation to prefix-match only boot options with HD() device path nodes in them, that is, no auto-generated "device level" boot options. This was motivated by prioritizing specific boot options created by OS installers over auto-generated "device level" options. However, practice has shown that: - OS installers place their installed boot options first in the boot order anyway, - other device types (SATA disks, virtio-scsi disks), where "/HD(" is not appended, work just fine, - requiring "/HD(" actually causes problems: after the OS-installed specific boot option has been lost (or purposely removed), the auto-generated "device level" boot option does the right thing (see the Default Boot Behavior under <http://blog.uncooperative.org/blog/2014/02/06/the-efi-system-partition/>). The "/HD(" requirement causes such boot options to be dropped, which prevents "fallback.efi" from running. Relax the matching by removing the "/HD(" suffix from the translated prefix. Cc: Jordan Justen <jordan.l.justen@intel.com> Fixes: e06a4cd134064590aa1a855ff4b973023279e805 Ref: https://bugzilla.redhat.com/show_bug.cgi?id=1373812 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-09-08BaseTools VfrCompile Pccts: Update GCC Flags to the specific one with BUILD_ ā†µLiming Gao
prefix This change is also applied to VfrCompile Pccts antlr and dlg tool. In V2, add the missing C rules. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2016-09-08BaseTools VfrCompile GNU makefile: Replace CXX with BUILD_CXXLiming Gao
The change is missing in VfrComile GNUmakefile. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2016-09-08BaseTools GNU makefile: remove unused .S ruleLiming Gao
Cc: Yonghong Zhu <yonghong.zhu@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2016-09-08BaseTools GNU makefile: Add BUILD_CXXFLAGS to align make built-in ruleLiming Gao
GNU make built-in rule to Compiling C++ programs with ā€˜$(CXX) $(CPPFLAGS) $(CXXFLAGS) -cā€™. To align to it, add empty BUILD_CXXFLAGS in cpp rule. Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Cc: Yonghong Zhu <yonghong.zhu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com> Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>
2016-09-08UefiCpuPkg/XeonPhiMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/XeonE7Msr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/XeonDMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/Xeon5600Msr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/SkylakeMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/SilvermontMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/SandyBridgeMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/PentiumMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/PentiumMMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/Pentium4Msr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/P6Msr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/NehalemMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/IvyBridgeMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/HaswellMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/HaswellEMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/CoreMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/Core2Msr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/BroadwellMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/AtomMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-08UefiCpuPkg/ArchitecturalMsr.h: add MSR reference from SDM in commentJeff Fan
Cc: Michael Kinney <michael.d.kinney@intel.com> Cc: Feng Tian <feng.tian@intel.com> Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan <jeff.fan@intel.com> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
2016-09-07ArmPkg/DefaultExceptionHandlerLib AARCH64: add minimal backtrace to crash dumpArd Biesheuvel
When dumping the CPU state after an unhandled fault, walk the stack frames and decode the return addresses so we can show a minimal backtrace. Unfortunately, we do not have sufficient information to show the function names, but at least we can see the modules and the return addresses inside the modules. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-09-07BaseTools/tools_def AARCH64: enable frame pointers for DEBUG buildsArd Biesheuvel
Enable frame pointers on DEBUG builds so we can support backtraces in crash dumps. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org> Tested-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-09-07ArmPlatformPkg/PrePi: fix secondary stack baseMichael Zimmermann
this bug was introduced by: d2fa09a ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Zimmermann <sigmaepsilon92@gmail.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
2016-09-07Vlv2TbltDevicePkg/dec: Correct wrong default value.Jiewen Yao
The default PcdPeiIchEhciControllerMemoryBaseAddress value 0xFD000000 conflict with the default TXE SECUMA MMIO address. So we update to 0xFC000000 to avoid conflict. Cc: David Wei <david.wei@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: David Wei <david.wei@intel.com>
2016-09-07Vlv2TbltDevicePkg/PlatformInitPei: Support USB initJiewen Yao
In order to support recovery in PEI phase, a platform need initialize USB controller. This logic is missing in current PchInitPeim. We removed MultiPlatformInfoInit() because it is already done in PlatformEarlyInitEntry(). We also initialize XhciMemBaseAddr to 0, or it is garbage value. Cc: David Wei <david.wei@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: David Wei <david.wei@intel.com>
2016-09-07NetworkPkg/DnsDxe: Handle CNAME type responded from the name serverJiaxin Wu
v2: * Code refine. * For DnsCache, the minimum value of TTL is selected between CNAME and A/AAAA record. According RFC 1034 - 3.6.2, if the query name is an alias, the name server will include the CNAME record in the response and restart the query at the domain name specified in the data field of the CNAME record. RFC also provides one example server action when A query received: Suppose a name server was processing a query with for USCISIC.ARPA, asking for type A information, and had the following resource records: USC-ISIC.ARPA IN CNAME C.ISI.EDU C.ISI.EDU IN A 10.0.0.52 Both of these RRs would be returned in the response to the type A query. Currently, DnsDxe driver doesn't handle the CNAME type response, which will cause any exception result. The driver need continue the packet parsing while CNAME type record parsed. So, this patch is used to handle it correctly. Cc: Hegde Nagaraj P <nagaraj-p.hegde@hpe.com> Cc: Fu Siyuan <siyuan.fu@intel.com> Cc: Ye Ting <ting.ye@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com> Reviewed-by: Fu Siyuan <siyuan.fu@intel.com> Tested-by: Hegde Nagaraj P <nagaraj-p.hegde@hpe.com>
2016-09-06ArmPkg/CompilerIntrinsicsLib: use Clang-compatible 'weak' attributeArd Biesheuvel
Clang does not like separate definitions for the __alias__ and the __weak__ attributes, so merge the definitions into one. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
2016-09-06ArmVirtPkg/FdtPciHostBridgeLib: enable 64-bit PCI DMAArd Biesheuvel
Now that the PCI root bridge driver and various host controller drivers have been fixed, remove the 4 GB limit on PCI DMA allocation for QEMU's ECAM PCI host bridge. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
2016-09-06MdeModulePkg/PciHostBridgeDxe: restrict 64-bit DMA to devices that support itArd Biesheuvel
Currently, the EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute is completely ignored by the PCI host bridge driver, which means that, on an implementation that supports DMA above 4 GB, allocations above 4 GB may be provided to devices that have not expressed support for it. So in addition to checking 'RootBridge->DmaAbove4G' to establish whether the root bridge itself supports DMA above 4 GB, we must also take into account the operation type (EfiPciOperationBusMaster{Read|Write|CommonBuffer}64), and the EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute, when mapping and allocating DMA memory, respectively. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Ruiyu Ni <Ruiyu.ni@intel.com>
2016-09-06MdeModulePkg/XhciDxe: enable 64-bit PCI DMAArd Biesheuvel
PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute if the controller supports 64-bit DMA addressing. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Feng Tian <feng.tian@Intel.com>
2016-09-06MdeModulePkg/SdMmcPciHcDxe: enable 64-bit PCI DMAArd Biesheuvel
PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute if the controller supports 64-bit DMA addressing. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Feng Tian <feng.tian@Intel.com>
2016-09-06MdeModulePkg/NvmExpressDxe: enable 64-bit PCI DMAArd Biesheuvel
PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute if the controller supports 64-bit DMA addressing. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Feng Tian <feng.tian@Intel.com>
2016-09-06MdeModulePkg/EhciDxe: enable 64-bit PCI DMAArd Biesheuvel
PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute if the controller supports 64-bit DMA addressing. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Feng Tian <feng.tian@Intel.com>
2016-09-06MdeModulePkg/AtaAtapiPassThru: enable 64-bit PCI DMAArd Biesheuvel
PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE attribute if the controller supports 64-bit DMA addressing. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Feng Tian <feng.tian@Intel.com>
generated by cgit v1.2.3 (git 2.25.1) at 2025-06-13 13:44:03 +0000