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We are going to reduce reserved memory consumption by page table buffer,
then OS can have more available memory to use.
Take PhysicalAddressBits = 48 and 2MB page granularity as example,
1:1 Virtual to Physical identity mapping page table buffer needs to be
((512 + 1) * 512 + 1) * 4096 = 1075843072 bytes = 0x40201000 bytes.
Current BootScriptExecutorDxe handles > 4G request by page fault because
S3ResumePeim only builds 4G page table when long mode waking vector is
not needed, but BootScriptExecutorDxe still assume the page table buffer for
page table is at 1:1 Virtual to Physical identity mapping.
To reduce reserved memory consumption, the code is updated to only use
8 extra pages to handles > 4G request by page fault.
Another, when both BIOS and OS wants long mode waking vector,
S3ResumePei should have established 1:1 Virtual to Physical identity mapping
page table for ACPI spec requirement, so no need to hook page fault handler.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18067 6f19259b-4bc3-4df7-8a09-765794883524
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defined as dynamic.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14896 6f19259b-4bc3-4df7-8a09-765794883524
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it has.
2. DxeMain will get Vector Handoff Table GUIDed HOB to install configuration table if it has.
3. Updated CPU Exception Handler Library to provide 3 new APIs to replace original one API and updated NULL instance accordingly.
4. Updated DxeMain/CapsuleX64/BootSriptExectorDxe to use the new API in CPU Exception Handler Lib.
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14884 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14062 6f19259b-4bc3-4df7-8a09-765794883524
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INTERRUPT_GATE_DESCRIPTOR.
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13948 6f19259b-4bc3-4df7-8a09-765794883524
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tip could override IDT entry for INT3.
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13640 6f19259b-4bc3-4df7-8a09-765794883524
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signed-off-by: jiewen.yao@intel.com
reviewed-by: eric.dong@intel.com
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13639 6f19259b-4bc3-4df7-8a09-765794883524
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improve S3 performance.
signed-off-by: jiewen.yao@intel.com
reviewed-by: rui.sun@intel.com
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13631 6f19259b-4bc3-4df7-8a09-765794883524
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handlers and add one NULL library instance.
2. Updated DXE Core, BootScriptExecutorDxe and CapsuleX64Pei to consume CPU Exception Library to setup the default CPU Exception handlers.
Signed-off-by: vanjeff
Reviewed-by: jyao1
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13097 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: jljusten
Reviewed-by: mdkinney
Reviewed-by: rsun3
Reviewed-by: jyao1
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12225 6f19259b-4bc3-4df7-8a09-765794883524
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