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The FVP_PLATFORM_TIMER_COUNT is the sum of the memory
mapped platform timers and the watchdog timers.
The watchdog timers can be disabled by setting the
FVP_WATCHDOG_COUNT (defined by PcdWatchdogCount)
to zero.
On the VExpress platform, if the FVP_WATCHDOG_COUNT is
set to zero, the FVP_PLATFORM_TIMER_COUNT is 1 as
VExpress has one memory mapped timer.
The code however incorrectly sets the platform timer
offset to zero in the GTDT. This causes the OS to read
the platform timer information from an invalid offset,
and may crash.
Updated the GTDT table to set the platform timer offset
to zero only when the FVP_PLATFORM_TIMER_COUNT is zero.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Reviewed-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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The correct load order for the NOR Flash driver and Runtime Variables
to work is as below:
1. Arm CPU Architecture Protocol Dxe
2. NOR Flash Dxe
3. Runtime Variable Dxe
NvVarStoreFormattedLib was recently introduced to resolve the dependency
order. This patch propagates the necessary changes for ARM VExpress
CTA15+A7 platform and also fixes the "Firmware Volume for Variable Store
is corrupted" error seen when the Flash is erased (or not formatted).
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Alexei Fedorov <alexei.fedorov@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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The correct load order for the NOR Flash driver and Runtime Variables
to work is as below:
1. Arm CPU Architecture Protocol Dxe
2. NOR Flash Dxe
3. Runtime Variable Dxe
NvVarStoreFormattedLib was recently introduced to resolve the dependency
order. This patch propagates the necessary changes for ARM FVP platform
and also fixes the "Firmware Volume for Variable Store is corrupted" error
seen when the Flash is erased (or not formatted).
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Alexei Fedorov <alexei.fedorov@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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The correct load order for the NOR Flash driver and Runtime Variables
to work is as below:
1. Arm CPU Architecture Protocol Dxe
2. NOR Flash Dxe
3. Runtime Variable Dxe
NvVarStoreFormattedLib was recently introduced to resolve the dependency
order. This patch propagates the necessary changes for ARM Juno platform
and also fixes the "Firmware Volume for Variable Store is corrupted" error
seen when the Flash is erased (or not formatted).
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Alexei Fedorov <alexei.fedorov@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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This change adds the HDLCD platform lib for the Juno plaform. This
library will be instantiated as a LcdPlatformLib to link with
LcdGraphicsOutputDxe for the Juno platform.
HDLCD platform library depends on the Arm SCMI DXE driver for
communication with the SCP for clock setting. Therefore this change also
enables building of Arm SCMI DXE driver for the Juno platform.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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This change adds a new Mailbox Transport Layer library for the Juno
platform. This library is required for ArmScmiDxe driver communication
with the SCP.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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This change adds LcdPlatformLib implementation for Arm Mali
DP500/DP500/DP650 display processors for models (with DP550 support).
NOTE: Versions for actual hardware are liable to require extra handling
for clock input changes, etc.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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The framebuffer memory is set with flag
EFI_MEMORY_WC (uncached, unbuffered) which causes framebuffer memory
with eXecute bit set. Framebuffer memory having executable bit
set is a security hazard. This fix adds EFI_MEMORY_XP flag to avoid this.
Unfortunately function gDS->SetMemorySpaceAttributes() causes assertion due
to unsupported EFI_MEMORY_XP type. Therefore this fix replaces
gDS->SetMemorySpaceAttributes() with Cpu->SetMemoryAttributes().
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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This change uses two PCDs, PcdArmLcdFrameBufferBase and
PcdArmLcdFrameBufferSize introduced in correspondiong EDK2 patch to
reserve framebuffer in DRAM if these values are defined in platform
specific DSC file, avoiding the need to allocate dynamically.
This allows the framebuffer to appear as "I/O memory" outside of the
normal RAM map, which is similar to the "VRAM" case.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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As per the UEFI specification(2.7) section 12.9, the GOP framebuffer
memory can be accessed in the pre-boot and the post boot phase (by OS)
Therefore the memory type EfiBootServicesData which may no longer exist
after ExitBootServices is incorrect for the framebuffer memory
allocation. Change EfiBootServicesData with EfiReservedMemoryType
so that allocated memory can be accessed in the post boot phase.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Current HDLCD and PL111 platform libraries do not support display modes
with PixelBlueGreenRedReserved8BitPerColor format, i.e. because of
historical confusion, they do not support the UEFI default
PixelBlueGreenRedReserved8BitPerColor
LcdPlatformLib for PL111, LcdPlatformQueryMode function returns the
pixel format as PixelRedGreenBlueReserved8BitPerColor which is wrong,
because that does not match the display controller's pixel format which
is set to BGR in PL111Lcd GOP driver.
Also it is not possible to configure pixel format as RGB/BGR for the
display modes for a platform at build time.
This change adds PcdGopPixelFormat to configure pixel format as
PixelRedGreenBlueReserved8BitPerColor or
PixelBlueGreenRedReserved8BitPerColor or
PixelBitMask.
With this change, pixel format can be selected in the platform specific
.dsc file for all supported display modes.
Support for PixelBitMask is not implemented in PL111 or HDLCD
GOP driver, hence HDLCD and PL111 platform libraries will return error
EFI_UNSUPPORTED if PcdGopPixelFormat is set to PixelBitMask.
Indeed, it is not clear what selecting PixelBitMask might mean, but
the option is allowed as it might suit a custom platform.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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The LcdPlatformGetTimings interface function takes similar sets of
multiple parameters for horizontal and vertical timings which can be
aggregated in a common data type. This change defines a structure
SCAN_TIMINGS for this which can be used to describe both horizontal and
vertical scan timings, and accordingly redefines the
LcdPlatformGetTiming interface, greatly reducing the amount of data
passed about.
Similarly the mode definition tables are also changed to use this data
type and thus enable pass through access.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Because of copy/paste effects, HdLcdArmVExpress.c contained a
table entry "LCD_BPP Bpp;" specifying the Bits per Pixel for each mode.
However, all modes are LCD_BITS_PER_PIXEL_24.
This change removes the table entry and related use of the field.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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None of the ArmPlatformSys* functions returns EFI_TIMEOUT. Hence checking
this in the do {} while loop in LcdPlatformSetMode is wrong. Therefore
remove this comparision and as a result remove the do {} while loop.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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This change replaces PcdGet32 with FixedPcdGet32 for the PCDs which
are defined as fixed PCDs.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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This minor change removes some unecessary initializations and variables
in PL111LcdArmVExpress.c and redudant return status checks in
HdLcdArmVExpress.c
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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This change adds some debug assertions e.g to catch NULL pointer errors
missing in PL11Lcd and HdLcd platform libraries.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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PCD PcdPL111LcdMaxMode is not used in HDLCD platform library.
Presence of this PCD in HDLCD is probably due to copy/paste code
from PL111 Lcd platform library. This change removes it from
the HdLcdArmVExpressLib.inf file.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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There is no functional modification in this change.
In this change some comments in HDLCD and PL111LCD platform library
code are modified and a few new comments are added. This is to
prevent mixing formatting changes with functional changes.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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There is no functional modification in this change
As preparation for further work, the formatting is corrected to meet
the EDKII coding standard.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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This change fixes incorrect MODULE_TYPE of HDLCD and PL111
LcdPlatformLibs. Currently set MODUL_TYPE DXE_DRIVER is incorrect
for these platform libraries. Hence set this to type BASE.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Girish Pathak <girish.pathak@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Turn off PcdHiiOsRuntimeSupport to fix hanging issue while enter
shell with some mellanox net cards.The option ROM of card loads an
empty interface to the gEfiHiiConfigAccessProtocolGuid.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Change DmaLib from NonCoherentDmaLib to CoherentDmaLib for support
cache consistency.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Wang Yue <wangyue41@huawei.com>
Signed-off-by: Ming Huang <ming.huang@linaro.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Sm750Dxe is a generic PCIe device driver for SM750 VGA device and it
is not necessary to maintain two different binary images for D03 and
D05 respectively.
This patch depends on another patch of unifying Sm750Dxe driver in
edk2-non-osi.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Signed-off-by: Yi Li <phoenix.liyi@huawei.com>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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We need to set PcdShellLibAutoInitialize to FALSE for
TftpDynamicCommand, or else we will get initialization failure when
loading TftpDynamicCommand module, for EFI Shell has not been started
at this moment.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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This adds SMBIOS tables to the DeveloperBox platform describing the
BIOS, system, enclosure, CPUs, caches, PCIe slots and system memory,
which almost amounts to the mandatory minimum as given by the SMBIOS
spec. Only the type 17 structures currently lack detailed information
about the DIMMs: the SPDs are on a I2C bus that is only accessible by
the SCP, and it currently does not share this information.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Expose a separate ACPI description of the SynQuacer eMMC controller
when both ACPI and eMMC support have been enabled in the HII menu.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
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Add the ACPI tables describing various parts of the SynQuacer SoC and
its peripherals, and the drivers to expose them to the EvalBoard and
DeveloperBox platforms.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
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According to the SBBR Specification (ARM DEN 0044B), Section 4.2.1.1
"Within the RSDP, the RsdtAddress field must be null (zero)
and the XsdtAddresss MUST be a valid, non-null, 64-bit value."
The PcdAcpiExposedTableVersions is used to indicate the ACPI versions
that are supported. The default value for PcdAcpiExposedTableVersions
is 0x3E which indicates that the ACPI versions 1.0B and above are
supported.
For ACPI 1.0B the RSDT pointer is set in the RSDP table. However for
ACPI versions greater than ACPI 1.0B the AcpiTableDxe populates
the RSDP with the RSDT address set to NULL.
Therefore set the PcdAcpiExposedTableVersions to 0x20 indicating
support for ACPI 5.0 and above.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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Linaro and RDK are working on standardizing the boot process for RDK
STB boxes using Uefi. Implemented couple of RDK UEFI apllications
(secure boot and DRI) which are tested on RDK Qemu platform
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Moorthy Baskaravenkatraman <moorthy.baskaravenkatraman-sambamoorthy@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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Application will Download platform code Image (kernel + DTB + rootfs)
and writes into Flash partition.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Moorthy Baskaravenkatraman <moorthy.baskaravenkatraman-sambamoorthy@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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Application will get file path of PK key and KEK keys using rdk.conf file,
once keys are available, application will enable secure boot and validates
the signed kernel Image.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Moorthy Baskaravenkatraman <moorthy.baskaravenkatraman-sambamoorthy@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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Implemented features related to secure boot and DRI (downloading the image
and storing on flash), library has utility of file read and write operations
for fat flash partition, it reads file path and load the file content
using configuration file.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Moorthy Baskaravenkatraman <moorthy.baskaravenkatraman-sambamoorthy@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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The Designware PCIe IP in the SynQuacer SoC needs a little help to
appear sane to the OS. Not only does it lack a true root port, and
therefore does not perform any filtering whatsoever of type 0 config
TLPs that are not intended for the link peer, it also has trouble
issuing 64-bit wide MMIO accesses, which are often used on MMIO BARs
with memory semantics (e.g., frame buffers).
So let's create a stage 2 mapping covering the entire physical address
space, and remap some ECAM regions and demote write combine attributes
to device/strongly ordered. This is not a water tight fix, but it does
work around the issues in the majority of cases.
(Note that the ECAM remapping can also be addressed in the SMMU mapping
of the PCIe IP exposed to the CPU, but this is currently under
development, and it does not hurt to have it in two places)
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Even though the Secure96 device tree source is strictly an overlay, we
managed to express it in a way that does not rely on unresolved symbols
and other tricks that are only implemented in fairly recent versions of
the device tree compiler, and so adding the /plugin/ directive is not
only unnecessary, it is harmful because it is only understood by those
same recent compiler versions. So remove it.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Commit 4bf95a9f361e ("MdeModulePkg/ResetSystemRuntimeDxe: Add more
debug message") broke the DEBUG build for all platforms that rely on
MMIO mapped UART devices, since it introduces a DEBUG() print that
may trigger at runtime, at which such UART devices are usually not
mapped, resulting in an OS crash.
Given that this mostly only affects ARM and AARCH64, it is not unlikely
that similar inadvertent breakage will occur again in the future, so
let's fix this once and for all by switching affected platforms to the
new DxeRuntimeDebugLibSerialPort DebugLib implementation that takes care
not to touch the UART hardware after ExitBootServices().
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Wire up the various drivers for the 96Boards LS connector and the
optional Secure96 mezzanine board.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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This adds a driver that manages the 96Boards LS connector, i.e, it
installs a HII page to configure the type of mezzanine that is installed
in the slot, and it exposes this information via the LS connector protocol.
It is also in charge of applying the overlay to the platform device tree
at end of DXE.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Add a driver that describes the Secure96 mezzanine board, and exposes
both the information required to describe it to the OS using a DT overlay,
and to describe it to UEFI itself.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Introduce a protocol describing the presence of a 96boards low speed (LS)
connector, and identifying the type of mezzanine that has been installed.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Implement a I2C DXE driver that wires up the I2C devices exposed by
a 96boards mezzanine into the EDK2 I2C stack. Note that this requires
the platform to identify its I2C master implementations using special
GUIDs-as-protocols. It also assumes [for now] that I2C buses are not
shared between the 96boards connector and other platform peripherals.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Introduce the mezzanine protocol and the 96Boards package defining
the PCDs and GUIDs that may be used by implementations of the
protocol.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Add skeleton of HiKey960 platform.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Use common file Hisilicon.dsc.inc/Hisilicon.fdf.inc to reduce
redundant contents in both HiKey.dsc and HiKey.fdf.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Dw8250SerialPortRuntimeLib only exists in D02.
DebugLib isn't necessary on HiKey platform. So add CONFIG_NO_DEBUGLIB
on it.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Include DxePcdLib for HiiDatabase. Otherwise, PlatformBootManager
can't be launched successfully.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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edk2 commit 1ec2e7d0e8db
("MdeModulePkg/DxeCapsuleLibFmp: Use BmpSupportLib") broke the build of
all platforms that include DxeCapsuleLibFmp, since none of them included
a BmpSupportLib (added as part of the same series).
BmpSupportLib itself depends on SafeIntLib, so add the two libraries to
all affected platforms.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>
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Due to copy-paste error, both d03 and d05 ended up with capsule sections
named Capsule.StyxFirmwareUpdateCapsuleFmpPkcs7 in their .fdf files.
Change these to the actual platform names.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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PcdCacheEnabled was never useful for these platforms, but it was
copied over from other platforms used as templates.
Delete it here to keep the platforms building once the Pcd is removed
from EmbeddedPkg.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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PcdCacheEnabled does nothing useful for these platforms.
Delete all uses of it here to keep the platforms building once the Pcd is
removed from EmbeddedPkg.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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