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Remove unused ArmPlatformPkg PCDs from all platform descriptions.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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The function ArmPlatformInitializeSystemMemory () has been removed from
ArmPlatformLib, so remove all the [empty] implementations provided by
the various platforms.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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EDK2 changed the tftp shell command from a library to a
dynamic command. Update configuration files to reflect this.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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The function ArmGetCpuCountPerCluster () was moved out of ArmPlatformLib
because it was unused (except internally by one of the implementations)
So remove the remaining implementations from edk2-platforms.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Switch to the new version of PL011UartLib which supersedes the one
residing in Drivers/ inappropriately.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Remove all gEmbeddedTokenSpaceGuid.PcdEmbeddedPrompt assignments, which
are no longer meaningful with EBL removed.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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No drivers actually use PL35xSmcLib so remove any resolutions for it.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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None of these platforms still include EBL, but some references
remained to its support libraries. Get rid of that.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Remove false copy-pasted dependencies on various VExpress support
libraries.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Remove copy-pasted ArmTrustedMonitorLib library class resolutions
that none of the platforms actually need.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Remove copy-pasted ArmPlatformSecExtraActionLib library class resolutions
that none of the platforms actually need.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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When building with a somewhat recent toolchain (GCC 6.3), the D02
platform fails due to (the implicit) -Werror=misleading-indentation.
Cc: Heyi Guo <heyi.guo@linaro.org>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
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Assign valid value to AddressTranslationOffset to support
address translation between domains of CPU and PCIe, which
is need by GOP to enable frame buffer.
This patch fix the bug:
Kernel (4.12, without the vga driver) boot hang with kernel panic
while kernel accesses UEFI GOP frame buffer.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Yan Zhang <zhangyan81@huawei.com>
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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1. Because Hi161x chip doesn't support "ARI Forwarding Enable"
function, BIOS will enumerate 32 same devices (Device Number 0~31)
when a Non-ARI capable device attached in the RP. Hi161x chip will
not fix it, need BIOS patch.
2. Just enlarge iatu for those root port with ARI capable device
attached, Non-ARI capable device's RP, keep iatu limitation.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jason zhang <zhangjinsong2@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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1. Disable I2C0 device avoiding access conflict in OS, for it is used
by UEFI to access DS3231 RTC chip and provide time services;
2. Modify _HID of I2C2 for matching the string in OS driver;
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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There is no interface from SAS0 or SAS2 controller on D05,
so SAS0 and SAS2 can't be used.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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The PerTuning function is not stable, it will cause the
LSI SAS 3008/3108 crash, disable this function first.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Chenhui Sun <chenhui.sun@linaro.org>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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On D05 PCIe now, 2p NA PCIe2 and 2p NB PCIe0's pci domain addresses are
0x20000000 and 0x30000000 based. These addresses overlap with the DDR
memory range 0-1G. In this situation, on the inbound direction, our pcie
will drop the DDR address access that are located in the pci range window
and lead to a dataflow error.
Modify 2p NA PCIe2 and 2p NB PCIe0's pci domain addresses to 0x40000000
and decrease PciRegion Size accordingly.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Graeme Gregory <graeme.gregory@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Io BAR should be based IoBase and Mem BAR should be based PciRegionBase.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ming Huang <huangming23@huawei.com>
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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The drivers build from separate sources, their GUID should
be different.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Remove the shared ArmDmaLib resolution from the shared .dsc include
file: it will be removed soon from upstream EDK2. Instead, replace
it with an explicit NonCoherentDmaLib resolution for each driver that
depends on DmaLib. This makes it more obvious which peripherals are
non cache coherent, and forces derived platforms to choose a DmaLib
resolution explicitly for newly added drivers.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Replace the open coded PCI 'emulation' with a simple call into
the NonDiscoverable device registration library, and fix up all
platform .DSCs/FDFs accordingly.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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This driver does not actually use UncachedMemoryAllocationLib anymore,
so remove the bogus reference.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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Imported from commit efd798c1eb of
https://git.linaro.org/uefi/OpenPlatformPkg.git
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Leif Lindholm <leif.lindholm@linaro.org>
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