Age | Commit message (Collapse) | Author |
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CpuExceptionHandlerLib has code that contains absolute relocations, not supported by
Xcode for X64, and it then copies this code to an alternate location in memory. It is
very hard to write IP relative self-modifiying code. I had to update AsmVectorNumFixup()
to also patch in the absolute addressess after the code was copied.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Anderw Fish <afish@apple.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16068 6f19259b-4bc3-4df7-8a09-765794883524
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Module UNI and Package UNI files are not DOS format. Convert them to DOS format.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16047 6f19259b-4bc3-4df7-8a09-765794883524
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5. Add PACKAGE_UNI_FILE UNI file that contains the localized Abstract and Description of a package and localized strings associated with PCDs.
a. Addresses an information gap between DEC files and the UEFI Distribution Packaging Specification XML schema
b. There will be an associated update to UPT in BaseTools to consume PACKAGE_UNI_FILE and associated UNI file during UDP creation that performs the DEC -> XML conversion.
c. There will be an associated update to UPT in BaseTools to produce PACKAGE_UNI_FILE and associated UNI file during UDP installation that performs the XML -> DEC conversion.
6. Add Package Extra UNI file that provides the localized Name of a package.
a. [UserExtensions.TianoCore."ExtraFiles"] provides an easy method for a package to specify extra files to be added to a UDP without having to list the files in the UPT package information data file.
b. There will be an associated update to UPT in BaseTools to package up files listed in [UserExtensions.TianoCore."ExtraFiles"] during UDP creation.
c. UNI file contains localized name of a package to go along with the localized Abstract and Description from the PACKAGE_UNI_FILE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15936 6f19259b-4bc3-4df7-8a09-765794883524
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4. PCD information in DEC file comment blocks are either incomplete or incorrect.
This includes detailed description, @Prompt, @ValidRange, @ValidList, @Expression, and [Error.<TokenSpaceGuid>] validation error messages.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15935 6f19259b-4bc3-4df7-8a09-765794883524
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2. Add MODULE_UNI_FILE file that contains the localized Abstract and Description of a module.
a. Addresses an information gap between INF files and the UEFI Distribution Packaging Specification XML schema
b. There will be an associated update to UPT in BaseTools to consume MODULE_UNI_FILE and associated UNI file during UDP creation that performs the INF -> XML conversion.
c. There will be an associated update to UPT in BaseTools to produce MODULE_UNI_FILE and associated UNI file during UDP installation that performs the XML -> INF conversion.
3. Add Module Extra UNI file that provides the localized Name of a module.
a. [UserExtensions.TianoCore."ExtraFiles"] provides an easy method for a module to specify extra files not listed in [Sources] or [Binaries] sections to be added to a UDP without having to list the files in the UPT package information data file.
b. There will be an associated update to UPT in BaseTools to package up files listed in [UserExtensions.TianoCore."ExtraFiles"] during UDP creation.
c. UNI file contains localized name of a module to go along with the localized Abstract and Description from the MODULE_UNI_FILE.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15934 6f19259b-4bc3-4df7-8a09-765794883524
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1. Usage information in INF file comment blocks are either incomplete or incorrect.
This includes usage information for Protocols/PPIs/GUIDs/PCDs/HOBs/Events/BootModes.
The syntax for usage information in comment blocks is defined in the EDK II Module Information (INF) Specification
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15933 6f19259b-4bc3-4df7-8a09-765794883524
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We strongly prefer that contribtions be offered using the same license
as the project/module. But, we should document other acceptable
licenses for contributions.
This will allow package owners to more easily know if they can accept
a contribution under a different source license.
NOTE: This does not modify the wording of the "TianoCore Contribution
Agreement 1.0" section
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Mark Doran <mark.doran@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15892 6f19259b-4bc3-4df7-8a09-765794883524
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buffer overflow.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu Shumin <shumin.qiu@intel.com>
Reviewed-by: Tian Feng <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15862 6f19259b-4bc3-4df7-8a09-765794883524
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This implements the older VTF ResetVector code often used on EDK II
IA32 & X64 platforms.
This VTF requires build time fixups in order to find the SEC entry
point. The BaseTools GenFv tool has code that patches the jump target
of the reset vector code to match the entry point of the SEC image in
the PEI Firmware Volume.
v2:
* Rename from OldVtf to FixupVtf
* Use EDK II extension of .nasmb rather than .nasmbin
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15826 6f19259b-4bc3-4df7-8a09-765794883524
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Previously, we would build the page tables in
Tools/FixupForRawSection.py.
In order to let NASM build VTF0 from source during the EDK II build
process, we need to move this into the VTF0 NASM code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15822 6f19259b-4bc3-4df7-8a09-765794883524
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Using NASM we build VTF0 as part of the EDK II build process.
v2:
* Use EDK II extension of .nasmb rather than .nasmbin
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15821 6f19259b-4bc3-4df7-8a09-765794883524
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sending IPI. It could be fix the interrupted issue between ICR high/low writes by SMI handler.
2. Save/restore CPU Interrupt state around sending IPI. It could avoid sending IPI be interrupted by CPU interrupt handler.
3. Add note for SetApicMode() API that must not be called from an interrupt handler or SMI handler.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Kinney, Michael <michael.d.kinney@intel.com>
Reviewed-by: Mudusuru, Giri <giri.p.mudusuru@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15652 6f19259b-4bc3-4df7-8a09-765794883524
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value after sending out INIT IPI instead of hard code 10 MicroSeconds.
Its default value is 10 millisecond per IA32 manual.
Platform could customize this PCD value for performance requirement.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Kinney, Michael <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15650 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15642 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15602 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gao, Liming <liming.gao@intel.com>
Reviewed-by: Zeng, Star <star.zeng@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15582 6f19259b-4bc3-4df7-8a09-765794883524
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Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15193 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Tian, Hot <hot.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15162 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15086 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Hot Tian <hot.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15079 6f19259b-4bc3-4df7-8a09-765794883524
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GetMemoryCacheTypeFromMtrrType () should return the default memory type instead of UC type for MTRR_CACHE_INVALID_TYPE.
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15053 6f19259b-4bc3-4df7-8a09-765794883524
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2. mEnabledInterruptNum is total enabled interrupt number, InterruptType should less than mEnabledInterruptNum.
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15012 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Hesheng Chen <hesheng.chen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14978 6f19259b-4bc3-4df7-8a09-765794883524
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S3RestoreConfig2() can optionally stack-switch to the SMM S3 Resume Entry
Point and ask it to transfer to S3ResumeExecuteBootScript().
Similarly, S3ResumeExecuteBootScript() stack-switches explicitly to the
boot script executor, and asks it to transfer to S3ResumeBootOs().
Currently the stack pointers specified for the SMM S3 Resume Entry Point
and the boot script executor to use for returning are derived from
addresses of the first local variables in S3RestoreConfig2() and
S3ResumeExecuteBootScript(), respectively.
Since (theoretically) the stack grows down as local variables are defined
and functions are called, the idea is presumably to allow the respective
callee to overwrite the caller's local variables. (The callees in
question can never return normally, only by explicit stack switching.)
Taking the address of "Status" is less portable than optimal however.
Compilers are free to juggle local variables at build time as they
please, including order and alignment on the stack. For example, when the
code is built for 64-bit PEI with gcc-4.8.2, the address of "Status"
trips up the alignment assertion in SwitchStack().
Let's align the address of "Status" down to CPU_STACK_ALIGNMENT
explicitly. If a compiler ensures such alignment and places "Status" at
the highest address automatically, then this change has no effect.
Otherwise, we'll prepare ReturnStackPointer values that (a) are correctly
aligned, (b) preserve the same amount or more (but never less) from the
caller's local variables than before, which should be safe.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed by: Jiewen Yao <Jiewen.Yao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14977 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14961 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14934 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14922 6f19259b-4bc3-4df7-8a09-765794883524
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UINIXGCC IA32 build issue:
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14921 6f19259b-4bc3-4df7-8a09-765794883524
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mDoFarReturnFlag and mErrorCodeFlag to avoid page fault with big RAM sizes (> 2GB).
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14920 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14898 6f19259b-4bc3-4df7-8a09-765794883524
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DxeCpuExceptionHandlerLib.inf and SmmCpuExceptionHandlerLib.inf.
2. Updated CPU Exception Handler Library instance according to the new CPU Exception Handler Library class definitions.
3. Updated CPU Exception Handler Library instance to handle the vector attributes defined in PI 1.2.1.
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Hot Tian <hot.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14885 6f19259b-4bc3-4df7-8a09-765794883524
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these are marked as DEBUG_ERROR when they are really not errors.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Samer El-Haj-Mahmoud <samer.el-haj-mahmoud@hp.com>
reviewed-by: Fan, Jeff <jeff.fan@intel.com>
reviewed-by: Tian, Feng <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14750 6f19259b-4bc3-4df7-8a09-765794883524
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Now, Transition32FlatTo64Flat calls SetCr3ForPageTables64
which is located in Ia32/PageTables64.asm.
This change is required so OVMF can replace the code in
Ia32/PageTables64.asm with code that generates page tables in
RAM.
Note: Since this change does not impact the functionality of the
current VTF0 binaries, they are not being updated. The resulting
new binaries were tested to verify there is no regression.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14714 6f19259b-4bc3-4df7-8a09-765794883524
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2. Read CPU APIC ID from CPUID leaf B in case CPU Init APIC ID is larger 255 in XAPIC mode.
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14674 6f19259b-4bc3-4df7-8a09-765794883524
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to handle the long delay that timer initial count.
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14604 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14122 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Li Elvin <elvin.li@intel.com>
Reviewed-by: Yao Jiewen <jiewen.yao@intel.com>
Reviewed-by: Ni Ruiyu <ruiyu.ni@intel.com>
Reviewed-by: Gao Liming <liming.gao@intel.com>
Reviewed-by: Tian Feng <feng.tian@intel.com>
Reviewed-by: Fan Jeff <jeff.fan@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13892 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Qian Ouyang <qian.ouyang@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13817 6f19259b-4bc3-4df7-8a09-765794883524
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signed-off-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13815 6f19259b-4bc3-4df7-8a09-765794883524
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the CPU interrupt after programming MTRR setting.
signed-off-by: Kinney, Michael D <michael.d.kinney@intel.com>
reviewed-by: Bjorge, Erik C <erik.c.bjorge@intel.com>
reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13749 6f19259b-4bc3-4df7-8a09-765794883524
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signed-off-by: Jeff Fan <jeff.fan@intel.com>
reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13709 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Sun Rui <rui.sun@intel.com>
Reviewed-by: Gao Liming <liming.gao@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13686 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13684 6f19259b-4bc3-4df7-8a09-765794883524
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Local APIC library.
2. Updated Local APIC library instances to get Local APIC base Address by invoking GetLocalApicBaseAddress() instead of by PCD PcdCpuLocalApicBaseAddress.
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Kinney Michael D <michael.d.kinney@intel.com>
Reviewed-by: Rui Sun <rui.sun@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13668 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Rui Sun <rui.sun@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13667 6f19259b-4bc3-4df7-8a09-765794883524
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Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13649 6f19259b-4bc3-4df7-8a09-765794883524
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improve S3 performance.
signed-off-by: jiewen.yao@intel.com
reviewed-by: rui.sun@intel.com
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13631 6f19259b-4bc3-4df7-8a09-765794883524
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locating SmmAccess PPI in S3Resume S3ResumeExecuteBootScript(), and locate SmmAccess PPI and Open SMRAM region only when gEfiAcpiVariableGuid HOB is found in S3Resume S3RestoreConfig2().
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13592 6f19259b-4bc3-4df7-8a09-765794883524
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initialize X87 FPU Control Word for BSP.
For a platform tip with 32-bit PEI+64-bit DXE, InitializeFloatingPointUnits () should be called for BSP in the DXE phase.
Signed-off-by: Sun Rui <rui.sun@intel.com>
Reviewed-by: Fan Jeff <jeff.fan@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13511 6f19259b-4bc3-4df7-8a09-765794883524
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Control Word for x64 arch from 0x27f to 0x37f per UEFI 2.3.1c spec.
Signed-off-by: Sun Rui <rui.sun@intel.com>
Reviewed-by: Fan Jeff <jeff.fan@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13506 6f19259b-4bc3-4df7-8a09-765794883524
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