1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
|
#
# Copyright (c) 2014, ARM Limited. All rights reserved.
#
# This program and the accompanying materials are licensed and made available
# under the terms and conditions of the BSD License which accompanies this
# distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#include <AsmMacroIoLib.h>
#include <Library/ArmLib.h>
// For the moment we assume this will run in SVC mode on ARMv7
.text
.align 2
GCC_ASM_EXPORT(ArmGicV3GetControlSystemRegisterEnable)
GCC_ASM_EXPORT(ArmGicV3SetControlSystemRegisterEnable)
GCC_ASM_EXPORT(ArmGicV3EnableInterruptInterface)
GCC_ASM_EXPORT(ArmGicV3DisableInterruptInterface)
GCC_ASM_EXPORT(ArmGicV3EndOfInterrupt)
GCC_ASM_EXPORT(ArmGicV3AcknowledgeInterrupt)
GCC_ASM_EXPORT(ArmGicV3SetPriorityMask)
GCC_ASM_EXPORT(ArmGicV3SetBinaryPointer)
//UINT32
//EFIAPI
//ArmGicGetControlSystemRegisterEnable (
// VOID
// );
ASM_PFX(ArmGicV3GetControlSystemRegisterEnable):
mrc p15, 0, r0, c12, c12, 5 // ICC_SRE
bx lr
//VOID
//EFIAPI
//ArmGicSetControlSystemRegisterEnable (
// IN UINT32 ControlSystemRegisterEnable
// );
ASM_PFX(ArmGicV3SetControlSystemRegisterEnable):
mcr p15, 0, r0, c12, c12, 5 // ICC_SRE
isb
bx lr
//VOID
//ArmGicV3EnableInterruptInterface (
// VOID
// );
ASM_PFX(ArmGicV3EnableInterruptInterface):
mov r0, #1
mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1
bx lr
//VOID
//ArmGicV3DisableInterruptInterface (
// VOID
// );
ASM_PFX(ArmGicV3DisableInterruptInterface):
mov r0, #0
mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1
bx lr
//VOID
//ArmGicV3EndOfInterrupt (
// IN UINTN InterruptId
// );
ASM_PFX(ArmGicV3EndOfInterrupt):
mcr p15, 0, r0, c12, c12, 1 //ICC_EOIR1
bx lr
//UINTN
//ArmGicV3AcknowledgeInterrupt (
// VOID
// );
ASM_PFX(ArmGicV3AcknowledgeInterrupt):
mrc p15, 0, r0, c12, c8, 0 //ICC_IAR1
bx lr
//VOID
//ArmGicV3SetPriorityMask (
// IN UINTN Priority
// );
ASM_PFX(ArmGicV3SetPriorityMask):
mcr p15, 0, r0, c4, c6, 0 //ICC_PMR
bx lr
//VOID
//ArmGicV3SetBinaryPointer (
// IN UINTN BinaryPoint
// );
ASM_PFX(ArmGicV3SetBinaryPointer):
mcr p15, 0, r0, c12, c12, 3 //ICC_BPR1
bx lr
|
