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Porting UEFI to a ARM platform :
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1. Create the new platform directory under ArmPlatformPkg
2. Create its DSC and FDF files into this new directory. These files can be copied from ArmVExpress-CTA9x4.dsc and ArmVExpress-CTA9x4.fdf; and adapted following the requirement of your platform.
3. Set up the PCDs required by ArmPlatformPkg in your FDF or DSC files
4. Implement 'ArmPlatformLib' for your platform following the interface defined by ArmPlatformPkg\Include\Library\ArmPlatformLib.h.
PCDs Description :
-------------------
# Firmware Device / Volume
gArmTokenSpaceGuid.PcdSecureFdBaseAddress : Base address of your Secure Firmware Device
gArmTokenSpaceGuid.PcdSecureFdSize : Size in byte of your Secure Firmware Device.
gArmTokenSpaceGuid.PcdFdBaseAddress : Base Address of your Non-Secure/Normal World Firmware Device.
gArmTokenSpaceGuid.PcdFdSize : Size in bytes of your Non-Secure/Normal World Firmware Device
# Stacks
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase : Base of Secure Stack for Secure World
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize : Size of the stack for the Primary Core in Secure World
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize : Size of the stack for the Secondary Cores in Secure World
gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase : Base of Stack for Monitor World
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize : Size of the stack for each cores
gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase : Base of SEC Stack for Normal World
gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize : Size of the stack for the Primary Core
gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize : Size of the stack for the Secondary Core
# CPU / Architectural controllers
gArmTokenSpaceGuid.PcdGicDistributorBase : Base address of the Distributor of your General Interrupt Controller
gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase : Base address of the Interface of your General Interrupt Controller
# Memory Regions
gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize : Size of the region reserve for PI & UEFI
gArmTokenSpaceGuid.PcdSystemMemoryBase : Base Address of the System Memory (DRAM)
gArmTokenSpaceGuid.PcdSystemMemorySize : Size of the System Memory (DRAM)
# Features
gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec : TRUE if System Memory initialized by the SEC phase
gArmPlatformTokenSpaceGuid.PcdSendSgiToBringUpSecondaryCores : TRUE if the PrePi or PrePeiCore modules have to send an SGI to resume the excution of the secondary cores
# Boot Manager
gArmPlatformTokenSpaceGuid.PcdDefaultBootDescription : Description of the Default Boot Entry
gArmPlatformTokenSpaceGuid.PcdDefaultBootDevicePath : DevicePath of the Default Boot Entry
gArmPlatformTokenSpaceGuid.PcdDefaultBootArgument : Argument for the Default Boot Entry
gArmPlatformTokenSpaceGuid.PcdDefaultBootType : Define the binary type of the Default Boot Entry (0=EFI application, 1=Linux kernel with ATAG support, 2=Linux Kernel with FDT support)
gArmPlatformTokenSpaceGuid.PcdPlatformBootTimeOut : Timeout before booting on the Device Boot entry (by default the auto boot is skipped)
gArmPlatformTokenSpaceGuid.PcdDefaultConInPaths : List of Device Path use for the Console Input
gArmPlatformTokenSpaceGuid.PcdDefaultConOutPaths : List of Device Path use for the Console Output
FAQ :
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# When to use PrePi or PrePeiCore ?
- PrePi: when the memory has already been initialized by the first stage boot loader
Boot sequence: PlatformFirmware/PrePi/Dxe/Bds
Example: Beagle Board
- PrePeiCore: when the firmware is started from XIP memory and in Secure world. The PeiCore shadows the firmware itself in System Memory (DRAM)
Boot sequence: Sec/PrePiCore/PeiCore/Dxe/Bds
Example: ARM Versatile Express
See:
- ArmPlatformPkg/Documentation/ARM-EDK2-Overview.png
- ArmPlatformPkg/Documentation/ArmPlatformLib-Full-Boot.png
- ArmPlatformPkg/Documentation/ArmPlatformLib-2nd-Stage.png
# What is the PcdStandalone
gArmPlatformTokenSpaceGuid.PcdStandalone=FALSE is used on ARM Development Platforms during the development stage.
To avoid to reflash the NOR Flash after each build, the SEC (in NOR Flash) intializes thd DRAM and wait until the Normal World firmware is copied into the DRAM.
Copying the firmware in DRAM is much faster than reflashing the NOR Flash. It is also more convenient to debug the firmware form DRAM than NOR Flash (eg: use of software breakpoint)
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