1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
|
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
#
#include <AsmMacroIoLibV8.h>
#include <Base.h>
#include <Library/ArmLib.h>
#include <Library/PcdLib.h>
#include <AutoGen.h>
.text
.align 2
GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
GCC_ASM_EXPORT(ArmGetPhysAddrTop)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
.LArm64LinuxMagic:
.byte 0x41, 0x52, 0x4d, 0x64
// VOID
// ArmPlatformPeiBootAction (
// VOID *DeviceTreeBaseAddress, // passed by loader in x0
// VOID *ImageBase // passed by FDF trampoline in x1
// );
ASM_PFX(ArmPlatformPeiBootAction):
//
// If we are booting from RAM using the Linux kernel boot protocol, x0 will
// point to the DTB image in memory. Otherwise, use the default value defined
// by the platform.
//
cbnz x0, 0f
ldr x0, PcdGet64 (PcdDeviceTreeInitialBaseAddress)
0:mov x29, x30 // preserve LR
mov x28, x0 // preserve DTB pointer
mov x27, x1 // preserve base of image pointer
//
// The base of the runtime image has been preserved in x1. Check whether
// the expected magic number can be found in the header.
//
ldr w8, .LArm64LinuxMagic
ldr w9, [x1, #0x38]
cmp w8, w9
bne .Lout
//
//
// OK, so far so good. We have confirmed that we likely have a DTB and are
// booting via the arm64 Linux boot protocol. Update the base-of-image PCD
// to the actual relocated value, and add the shift of PcdFdBaseAddress to
// PcdFvBaseAddress as well
//
adr x8, PcdGet64 (PcdFdBaseAddress)
adr x9, PcdGet64 (PcdFvBaseAddress)
ldr x6, [x8]
ldr x7, [x9]
sub x7, x7, x6
add x7, x7, x1
str x1, [x8]
str x7, [x9]
//
// Discover the memory size and offset from the DTB, and record in the
// respective PCDs. This will also return false if a corrupt DTB is
// encountered. Since we are calling a C function, use the window at the
// beginning of the FD image as a temp stack.
//
adr x1, PcdGet64 (PcdSystemMemorySize)
adr x2, PcdGet64 (PcdSystemMemoryBase)
mov sp, x7
bl FindMemnode
cbz x0, .Lout
//
// Copy the DTB to the slack space right after the 64 byte arm64/Linux style
// image header at the base of this image (defined in the FDF), and record the
// pointer in PcdDeviceTreeInitialBaseAddress.
//
adr x8, PcdGet64 (PcdDeviceTreeInitialBaseAddress)
add x27, x27, #0x40
str x27, [x8]
mov x0, x27
mov x1, x28
bl CopyFdt
.Lout:
ret x29
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
ldrh w0, [x0]
ret
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
ASM_PFX(ArmPlatformIsPrimaryCore):
mov x0, #1
ret
//UINTN
//ArmPlatformGetCorePosition (
// IN UINTN MpId
// );
// With this function: CorePos = (ClusterId * 4) + CoreId
ASM_PFX(ArmPlatformGetCorePosition):
and x1, x0, #ARM_CORE_MASK
and x0, x0, #ARM_CLUSTER_MASK
add x0, x1, x0, LSR #6
ret
//EFI_PHYSICAL_ADDRESS
//GetPhysAddrTop (
// VOID
// );
ASM_PFX(ArmGetPhysAddrTop):
mrs x0, id_aa64mmfr0_el1
adr x1, .LPARanges
and x0, x0, #7
ldrb w1, [x1, x0]
mov x0, #1
lsl x0, x0, x1
ret
//
// Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the
// physical address space support on this CPU:
// 0 == 32 bits, 1 == 36 bits, etc etc
// 6 and 7 are reserved
//
.LPARanges:
.byte 32, 36, 40, 42, 44, 48, -1, -1
ASM_FUNCTION_REMOVE_IF_UNREFERENCED
|
