1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
|
;; @file
; This is the code that supports MP.
;
; Copyright (c) 1999 - 2015, Intel Corporation. All rights reserved.<BR>
;
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php.
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;;
page ,132
title MP ASSEMBLY HOOKS
.686p
.model flat
.data
.stack
.code
.MMX
.XMM
_MpMtrrSynchUpEntry PROC NEAR PUBLIC
;
; Enter no fill cache mode, CD=1(Bit30), NW=0 (Bit29)
;
mov eax, cr0
and eax, 0DFFFFFFFh
or eax, 040000000h
mov cr0, eax
;
; Flush cache
;
wbinvd
;
; Clear PGE flag Bit 7
;
mov eax, cr4
mov edx, eax
and eax, 0FFFFFF7Fh
mov cr4, eax
;
; Flush all TLBs
;
mov eax, cr3
mov cr3, eax
mov eax, edx
ret
_MpMtrrSynchUpEntry ENDP
_MpMtrrSynchUpExit PROC NEAR PUBLIC
push ebp ; C prolog
mov ebp, esp
;
; Flush all TLBs the second time
;
mov eax, cr3
mov cr3, eax
;
; Enable Normal Mode caching CD=NW=0, CD(Bit30), NW(Bit29)
;
mov eax, cr0
and eax, 09FFFFFFFh
mov cr0, eax
;
; Set PGE Flag in CR4 if set
;
mov eax, dword ptr [ebp + 8]
mov cr4, eax
pop ebp
ret
_MpMtrrSynchUpExit ENDP
END
|