blob: ec4ea45f5b553ec563140d622a92b98befc4b8e1 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
|
/** @file
AsmEnableCache function
Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
/**
Perform a WBINVD and clear both the CD and NW bits of CR0.
Enables the caches by executing a WBINVD instruction and then clear both the CD and NW
bits of CR0 to 0. This function is only available on IA-32 and x64.
**/
VOID
EFIAPI
AsmEnableCache (
VOID
)
{
_asm {
wbinvd
mov eax, cr0
btr eax, 30
btr eax, 29
mov cr0, eax
}
}
|
