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authorGabe Black <gblack@eecs.umich.edu>2009-07-01 22:10:58 -0700
committerGabe Black <gblack@eecs.umich.edu>2009-07-01 22:10:58 -0700
commit065cb5942790b29886a443ef3f29b2b500231892 (patch)
treec821b864425fbca4db624e86bae44b97fd783b79
parent1ea14b8fac34764a219407effba3211e3f8edc90 (diff)
downloadgem5-065cb5942790b29886a443ef3f29b2b500231892.tar.xz
ARM: Add a DataOp format so data op definitions can be aggregated.
-rw-r--r--src/arch/arm/isa/formats/pred.isa47
1 files changed, 47 insertions, 0 deletions
diff --git a/src/arch/arm/isa/formats/pred.isa b/src/arch/arm/isa/formats/pred.isa
index 1748a09ea..11ba1519f 100644
--- a/src/arch/arm/isa/formats/pred.isa
+++ b/src/arch/arm/isa/formats/pred.isa
@@ -57,6 +57,20 @@ def template PredOpExecute {{
}
}};
+def template DataDecode {{
+ if (machInst.opcode4 == 0) {
+ if (machInst.sField == 0)
+ return new %(class_name)sImm(machInst);
+ else
+ return new %(class_name)sImmCc(machInst);
+ } else {
+ if (machInst.sField == 0)
+ return new %(class_name)s(machInst);
+ else
+ return new %(class_name)sCc(machInst);
+ }
+}};
+
let {{
calcCcCode = '''
@@ -78,6 +92,39 @@ let {{
}};
+def format DataOp(code, icValue, ivValue) {{
+ code += "resTemp = resTemp;"
+ regCode = re.sub(r'op2', 'shift_rm_rs(Rm, Rs, \
+ shift, Cpsr<29:0>)', code)
+ immCode = re.sub(r'op2', 'shift_rm_imm(Rm, shift_size, \
+ shift, Cpsr<29:0>)', code)
+ regIop = InstObjParams(name, Name, 'PredIntOp',
+ {"code": regCode,
+ "predicate_test": predicateTest})
+ immIop = InstObjParams(name, Name + "Imm", 'PredIntOp',
+ {"code": immCode,
+ "predicate_test": predicateTest})
+ regCcIop = InstObjParams(name, Name + "Cc", 'PredIntOp',
+ {"code": regCode + calcCcCode % vars(),
+ "predicate_test": predicateTest})
+ immCcIop = InstObjParams(name, Name + "ImmCc", 'PredIntOp',
+ {"code": immCode + calcCcCode % vars(),
+ "predicate_test": predicateTest})
+ header_output = BasicDeclare.subst(regIop) + \
+ BasicDeclare.subst(immIop) + \
+ BasicDeclare.subst(regCcIop) + \
+ BasicDeclare.subst(immCcIop)
+ decoder_output = BasicConstructor.subst(regIop) + \
+ BasicConstructor.subst(immIop) + \
+ BasicConstructor.subst(regCcIop) + \
+ BasicConstructor.subst(immCcIop)
+ exec_output = PredOpExecute.subst(regIop) + \
+ PredOpExecute.subst(immIop) + \
+ PredOpExecute.subst(regCcIop) + \
+ PredOpExecute.subst(immCcIop)
+ decode_block = DataDecode.subst(regIop)
+}};
+
def format PredOp(code, *opt_flags) {{
iop = InstObjParams(name, Name, 'PredOp',
{"code": code,