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authorNathan Binkert <binkertn@umich.edu>2005-06-05 02:59:44 -0400
committerNathan Binkert <binkertn@umich.edu>2005-06-05 02:59:44 -0400
commit11f0c012075cd29a8cfd451c82f7134f79021fe1 (patch)
tree0ef49a7fd382e657ace894b6ef56621c56837b9f
parente71ee12eacb115289ce96f9a384dd2c0567270a7 (diff)
parent550003e1b7a49798ff8154eae2355f298f35d346 (diff)
downloadgem5-11f0c012075cd29a8cfd451c82f7134f79021fe1.tar.xz
Merge zizzer.eecs.umich.edu:/bk/m5
into crampon.my.domain:/z/binkertn/research/m5/head --HG-- extra : convert_revision : d46f23e63e4a8c6325bcdeaf6cdd76b9e6208707
-rw-r--r--arch/alpha/pseudo_inst.cc2
-rw-r--r--cpu/base.cc2
-rw-r--r--cpu/base.hh2
-rw-r--r--cpu/simple/cpu.cc2
-rw-r--r--cpu/simple/cpu.hh4
-rwxr-xr-xutil/tracediff8
6 files changed, 10 insertions, 10 deletions
diff --git a/arch/alpha/pseudo_inst.cc b/arch/alpha/pseudo_inst.cc
index ff34aa19d..b541dc446 100644
--- a/arch/alpha/pseudo_inst.cc
+++ b/arch/alpha/pseudo_inst.cc
@@ -49,7 +49,7 @@
using namespace std;
-extern SamplingCPU *SampCPU;
+extern Sampler *SampCPU;
using namespace Stats;
diff --git a/cpu/base.cc b/cpu/base.cc
index 91ddc165e..38431006e 100644
--- a/cpu/base.cc
+++ b/cpu/base.cc
@@ -203,7 +203,7 @@ BaseCPU::registerExecContexts()
void
-BaseCPU::switchOut(SamplingCPU *sampler)
+BaseCPU::switchOut(Sampler *sampler)
{
panic("This CPU doesn't support sampling!");
}
diff --git a/cpu/base.hh b/cpu/base.hh
index 0cb81e93b..9c030be1c 100644
--- a/cpu/base.hh
+++ b/cpu/base.hh
@@ -126,7 +126,7 @@ class BaseCPU : public SimObject
/// Prepare for another CPU to take over execution. When it is
/// is ready (drained pipe) it signals the sampler.
- virtual void switchOut(SamplingCPU *);
+ virtual void switchOut(Sampler *);
/// Take over execution from the given CPU. Used for warm-up and
/// sampling.
diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc
index d16993c5c..b145e1bbd 100644
--- a/cpu/simple/cpu.cc
+++ b/cpu/simple/cpu.cc
@@ -147,7 +147,7 @@ SimpleCPU::~SimpleCPU()
}
void
-SimpleCPU::switchOut(SamplingCPU *s)
+SimpleCPU::switchOut(Sampler *s)
{
sampler = s;
if (status() == DcacheMissStall) {
diff --git a/cpu/simple/cpu.hh b/cpu/simple/cpu.hh
index 9a0c2952a..1d2ca79cb 100644
--- a/cpu/simple/cpu.hh
+++ b/cpu/simple/cpu.hh
@@ -145,7 +145,7 @@ class SimpleCPU : public BaseCPU
// execution context
ExecContext *xc;
- void switchOut(SamplingCPU *s);
+ void switchOut(Sampler *s);
void takeOverFrom(BaseCPU *oldCPU);
#ifdef FULL_SYSTEM
@@ -169,7 +169,7 @@ class SimpleCPU : public BaseCPU
// Pointer to the sampler that is telling us to switchover.
// Used to signal the completion of the pipe drain and schedule
// the next switchover
- SamplingCPU *sampler;
+ Sampler *sampler;
StaticInstPtr<TheISA> curStaticInst;
diff --git a/util/tracediff b/util/tracediff
index 87210f1ed..f11431293 100755
--- a/util/tracediff
+++ b/util/tracediff
@@ -30,17 +30,17 @@
# Script to simplify using rundiff on trace outputs from two
# invocations of m5.
#
-# Note that you need to enable some trace flags in the args in order
-# to do anything useful!
+# ******Note that you need to enable some trace flags in the args in order
+# to do anything useful!******
#
# If you want to pass different arguments to the two instances of m5,
# you can embed them in the simulator arguments like this:
#
-# % tracediff "m5.opt --foo:bar=1" "m5.opt --foo:bar=2" [common args]
+# % tracediff "m5.opt --foo.bar=1" "m5.opt --foo.bar=2" [common args]
#
if (@ARGV < 2) {
- die "Usage: tracediff sim1 sim2 [--trace:flags=X args...]\n";
+ die "Usage: tracediff sim1 sim2 [--root.trace.flags=X args...]\n";
}
# First two args are the two simulator binaries to compare