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author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-01-10 17:28:05 +0000 |
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committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-01-25 12:51:29 +0000 |
commit | 204e932607aa582cd7036b08e20521c2c6c49941 (patch) | |
tree | 7f79e85a17fb19fbc7109c2e0c74e678f43d6b37 | |
parent | 47fd797f1ecd303da3263b180904a7a0b0e18581 (diff) | |
download | gem5-204e932607aa582cd7036b08e20521c2c6c49941.tar.xz |
cpu: O3 rename using the flatIndex instead of index
This patch is replacing the RegId::index with RegId::flatIndex so that
it provides a valid register number when used by a VecElem register.
Change-Id: I5b000abb9457cd325c2a3021e772a75ea33d8a4c
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/15600
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
-rw-r--r-- | src/cpu/o3/rename_map.cc | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/cpu/o3/rename_map.cc b/src/cpu/o3/rename_map.cc index d1876a965..1b831d940 100644 --- a/src/cpu/o3/rename_map.cc +++ b/src/cpu/o3/rename_map.cc @@ -76,14 +76,14 @@ SimpleRenameMap::rename(const RegId& arch_reg) PhysRegIdPtr renamed_reg; // Record the current physical register that is renamed to the // requested architected register. - PhysRegIdPtr prev_reg = map[arch_reg.index()]; + PhysRegIdPtr prev_reg = map[arch_reg.flatIndex()]; // If it's not referencing the zero register, then rename the // register. if (arch_reg != zeroReg) { renamed_reg = freeList->getReg(); - map[arch_reg.index()] = renamed_reg; + map[arch_reg.flatIndex()] = renamed_reg; } else { // Otherwise return the zero register so nothing bad happens. assert(prev_reg->isZeroReg()); @@ -92,8 +92,8 @@ SimpleRenameMap::rename(const RegId& arch_reg) DPRINTF(Rename, "Renamed reg %d to physical reg %d (%d) old mapping was" " %d (%d)\n", - arch_reg, renamed_reg->index(), renamed_reg->flatIndex(), - prev_reg->index(), prev_reg->flatIndex()); + arch_reg, renamed_reg->flatIndex(), renamed_reg->flatIndex(), + prev_reg->flatIndex(), prev_reg->flatIndex()); return RenameInfo(renamed_reg, prev_reg); } |