configs, arch-arm: Using AddrRange for Realview mem_regions

Physical memory ranges are now saved in Realview objects as pairs of
addresses (start address and size). This patch is substituting them with
a single AddrRange object.

Change-Id: I02d25d557c5c54d062f0dccef8ede45744d0ce6b
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/16206
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>

3 files changed, 12 insertions, 12 deletions

diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py
index 04793e98e..fc21519ab 100644
--- a/configs/common/FSConfig.py
+++ b/configs/common/FSConfig.py
@@ -263,11 +263,11 @@ def makeArmSystem(mem_mode, machine_type, num_cpus=1, mdesc=None,
     self.mem_ranges = []
     size_remain = long(Addr(mdesc.mem()))
     for region in self.realview._mem_regions:
-        if size_remain > long(region[1]):
-            self.mem_ranges.append(AddrRange(region[0], size=region[1]))
-            size_remain = size_remain - long(region[1])
+        if size_remain > long(region.size()):
+            self.mem_ranges.append(region)
+            size_remain = size_remain - long(region.size())
         else:
-            self.mem_ranges.append(AddrRange(region[0], size=size_remain))
+            self.mem_ranges.append(AddrRange(region.start, size=size_remain))
             size_remain = 0
             break
         warn("Memory size specified spans more than one region. Creating" \
diff --git a/configs/example/arm/devices.py b/configs/example/arm/devices.py
index e2c8be8af..0c08ea23d 100644
--- a/configs/example/arm/devices.py
+++ b/configs/example/arm/devices.py
@@ -207,9 +207,8 @@ class SimpleSystem(LinuxArmSystem):
         self.iobridge = Bridge(delay='50ns')
         # Device DMA -> MEM
         mem_range = self.realview._mem_regions[0]
-        max_size = long(mem_range[1])
-        assert max_size >= long(Addr(mem_size))
-        self.mem_ranges = [ AddrRange(start=mem_range[0], size=mem_size) ]
+        assert long(mem_range.size()) >= long(Addr(mem_size))
+        self.mem_ranges = [ AddrRange(start=mem_range.start, size=mem_size) ]
         self._caches = caches
         if self._caches:
             self.iocache = IOCache(addr_ranges=[self.mem_ranges[0]])
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index 60ae5aa89..d7ce9eba0 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -493,7 +493,7 @@ class RealView(Platform):
     type = 'RealView'
     cxx_header = "dev/arm/realview.hh"
     system = Param.System(Parent.any, "system")
-    _mem_regions = [(Addr(0), Addr('256MB'))]
+    _mem_regions = [ AddrRange(0, size='256MB') ]
 
     def _on_chip_devices(self):
         return []
@@ -703,7 +703,7 @@ class RealViewPBX(RealView):
         self.energy_ctrl.clk_domain   = clkdomain
 
 class VExpress_EMM(RealView):
-    _mem_regions = [(Addr('2GB'), Addr('2GB'))]
+    _mem_regions = [ AddrRange('2GB', size='2GB') ]
 
     # Ranges based on excluding what is part of on-chip I/O (gic,
     # a9scu)
@@ -837,8 +837,9 @@ class VExpress_EMM(RealView):
 
 class VExpress_EMM64(VExpress_EMM):
     # Three memory regions are specified totalling 512GB
-    _mem_regions = [(Addr('2GB'), Addr('2GB')), (Addr('34GB'), Addr('30GB')),
-                    (Addr('512GB'), Addr('480GB'))]
+    _mem_regions = [ AddrRange('2GB', size='2GB'),
+                     AddrRange('34GB', size='30GB'),
+                     AddrRange('512GB', size='480GB') ]
     pci_host = GenericPciHost(
         conf_base=0x30000000, conf_size='256MB', conf_device_bits=12,
         pci_pio_base=0x2f000000)
@@ -951,7 +952,7 @@ Interrupts:
     """
 
     # Everything above 2GiB is memory
-    _mem_regions = [(Addr('2GB'), Addr('510GB'))]
+    _mem_regions = [ AddrRange('2GB', size='510GB') ]
 
     _off_chip_ranges = [
         # CS1-CS5