x86: Use little endian packet accessors.

We know data is little endian, so we can use those accessors
explicitly.

Change-Id: I09aa7f1e525ad1346e932ce4a772b64bf59dc350
Reviewed-on: https://gem5-review.googlesource.com/c/13456
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>

11 files changed, 32 insertions, 32 deletions

diff --git a/src/arch/x86/interrupts.cc b/src/arch/x86/interrupts.cc
index 0ef79a472..8ba181948 100644
--- a/src/arch/x86/interrupts.cc
+++ b/src/arch/x86/interrupts.cc
@@ -312,7 +312,7 @@ X86ISA::Interrupts::recvMessage(PacketPtr pkt)
     {
       case 0:
         {
-            TriggerIntMessage message = pkt->get<TriggerIntMessage>();
+            TriggerIntMessage message = pkt->getRaw<TriggerIntMessage>();
             DPRINTF(LocalApic,
                     "Got Trigger Interrupt message with vector %#x.\n",
                     message.vector);
diff --git a/src/arch/x86/intmessage.hh b/src/arch/x86/intmessage.hh
index 83d80bb94..8ec60b2aa 100644
--- a/src/arch/x86/intmessage.hh
+++ b/src/arch/x86/intmessage.hh
@@ -94,7 +94,7 @@ namespace X86ISA
     buildIntRequest(const uint8_t id, T payload, Addr offset, Addr size)
     {
         PacketPtr pkt = prepIntRequest(id, offset, size);
-        pkt->set<T>(payload);
+        pkt->setRaw<T>(payload);
         return pkt;
     }
 
diff --git a/src/arch/x86/memhelpers.hh b/src/arch/x86/memhelpers.hh
index aa3617b43..416439b9e 100644
--- a/src/arch/x86/memhelpers.hh
+++ b/src/arch/x86/memhelpers.hh
@@ -56,16 +56,16 @@ getMem(PacketPtr pkt, uint64_t &mem, unsigned dataSize,
 {
     switch (dataSize) {
       case 1:
-        mem = pkt->get<uint8_t>();
+        mem = pkt->getLE<uint8_t>();
         break;
       case 2:
-        mem = pkt->get<uint16_t>();
+        mem = pkt->getLE<uint16_t>();
         break;
       case 4:
-        mem = pkt->get<uint32_t>();
+        mem = pkt->getLE<uint32_t>();
         break;
       case 8:
-        mem = pkt->get<uint64_t>();
+        mem = pkt->getLE<uint64_t>();
         break;
       default:
         panic("Unhandled size in getMem.\n");
@@ -78,7 +78,7 @@ template <typename T, size_t N>
 static void
 getPackedMem(PacketPtr pkt, std::array<uint64_t, N> &mem, unsigned dataSize)
 {
-    std::array<T, N> real_mem = pkt->get<std::array<T, N> >();
+    std::array<T, N> real_mem = pkt->getLE<std::array<T, N> >();
     for (int i = 0; i < N; i++)
         mem[i] = real_mem[i];
 }
diff --git a/src/arch/x86/pagetable_walker.cc b/src/arch/x86/pagetable_walker.cc
index 11ec12245..4a405f25f 100644
--- a/src/arch/x86/pagetable_walker.cc
+++ b/src/arch/x86/pagetable_walker.cc
@@ -279,9 +279,9 @@ Walker::WalkerState::stepWalk(PacketPtr &write)
     write = NULL;
     PageTableEntry pte;
     if (dataSize == 8)
-        pte = read->get<uint64_t>();
+        pte = read->getLE<uint64_t>();
     else
-        pte = read->get<uint32_t>();
+        pte = read->getLE<uint32_t>();
     VAddr vaddr = entry.vaddr;
     bool uncacheable = pte.pcd;
     Addr nextRead = 0;
@@ -522,7 +522,7 @@ Walker::WalkerState::stepWalk(PacketPtr &write)
         // value back to memory.
         if (doWrite) {
             write = oldRead;
-            write->set<uint64_t>(pte);
+            write->setLE<uint64_t>(pte);
             write->cmd = MemCmd::WriteReq;
         } else {
             write = NULL;
diff --git a/src/dev/x86/cmos.cc b/src/dev/x86/cmos.cc
index 16286f07e..41009c6d1 100644
--- a/src/dev/x86/cmos.cc
+++ b/src/dev/x86/cmos.cc
@@ -50,10 +50,10 @@ X86ISA::Cmos::read(PacketPtr pkt)
     switch(pkt->getAddr() - pioAddr)
     {
       case 0x0:
-        pkt->set(address);
+        pkt->setLE(address);
         break;
       case 0x1:
-        pkt->set(readRegister(address));
+        pkt->setLE(readRegister(address));
         break;
       default:
         panic("Read from undefined CMOS port.\n");
@@ -69,10 +69,10 @@ X86ISA::Cmos::write(PacketPtr pkt)
     switch(pkt->getAddr() - pioAddr)
     {
       case 0x0:
-        address = pkt->get<uint8_t>();
+        address = pkt->getLE<uint8_t>();
         break;
       case 0x1:
-        writeRegister(address, pkt->get<uint8_t>());
+        writeRegister(address, pkt->getLE<uint8_t>());
         break;
       default:
         panic("Write to undefined CMOS port.\n");
diff --git a/src/dev/x86/i8042.cc b/src/dev/x86/i8042.cc
index 8ab0d4047..692f4afa0 100644
--- a/src/dev/x86/i8042.cc
+++ b/src/dev/x86/i8042.cc
@@ -118,10 +118,10 @@ X86ISA::I8042::read(PacketPtr pkt)
     if (addr == dataPort) {
         uint8_t data = readDataOut();
         //DPRINTF(I8042, "Read from data port got %#02x.\n", data);
-        pkt->set<uint8_t>(data);
+        pkt->setLE<uint8_t>(data);
     } else if (addr == commandPort) {
         //DPRINTF(I8042, "Read status as %#02x.\n", (uint8_t)statusReg);
-        pkt->set<uint8_t>((uint8_t)statusReg);
+        pkt->setLE<uint8_t>((uint8_t)statusReg);
     } else {
         panic("Read from unrecognized port %#x.\n", addr);
     }
@@ -134,7 +134,7 @@ X86ISA::I8042::write(PacketPtr pkt)
 {
     assert(pkt->getSize() == 1);
     Addr addr = pkt->getAddr();
-    uint8_t data = pkt->get<uint8_t>();
+    uint8_t data = pkt->getLE<uint8_t>();
     if (addr == dataPort) {
         statusReg.commandLast = 0;
         switch (lastCommand) {
diff --git a/src/dev/x86/i82094aa.cc b/src/dev/x86/i82094aa.cc
index 51304f25a..2b09f14a5 100644
--- a/src/dev/x86/i82094aa.cc
+++ b/src/dev/x86/i82094aa.cc
@@ -103,10 +103,10 @@ X86ISA::I82094AA::read(PacketPtr pkt)
     Addr offset = pkt->getAddr() - pioAddr;
     switch(offset) {
       case 0:
-        pkt->set<uint32_t>(regSel);
+        pkt->setLE<uint32_t>(regSel);
         break;
       case 16:
-        pkt->set<uint32_t>(readReg(regSel));
+        pkt->setLE<uint32_t>(readReg(regSel));
         break;
       default:
         panic("Illegal read from I/O APIC.\n");
@@ -122,10 +122,10 @@ X86ISA::I82094AA::write(PacketPtr pkt)
     Addr offset = pkt->getAddr() - pioAddr;
     switch(offset) {
       case 0:
-        regSel = pkt->get<uint32_t>();
+        regSel = pkt->getLE<uint32_t>();
         break;
       case 16:
-        writeReg(regSel, pkt->get<uint32_t>());
+        writeReg(regSel, pkt->getLE<uint32_t>());
         break;
       default:
         panic("Illegal write to I/O APIC.\n");
diff --git a/src/dev/x86/i8237.cc b/src/dev/x86/i8237.cc
index a9ef53c2c..2f17fae4a 100644
--- a/src/dev/x86/i8237.cc
+++ b/src/dev/x86/i8237.cc
@@ -100,7 +100,7 @@ X86ISA::I8237::write(PacketPtr pkt)
         panic("Write to i8237 request register unimplemented.\n");
       case 0xa:
         {
-            uint8_t command = pkt->get<uint8_t>();
+            uint8_t command = pkt->getLE<uint8_t>();
             uint8_t select = bits(command, 1, 0);
             uint8_t bitVal = bits(command, 2);
             if (!bitVal)
diff --git a/src/dev/x86/i8254.cc b/src/dev/x86/i8254.cc
index 457db13f7..1c2780ab6 100644
--- a/src/dev/x86/i8254.cc
+++ b/src/dev/x86/i8254.cc
@@ -52,9 +52,9 @@ X86ISA::I8254::read(PacketPtr pkt)
     assert(pkt->getSize() == 1);
     Addr offset = pkt->getAddr() - pioAddr;
     if (offset < 3) {
-        pkt->set(pit.readCounter(offset));
+        pkt->setLE(pit.readCounter(offset));
     } else if (offset == 3) {
-        pkt->set(uint8_t(-1));
+        pkt->setLE(uint8_t(-1));
     } else {
         panic("Read from undefined i8254 register.\n");
     }
@@ -68,9 +68,9 @@ X86ISA::I8254::write(PacketPtr pkt)
     assert(pkt->getSize() == 1);
     Addr offset = pkt->getAddr() - pioAddr;
     if (offset < 3) {
-        pit.writeCounter(offset, pkt->get<uint8_t>());
+        pit.writeCounter(offset, pkt->getLE<uint8_t>());
     } else if (offset == 3) {
-        pit.writeControl(pkt->get<uint8_t>());
+        pit.writeControl(pkt->getLE<uint8_t>());
     } else {
         panic("Write to undefined i8254 register.\n");
     }
diff --git a/src/dev/x86/i8259.cc b/src/dev/x86/i8259.cc
index 03c5cb948..4c3b9b272 100644
--- a/src/dev/x86/i8259.cc
+++ b/src/dev/x86/i8259.cc
@@ -56,15 +56,15 @@ X86ISA::I8259::read(PacketPtr pkt)
       case 0x0:
         if (readIRR) {
             DPRINTF(I8259, "Reading IRR as %#x.\n", IRR);
-            pkt->set(IRR);
+            pkt->setLE(IRR);
         } else {
             DPRINTF(I8259, "Reading ISR as %#x.\n", ISR);
-            pkt->set(ISR);
+            pkt->setLE(ISR);
         }
         break;
       case 0x1:
         DPRINTF(I8259, "Reading IMR as %#x.\n", IMR);
-        pkt->set(IMR);
+        pkt->setLE(IMR);
         break;
     }
     pkt->makeAtomicResponse();
@@ -75,7 +75,7 @@ Tick
 X86ISA::I8259::write(PacketPtr pkt)
 {
     assert(pkt->getSize() == 1);
-    uint8_t val = pkt->get<uint8_t>();
+    uint8_t val = pkt->getLE<uint8_t>();
     switch (pkt->getAddr() - pioAddr) {
       case 0x0:
         if (bits(val, 4)) {
diff --git a/src/dev/x86/speaker.cc b/src/dev/x86/speaker.cc
index 4d39903e2..d41f83ac5 100644
--- a/src/dev/x86/speaker.cc
+++ b/src/dev/x86/speaker.cc
@@ -48,7 +48,7 @@ X86ISA::Speaker::read(PacketPtr pkt)
             controlVal.gate ? "on" : "off",
             controlVal.speaker ? "on" : "off",
             controlVal.timer ? "on" : "off");
-    pkt->set((uint8_t)controlVal);
+    pkt->setLE((uint8_t)controlVal);
     pkt->makeAtomicResponse();
     return latency;
 }
@@ -58,7 +58,7 @@ X86ISA::Speaker::write(PacketPtr pkt)
 {
     assert(pkt->getAddr() == pioAddr);
     assert(pkt->getSize() == 1);
-    SpeakerControl val = pkt->get<uint8_t>();
+    SpeakerControl val = pkt->getLE<uint8_t>();
     controlVal.gate = val.gate;
     //Change the gate value in the timer.
     if (!val.gate)