Merge zizzer:/z/m5/Bitkeeper/m5

into zizzer.eecs.umich.edu:/.automount/zazzer/z/rdreslin/m5bk/timing_L1

--HG--
extra : convert_revision : e7d839327b07393bfcda0b77758b0832eaf1c1c0

4 files changed, 21 insertions, 15 deletions

diff --git a/arch/alpha/alpha_memory.cc b/arch/alpha/alpha_memory.cc
index 639abbeb8..8f6d7a51a 100644
--- a/arch/alpha/alpha_memory.cc
+++ b/arch/alpha/alpha_memory.cc
@@ -68,24 +68,27 @@ AlphaTLB::~AlphaTLB()
 AlphaISA::PTE *
 AlphaTLB::lookup(Addr vpn, uint8_t asn) const
 {
-    DPRINTF(TLB, "lookup %#x, asn %#x\n", vpn, (int)asn);
+    // assume not found...
+    AlphaISA::PTE *retval = NULL;
 
     PageTable::const_iterator i = lookupTable.find(vpn);
-    if (i == lookupTable.end())
-        return NULL;
-
-    while (i->first == vpn) {
-        int index = i->second;
-        AlphaISA::PTE *pte = &table[index];
-        assert(pte->valid);
-        if (vpn == pte->tag && (pte->asma || pte->asn == asn))
-            return pte;
+    if (i != lookupTable.end()) {
+        while (i->first == vpn) {
+            int index = i->second;
+            AlphaISA::PTE *pte = &table[index];
+            assert(pte->valid);
+            if (vpn == pte->tag && (pte->asma || pte->asn == asn)) {
+                retval = pte;
+                break;
+            }
 
-        ++i;
+            ++i;
+        }
     }
 
-    // not found...
-    return NULL;
+    DPRINTF(TLB, "lookup %#x, asn %#x -> %s ppn %#x\n", vpn, (int)asn,
+            retval ? "hit" : "miss", retval ? retval->ppn : 0);
+    return retval;
 }
 
 
diff --git a/arch/alpha/isa_traits.hh b/arch/alpha/isa_traits.hh
index ff3da1502..8db8c6994 100644
--- a/arch/alpha/isa_traits.hh
+++ b/arch/alpha/isa_traits.hh
@@ -175,6 +175,9 @@ static const Addr PageOffset = PageBytes - 1;
 
     static StaticInstPtr<AlphaISA> decodeInst(MachInst);
 
+    // return a no-op instruction... used for instruction fetch faults
+    static const MachInst NoopMachInst;
+
     enum annotes {
         ANNOTE_NONE = 0,
         // An impossible number for instruction annotations
diff --git a/base/traceflags.py b/base/traceflags.py
index ef13d9e2a..800c47bd3 100644
--- a/base/traceflags.py
+++ b/base/traceflags.py
@@ -110,7 +110,7 @@ baseFlags = [
     'IICMore',
     'MSHR',
     'Chains',
-    'Dispatch',
+    'Pipeline',
     'Stats',
     'StatEvents',
     'Context',
diff --git a/cpu/exetrace.cc b/cpu/exetrace.cc
index ff7e90c9e..048a7d283 100644
--- a/cpu/exetrace.cc
+++ b/cpu/exetrace.cc
@@ -154,7 +154,7 @@ class ExecutionTraceParamContext : public ParamContext
 ExecutionTraceParamContext exeTraceParams("exetrace");
 
 Param<bool> exe_trace_spec(&exeTraceParams, "speculative",
-                           "capture speculative instructions", false);
+                           "capture speculative instructions", true);
 
 Param<bool> exe_trace_print_cycle(&exeTraceParams, "print_cycle",
                                   "print cycle number", true);