diff options
author | Gabe Black <gabeblack@google.com> | 2019-10-15 21:25:18 -0700 |
---|---|---|
committer | Gabe Black <gabeblack@google.com> | 2019-10-18 21:53:43 +0000 |
commit | 5cd8bd6d48026590bcce04b92231b55e82dad799 (patch) | |
tree | 57eb4b1d626141935139f9c5b8e5725eaa3aec46 | |
parent | 52d06fd655d36ac4a8ae09934e091cf2bacf578f (diff) | |
download | gem5-5cd8bd6d48026590bcce04b92231b55e82dad799.tar.xz |
arch: Get rid of the unused GenericTLB.
Nothing is using it, and it's actually not use*able* at the moment
because it doesn't have implementations for all the pure virtual
methods that exist in the BaseTLB class.
Change-Id: I03d47c2e116f354c7247a2fa19a9f33dfe4c5eec
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/21841
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
-rw-r--r-- | src/arch/generic/SConscript | 1 | ||||
-rw-r--r-- | src/arch/generic/tlb.cc | 73 | ||||
-rw-r--r-- | src/arch/generic/tlb.hh | 20 |
3 files changed, 0 insertions, 94 deletions
diff --git a/src/arch/generic/SConscript b/src/arch/generic/SConscript index 7123eaf4a..0fc5e7402 100644 --- a/src/arch/generic/SConscript +++ b/src/arch/generic/SConscript @@ -45,7 +45,6 @@ if env['TARGET_ISA'] == 'null': Source('decode_cache.cc') Source('mmapped_ipr.cc') -Source('tlb.cc') SimObject('BaseTLB.py') SimObject('ISACommon.py') diff --git a/src/arch/generic/tlb.cc b/src/arch/generic/tlb.cc deleted file mode 100644 index aebdd4bfe..000000000 --- a/src/arch/generic/tlb.cc +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Copyright (c) 2001-2005 The Regents of The University of Michigan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are - * met: redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer; - * redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution; - * neither the name of the copyright holders nor the names of its - * contributors may be used to endorse or promote products derived from - * this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS - * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT - * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR - * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT - * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - * - * Authors: Gabe Black - */ - -#include "arch/generic/tlb.hh" - -#include "cpu/thread_context.hh" -#include "mem/page_table.hh" -#include "sim/faults.hh" -#include "sim/full_system.hh" -#include "sim/process.hh" - -Fault -GenericTLB::translateAtomic(const RequestPtr &req, ThreadContext *tc, Mode) -{ - if (FullSystem) - panic("Generic translation shouldn't be used in full system mode.\n"); - - Process * p = tc->getProcessPtr(); - - Fault fault = p->pTable->translate(req); - if (fault != NoFault) - return fault; - - return NoFault; -} - -void -GenericTLB::translateTiming(const RequestPtr &req, ThreadContext *tc, - Translation *translation, Mode mode) -{ - assert(translation); - translation->finish(translateAtomic(req, tc, mode), req, tc, mode); -} - -Fault -GenericTLB::finalizePhysical(const RequestPtr &req, ThreadContext *tc, - Mode mode) const -{ - return NoFault; -} - -void -GenericTLB::demapPage(Addr vaddr, uint64_t asn) -{ - warn("Demapping pages in the generic TLB is unnecessary.\n"); -} diff --git a/src/arch/generic/tlb.hh b/src/arch/generic/tlb.hh index 8aab5135a..09438a7ef 100644 --- a/src/arch/generic/tlb.hh +++ b/src/arch/generic/tlb.hh @@ -141,24 +141,4 @@ class BaseTLB : public SimObject void memInvalidate() { flushAll(); } }; -class GenericTLB : public BaseTLB -{ - protected: - GenericTLB(const Params *p) - : BaseTLB(p) - {} - - public: - void demapPage(Addr vaddr, uint64_t asn) override; - - Fault translateAtomic( - const RequestPtr &req, ThreadContext *tc, Mode mode) override; - void translateTiming( - const RequestPtr &req, ThreadContext *tc, - Translation *translation, Mode mode) override; - - Fault finalizePhysical( - const RequestPtr &req, ThreadContext *tc, Mode mode) const override; -}; - #endif // __ARCH_GENERIC_TLB_HH__ |