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| author | Korey Sewell <ksewell@umich.edu> | 2009-07-25 22:24:45 -0400 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2009-07-25 22:24:45 -0400 |
| commit | 927dd2093210f3784bc60ff05e2b9b919a8053a2 (patch) | |
| tree | 0761a3ce89ac824d21c1ba4f0280511c62dc2ed6 | |
| parent | d4813236d6a4c4f982e7f4c00a4ccd8ceab12443 (diff) | |
| parent | ef4e8b04a657fe113d01b0bd3cac8871848a185d (diff) | |
| download | gem5-927dd2093210f3784bc60ff05e2b9b919a8053a2.tar.xz | |
merge sparc fix w/2t regress fix
| -rw-r--r-- | src/arch/sparc/nativetrace.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/sparc/nativetrace.cc b/src/arch/sparc/nativetrace.cc index 6e894e8df..02d4f4dbf 100644 --- a/src/arch/sparc/nativetrace.cc +++ b/src/arch/sparc/nativetrace.cc @@ -36,7 +36,7 @@ namespace Trace { -static char *intRegNames[SparcISA::NumIntArchRegs] = { +static const char *intRegNames[SparcISA::NumIntArchRegs] = { //Global registers "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", //Output registers @@ -58,7 +58,7 @@ Trace::SparcNativeTrace::check(NativeTraceRecord *record) // I doubt a real SPARC will describe more integer registers than this. assert(SparcISA::NumIntArchRegs == 32); - char **regName = intRegNames; + const char **regName = intRegNames; for (int i = 0; i < SparcISA::NumIntArchRegs; i++) { regVal = tc->readIntReg(i); read(&realRegVal, sizeof(realRegVal)); |