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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-08-23 12:18:59 +0100 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-09-06 11:53:49 +0000 |
| commit | 983f667dc38e2d14896712b39932c349f00ed1ec (patch) | |
| tree | ec7f9baffb3b5e8dcd76b11c8e911cc0520d1b69 | |
| parent | cad88af5bd731386201c9548ae0264640e17f3b0 (diff) | |
| download | gem5-983f667dc38e2d14896712b39932c349f00ed1ec.tar.xz | |
dev-arm: Check if INTID group is enabled when reading HPPIRx
If it is not enabled, it should return INTID_SPOURIOUS
Change-Id: I4dfa8b9fcea874b4d281cd154dd38752b05e1d59
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20616
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
| -rw-r--r-- | src/dev/arm/gic_v3_cpu_interface.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/dev/arm/gic_v3_cpu_interface.cc b/src/dev/arm/gic_v3_cpu_interface.cc index b4c271d4a..d2b397a7e 100644 --- a/src/dev/arm/gic_v3_cpu_interface.cc +++ b/src/dev/arm/gic_v3_cpu_interface.cc @@ -1653,7 +1653,7 @@ Gicv3CPUInterface::virtualFindActive(uint32_t int_id) const uint32_t Gicv3CPUInterface::getHPPIR0() const { - if (hppi.prio == 0xff) { + if (hppi.prio == 0xff || !groupEnabled(hppi.group)) { return Gicv3::INTID_SPURIOUS; } @@ -1679,7 +1679,7 @@ Gicv3CPUInterface::getHPPIR0() const uint32_t Gicv3CPUInterface::getHPPIR1() const { - if (hppi.prio == 0xff) { + if (hppi.prio == 0xff || !groupEnabled(hppi.group)) { return Gicv3::INTID_SPURIOUS; } |