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authorLisa Hsu <hsul@eecs.umich.edu>2007-01-11 09:29:03 -0500
committerLisa Hsu <hsul@eecs.umich.edu>2007-01-11 09:29:03 -0500
commit9f75c1c58f8352a8625f035c151ebcf6ce95b908 (patch)
tree444edd72b66b33893c2faf8aedbc795ab7bd41ce
parentd939060ec60da8e11e28a0c9946898a9e651247d (diff)
downloadgem5-9f75c1c58f8352a8625f035c151ebcf6ce95b908.tar.xz
ua2005.cc:
i SWEAR i committed this already, but apparently i didnt. ust start using HPSTATE::hpriv, etc. to access bitfields. src/arch/sparc/ua2005.cc: i SWEAR i committed this already, but apparently i didnt. ust start using HPSTATE::hpriv, etc. to access bitfields. --HG-- extra : convert_revision : e66fac9c63088c0fc1a62bd0fac92df305beadff
-rw-r--r--src/arch/sparc/ua2005.cc6
1 files changed, 2 insertions, 4 deletions
diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc
index c153c2d52..128402fdd 100644
--- a/src/arch/sparc/ua2005.cc
+++ b/src/arch/sparc/ua2005.cc
@@ -24,8 +24,6 @@
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * Authors: Ali Saidi
*/
#include "arch/sparc/miscregfile.hh"
@@ -81,7 +79,7 @@ MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
break;
case MISCREG_PSTATE:
- if (val & ie && !(pstate & ie)) {
+ if (val & PSTATE::ie && !(pstate & PSTATE::ie)) {
tc->getCpuPtr()->checkInterrupts = true;
}
setReg(miscReg, val);
@@ -128,7 +126,7 @@ MiscRegFile::setFSRegWithEffect(int miscReg, const MiscReg &val,
case MISCREG_HPSTATE:
// T1000 spec says impl. dependent val must always be 1
- setReg(miscReg, val | id);
+ setReg(miscReg, val | HPSTATE::id);
break;
case MISCREG_HTSTATE:
case MISCREG_STRAND_STS_REG: