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| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2018-05-22 11:58:28 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2018-06-06 13:52:39 +0000 |
| commit | a9b78bcee79a9228d0590091c5f6dfc265e59300 (patch) | |
| tree | cbdfa7ce434f0b188aa9d4765b123f3b7f25886d | |
| parent | e404dddca9715e4d0098830783ca3f6fca86f35b (diff) | |
| download | gem5-a9b78bcee79a9228d0590091c5f6dfc265e59300.tar.xz | |
arch-arm: Adjust breakpoint EC depending on source state
The software breakpoint exception class needs to be adjusted depending
on the source EL's execution state. This change fixes an incorrect
exception class when taking a breakpoint from aarch64.
Change-Id: I99d87a04be6bf9ce3a69f6b19969fa006cfd63a4
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Ciro Santilli <ciro.santilli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/10809
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
| -rw-r--r-- | src/arch/arm/faults.cc | 6 | ||||
| -rw-r--r-- | src/arch/arm/faults.hh | 1 | ||||
| -rw-r--r-- | src/arch/arm/types.hh | 1 |
3 files changed, 8 insertions, 0 deletions
diff --git a/src/arch/arm/faults.cc b/src/arch/arm/faults.cc index bdb6f2545..676559f61 100644 --- a/src/arch/arm/faults.cc +++ b/src/arch/arm/faults.cc @@ -1543,6 +1543,12 @@ SoftwareBreakpoint::routeToHyp(ThreadContext *tc) const (hcr.tge || mdcr.tde); } +ExceptionClass +SoftwareBreakpoint::ec(ThreadContext *tc) const +{ + return from64 ? EC_SOFTWARE_BREAKPOINT_64 : vals.ec; +} + void ArmSev::invoke(ThreadContext *tc, const StaticInstPtr &inst) { DPRINTF(Faults, "Invoking ArmSev Fault\n"); diff --git a/src/arch/arm/faults.hh b/src/arch/arm/faults.hh index 132c07cae..90b550198 100644 --- a/src/arch/arm/faults.hh +++ b/src/arch/arm/faults.hh @@ -573,6 +573,7 @@ class SoftwareBreakpoint : public ArmFaultVals<SoftwareBreakpoint> SoftwareBreakpoint(ExtMachInst _mach_inst, uint32_t _iss); bool routeToHyp(ThreadContext *tc) const override; + ExceptionClass ec(ThreadContext *tc) const override; }; // A fault that flushes the pipe, excluding the faulting instructions diff --git a/src/arch/arm/types.hh b/src/arch/arm/types.hh index d4e6ec0db..84887a1ca 100644 --- a/src/arch/arm/types.hh +++ b/src/arch/arm/types.hh @@ -623,6 +623,7 @@ namespace ArmISA EC_FP_EXCEPTION_64 = 0x2C, EC_SERROR = 0x2F, EC_SOFTWARE_BREAKPOINT = 0x38, + EC_SOFTWARE_BREAKPOINT_64 = 0x3C, }; /** |